Patents by Inventor Martin L. Schmatz

Martin L. Schmatz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10481955
    Abstract: A plurality of requests are received for computing processing. At least some of the plurality of requests are replicated. The requests are replicated based on a fractional replication factor. Each received request and each replicated request are transmitted to a computer resource for processing. At least some embodiments provide the capability for meeting tail latency targets with improved performance and reduced cost.
    Type: Grant
    Filed: September 18, 2016
    Date of Patent: November 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Robert Birke, Mathias Bjoerkqvist, Yiyu L. Chen, Martin L. Schmatz
  • Patent number: 10102033
    Abstract: A computer-implemented method for preventing the occurrence of performance tickets in a computing system comprising a plurality of virtual machines hosted by a host computing system. The method comprising the steps of: monitoring a resource usage parameter associated with the workload of a virtual machine in order to obtain historic resource usage information; determining information regarding certain dependencies within the historic resource usage information; selecting partial information from the historic resource usage information based on said determined information regarding certain dependencies; estimating the future workload of the virtual machines based on said selected partial information; and resizing the computational resources of one or more virtual machines based on the estimated future workload such that a usage threshold of a computational resource is below a given threshold in order to avoid the generation of a performance ticket.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: October 16, 2018
    Assignee: International Business Machines Corporation
    Inventors: Robert Birke, Yiyu L. Chen, Thomas Scherer, Martin L. Schmatz, Ji Xue
  • Patent number: 10048740
    Abstract: A computing system comprises one or more multicore processor(s) comprising a set of multiple processing units each operable at a variable frequency, and a main memory operable at a variable frequency. A feedback controller is configured to control the frequency of each processing unit of the set and the frequency of the main memory dependent on a measure representative of a current performance of an application running on one or more of the multiple processing units of the set.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: August 14, 2018
    Assignee: International Business Machines Corporation
    Inventors: Robert Birke, Yiyu L. Chen, Antonius P. Engbersen, Martin L. Schmatz, Cheng Wang
  • Patent number: 9971634
    Abstract: The present invention is notably directed to systems and methods for detecting resource contention on a computerized system collocation of computer processes. Most basically, such methods comprise: monitoring data produced by each computer process of a set of computer processes co-located on the computerized system; detecting in the monitored data a change in a behavior of data produced by a given computer process of the set of computer processes; and throttling other computer processes of the set than said given computer process to detect potential resource contention at said given computer process. Such systems and methods advantageously apply to co-located virtual machines.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: May 15, 2018
    Assignee: International Business Machines Corporation
    Inventors: Robert Birke, Yiyu L. Chen, Martin L. Schmatz, Joel Vallone
  • Patent number: 9940240
    Abstract: A persistent caching system is provided. The persistent caching system includes a storage system having a caching server for storing data, and a client for accessing the data through a network. The caching server is configured to store the data in a number of virtual memory blocks. The virtual memory blocks refer to an associated memory-mapped file in a file system of the caching server. The caching server is configured to export addresses of the virtual memory blocks to the client. The client is configured to access at least some of the virtual memory blocks through RDMA using the exported addresses. The caching server is configured to page virtual memory blocks being accessed by one or more clients through RDMA to and/or from the memory-mapped files associated with the accessed virtual memory blocks.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: April 10, 2018
    Assignee: International Business Machines Corporation
    Inventors: Bernard Metzler, Martin L. Schmatz, Patrick Stuedi, Animesh K. Trivedi
  • Publication number: 20180081737
    Abstract: A plurality of requests are received for computing processing. At least some of the plurality of requests are replicated. The requests are replicated based on a fractional replication factor. Each received request and each replicated request are transmitted to a computer resource for processing. At least some embodiments provide the capability for meeting tail latency targets with improved performance and reduced cost.
    Type: Application
    Filed: September 18, 2016
    Publication date: March 22, 2018
    Inventors: Robert Birke, Mathias Bjoerkqvist, Yiyu L. Chen, Martin L. Schmatz
  • Patent number: 9870035
    Abstract: A device is described. The device includes a daughterboard having a first distinct side and a second distinct side. A first connector on the first distinct side is attached to a first baseboard. A second connector on the second distinct side is attached to a second baseboard. A method for attaching a daughterboard to a second device is described. Connectors are included on opposing distinct sides of the daughterboard. The second device includes baseboards mechanically secured in parallel by lead screw actuators. As part of the method, the lead screw actuators are actuated so as to move the baseboards away from each other. A first connector is attached to one of the baseboards. The lead screw actuators are again actuated so as to move the baseboards toward each other until a second connector is brought into attachment with the other of the baseboards.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: January 16, 2018
    Assignee: International Business Machines Corporation
    Inventors: Robert Birke, Yiyu L. Chen, Martin L. Schmatz
  • Publication number: 20170344400
    Abstract: A computer-implemented method for preventing the occurrence of performance tickets in a computing system comprising a plurality of virtual machines hosted by a host computing system. The method comprising the steps of: monitoring a resource usage parameter associated with the workload of a virtual machine in order to obtain historic resource usage information; determining information regarding certain dependencies within the historic resource usage information; selecting partial information from the historic resource usage information based on said determined information regarding certain dependencies; estimating the future workload of the virtual machines based on said selected partial information; and resizing the computational resources of one or more virtual machines based on the estimated future workload such that a usage threshold of a computational resource is below a given threshold in order to avoid the generation of a performance ticket.
    Type: Application
    Filed: May 26, 2016
    Publication date: November 30, 2017
    Inventors: Robert Birke, Yiyu L. Chen, Thomas Scherer, Martin L. Schmatz, Ji Xue
  • Patent number: 9832874
    Abstract: A printed circuit board (PCB) assembly includes a first PCB and a second PCB disposed substantially parallel and opposite to each other, such that a second side of the first PCB is opposite to a first side of the second PCB; wherein the second PCB has a first set of side connectors on its first side and a second set of side connectors on its second side, configured for both electrical power supply to and signal communication with the second PCB; the second PCB both electrically and mechanically connected to the second side of the first PCB via a first elastomeric connector; and the second PCB electrically connected to the first PCB via its second set of side connectors and a flexible electrical connector that is electrically connected to the second set of side connectors and the first PCB.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: November 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Andreas C. Doering, Ralph Heller, Ronald P. Luijten, Martin L. Schmatz
  • Patent number: 9760378
    Abstract: Embodiments include methods, computer systems and computer program products for performing superscalar out-of-order processing in software in a computer system. Aspects include: loading opcodes into an analysis thread of the computer system, analyzing opcodes to identify certain non-independent opcode snippets, distributing non-independent opcode snippets to separate threads of computer system, instructing each of separate threads to execute each of non-independent opcode snippets, respectively, and collecting results of executions of each of separate threads by a consolidation thread.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: September 12, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Patricia M. Sagmeister, Martin L. Schmatz
  • Publication number: 20170168838
    Abstract: Embodiments include methods, computer systems and computer program products for performing superscalar out-of-order processing in software in a computer system. Aspects include: loading opcodes into an analysis thread of the computer system, analyzing opcodes to identify certain non-independent opcode snippets, distributing non-independent opcode snippets to separate threads of computer system, instructing each of separate threads to execute each of non-independent opcode snippets, respectively, and collecting results of executions of each of separate threads by a consolidation thread.
    Type: Application
    Filed: August 4, 2016
    Publication date: June 15, 2017
    Inventors: Patricia M. Sagmeister, MARTIN L. SCHMATZ
  • Publication number: 20170147641
    Abstract: Embodiments include pre-processing work items to be processed by computerized processing elements. Aspects include accessing a performance index, which relates to (dynamic) processing performances of work items as processed by the computerized processing elements. Aspects also include determining a time interval (during which the receiver may group queued work items into a block, according to the accessed performance index. Aspects further includes setting a timer to the determined time interval, to allow the receiver to group work items being queued until that time interval has elapsed, according to the timer set. As a result, a block of grouped work items will be obtained, which can then be passed to a scheduler for subsequent processing by computerized processing elements.
    Type: Application
    Filed: November 25, 2015
    Publication date: May 25, 2017
    Inventors: Robert Birke, Mathias Bjoerkqvist, Martin L. Schmatz, Sebastiano Spicuglia
  • Publication number: 20170090996
    Abstract: The present invention is notably directed to systems and methods for detecting resource contention on a computerized system collocation of computer processes. Most basically, such methods comprise: monitoring data produced by each computer process of a set of computer processes co-located on the computerized system; detecting in the monitored data a change in a behavior of data produced by a given computer process of the set of computer processes; and throttling other computer processes of the set than said given computer process to detect potential resource contention at said given computer process. Such systems and methods advantageously apply to co-located virtual machines.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: Robert Birke, Yiyu L. Chen, Martin L. Schmatz, Joel Vallone
  • Patent number: 9569236
    Abstract: The sizing of virtual machines is optimized based on projected performance metrics. All virtual machine configuration resources are normalized by a processing device. The normalized resources for the virtual machine configurations are then stored in a catalogue. An application is then profiled to obtain resource demand estimates for each virtual machine configuration and a base performance is calculated for the application. The base performance is used to predict performance estimates on all virtual machine configurations in the catalogue. Accordingly, a virtual machine configuration having a lowest response time is selected.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: February 14, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Birke, Yiyu L. Chen, Martin L. Schmatz
  • Publication number: 20170031416
    Abstract: A computing system comprises one or more multicore processor(s) comprising a set of multiple processing units each operable at a variable frequency, and a main memory operable at a variable frequency. A feedback controller is configured to control the frequency of each processing unit of the set and the frequency of the main memory dependent on a measure representative of a current performance of an application running on one or more of the multiple processing units of the set.
    Type: Application
    Filed: July 31, 2015
    Publication date: February 2, 2017
    Inventors: Robert Birke, Yiyu L. Chen, Antonius P. Engbersen, Martin L. Schmatz, Cheng Wang
  • Patent number: 9547540
    Abstract: A computer-implemented method includes managing function calls between a plurality of nodes and a super node of a rack system having a distributed operating system (OS). The OS includes a plurality of functions divided into first class and a second class, and each of the plurality of nodes excludes functions in the second class. Managing the function calls includes detecting a call to a first function on a first node of the plurality of nodes. It is determined that the first function belongs to the second class of functions and is not available on the first node. The call to the first function is routed to the super node, responsive to determining that the first function belongs to the second class, where the super node includes code for the functions in the second class.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: January 17, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Francois Abel, Rolf Clauberg, Andreas C. Doering, Patricia M. Sagmeister, Martin L. Schmatz
  • Publication number: 20170003722
    Abstract: A device is described. The device includes a daughterboard having a first distinct side and a second distinct side. A first connector on the first distinct side is attached to a first baseboard. A second connector on the second distinct side is attached to a second baseboard. A method for attaching a daughterboard to a second device is described. Connectors are included on opposing distinct sides of the daughterboard. The second device includes baseboards mechanically secured in parallel by lead screw actuators. As part of the method, the lead screw actuators are actuated so as to move the baseboards away from each other. A first connector is attached to one of the baseboards. The lead screw actuators are again actuated so as to move the baseboards toward each other until a second connector is brought into attachment with the other of the baseboards.
    Type: Application
    Filed: July 1, 2015
    Publication date: January 5, 2017
    Inventors: Robert Birke, Yiyu L. Chen, Martin L. Schmatz
  • Patent number: 9496006
    Abstract: The memory module having a plurality of memory chips and a plurality of connections for connecting the memory module to a processor. At least part of the connections is configurable to be grouped into N sets of address and control connections for N separatively controllable groups of memory chips of the plurality of memory chips (N?2).
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: November 15, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Andreas C Doering, Patricia M Sagmeister, Martin L Schmatz
  • Patent number: 9473333
    Abstract: A communications system that may include a transmitter, a receiver, connected over a communications network. A communication link on the communications network may transfer data between the transmitter and the receiver. The system may also include a logic unit to scramble a plurality of portions of the data at the transmitter based upon the communication link and may unscramble the plurality of portions of the data at the receiver. As a result, the logic unit may provide improved performance of the communication link and/or reduced power consumption of the communication link.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: October 18, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel M. Dreps, Frank D. Ferralolo, Robert J. Reese, Martin L. Schmatz
  • Patent number: 9471347
    Abstract: The sizing of virtual machines is optimized based on projected performance metrics. All virtual machine configuration resources are normalized by a processing device. The normalized resources for the virtual machine configurations are then stored in a catalog. An application is then profiled to obtain resource demand estimates for each virtual machine configuration and a base performance is calculated for the application. The base performance is used to predict performance estimates on all virtual machine configurations in the catalog. Accordingly, a virtual machine configuration having a lowest response time is selected.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: October 18, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Birke, Yiyu L. Chen, Martin L. Schmatz