Patents by Inventor Martin Michael Frank

Martin Michael Frank has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12114581
    Abstract: A method of fabricating a synaptic device is provided. The method includes forming a channel layer between a first terminal and a second terminal. The channel layer varies in resistance based on a magnesium concentration in the channel layer. The method further includes forming an electrolyte layer. The electrolyte layer includes a magnesium ion conductive material. A third terminal is formed over the electrolyte layer and applies a signal to the electrolyte layer and the channel layer.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: October 8, 2024
    Assignee: International Business Machines Corporation
    Inventors: Douglas M. Bishop, Martin Michael Frank, Teodor Krassimirov Todorov
  • Publication number: 20240202275
    Abstract: A system, method and computer program product for assigning deep neural network (DNN) weight matrices to a Compute-in-Memory (CiM) accelerator system, and particularly, efficient allocation strategies for assigning DNN model weight-layers to two-dimensional (2D) tiers of three-dimensional (3D) crossbar array tiles. Such efficient allocation strategies for assigning DNN model weight-layers to tiers and tiles of a CiM accelerator are optimized to minimize contention, latency and dead-time, and to maximize accelerator throughput. In one scenario, efficient allocation strategies include assigning DNN weight matrices to the 2D tiers of a 3D crossbar array tile to maximize throughput and minimize completion latency for a finite-batch-size example of an incoming workflow.
    Type: Application
    Filed: December 20, 2022
    Publication date: June 20, 2024
    Inventors: Geoffrey Burr, HsinYu Tsai, Irem Boybat Kara, Martin Michael Frank
  • Publication number: 20240185057
    Abstract: Systems, methods, and semiconductor devices for transfer learning are described. A semiconductor device can include a first non-volatile memory (NVM) and a second NVM. The first NVM can be configured to store weights of a first set of layers of a machine learning model. The weights of the first set of layers can be fixed. The second NVM can be configured to store weights of a second set of layers of the machine learning model. The weights of the second set of layers can be adjustable.
    Type: Application
    Filed: December 5, 2022
    Publication date: June 6, 2024
    Inventors: Takashi Ando, Martin Michael Frank, Timothy Mathew Philip, Vijay Narayanan
  • Patent number: 11889771
    Abstract: A method for mitigating moisture driven degradation of silicon doped chalcogenides includes placing a silicon doped chalcogenide composition in a process chamber, passivating dangling silicon bonds of the silicon doped chalcogenide composition by flooding the process chamber with forming gas or with hydrogen plasma, purging the forming gas or the hydrogen plasma from the process chamber, and removing the passivated silicon doped chalcogenide composition from the process chamber.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: January 30, 2024
    Assignees: International Business Machines Corporation, Macronix International Co., Ltd.
    Inventors: Cheng-Wei Cheng, Huai-Yu Cheng, I-Ting Kuo, Robert L. Bruce, Martin Michael Frank, Hiroyuki Miyazoe
  • Publication number: 20230210027
    Abstract: A method of fabricating a synaptic device is provided. The method includes forming a channel layer between a first terminal and a second terminal. The channel layer varies in resistance based on a magnesium concentration in the channel layer. The method further includes forming an electrolyte layer. The electrolyte layer includes a magnesium ion conductive material. A third terminal is formed over the electrolyte layer and applies a signal to the electrolyte layer and the channel layer.
    Type: Application
    Filed: March 6, 2023
    Publication date: June 29, 2023
    Inventors: Douglas M. Bishop, Martin Michael Frank, Teodor Krassimirov Todorov
  • Patent number: 11690304
    Abstract: A method of fabricating a synaptic device is provided. The method includes forming a channel layer between a first terminal and a second terminal. The channel layer varies in resistance based on a magnesium concentration in the channel layer. The method further includes forming an electrolyte layer. The electrolyte layer includes a magnesium ion conductive material. A third terminal is formed over the electrolyte layer and applies a signal to the electrolyte layer and the channel layer.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: June 27, 2023
    Assignee: International Business Machines Corporation
    Inventors: Douglas M. Bishop, Martin Michael Frank, Teodor Krassimirov Todorov
  • Patent number: 11646199
    Abstract: Embodiments of the present invention are directed to forming a sub-stoichiometric metal-oxide film using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor can include a metal and a first ligand. The second precursor can include the same metal and a second ligand. A substrate can be exposed to the first precursor during a first pulse of an ALD cycle. The substrate can be exposed to the second precursor during a second pulse of the ALD cycle. The second pulse can occur directly after the first pulse without an intervening thermal oxidant. The substrate can be exposed to the thermal oxidant during a third pulse of the ALD cycle.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: May 9, 2023
    Assignees: International Business Machines Corporation, ULVAC. Inc.
    Inventors: John Rozen, Martin Michael Frank, Yohei Ogawa
  • Patent number: 11508438
    Abstract: Methods and systems for locating a filament in a resistive memory device are described. In an example, a device can acquire an image indicating an occurrence of photoemission from the resistive memory device. The device can determine a location of the filament in a switching medium of the resistive memory device using the acquired image.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: November 22, 2022
    Assignee: International Business Machines Corporation
    Inventors: Franco Stellari, Takashi Ando, Cyril Cabral, Jr., Eduard Albert Cartier, Martin Michael Frank, Peilin Song, Dirk Pfeiffer
  • Publication number: 20220328302
    Abstract: Embodiments of the present invention are directed to forming a ternary compound using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor includes a first metal and a first ligand. The second precursor includes a second metal and a second ligand. The second ligand is selected based on the first ligand to target a second metal uptake. A substrate is exposed to the first precursor during a first pulse of an ALD cycle and the substrate is exposed to the second precursor during a second pulse of the ALD cycle, the second pulse occurring after the first pulse. The substrate is exposed to a third precursor (e.g., an oxidant) during a third pulse of the ALD cycle. The ternary compound can include a ternary oxide film.
    Type: Application
    Filed: June 28, 2022
    Publication date: October 13, 2022
    Inventors: Martin Michael Frank, John Rozen, Yohei Ogawa
  • Patent number: 11462398
    Abstract: Embodiments of the present invention are directed to forming a ternary compound using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor includes a first metal and a first ligand. The second precursor includes a second metal and a second ligand. The second ligand is selected based on the first ligand to target a second metal uptake. A substrate is exposed to the first precursor during a first pulse of an ALD cycle and the substrate is exposed to the second precursor during a second pulse of the ALD cycle, the second pulse occurring after the first pulse. The substrate is exposed to a third precursor (e.g., an oxidant) during a third pulse of the ALD cycle. The ternary compound can include a ternary oxide film.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: October 4, 2022
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, ULVAC, INC
    Inventors: Martin Michael Frank, John Rozen, Yohei Ogawa
  • Publication number: 20220209113
    Abstract: A method for mitigating moisture driven degradation of silicon doped chalcogenides includes placing a silicon doped chalcogenide composition in a process chamber, passivating dangling silicon bonds of the silicon doped chalcogenide composition by flooding the process chamber with forming gas or with hydrogen plasma, purging the forming gas or the hydrogen plasma from the process chamber, and removing the passivated silicon doped chalcogenide composition from the process chamber.
    Type: Application
    Filed: December 29, 2020
    Publication date: June 30, 2022
    Inventors: Cheng-Wei Cheng, Huai-Yu Cheng, I-Ting Kuo, Robert L. Bruce, Martin Michael Frank, Hiroyuki Miyazoe
  • Publication number: 20220045270
    Abstract: A method of fabricating a synaptic device is provided. The method includes forming a channel layer between a first terminal and a second terminal. The channel layer varies in resistance based on a magnesium concentration in the channel layer. The method further includes forming an electrolyte layer. The electrolyte layer includes a magnesium ion conductive material. A third terminal is formed over the electrolyte layer and applies a signal to the electrolyte layer and the channel layer.
    Type: Application
    Filed: October 7, 2021
    Publication date: February 10, 2022
    Inventors: Douglas M. Bishop, Martin Michael Frank, Teodor Krassimirov Todorov
  • Patent number: 11201284
    Abstract: A method of fabricating a synaptic device is provided. The method includes forming a channel layer between a first terminal and a second terminal. The channel layer varies in resistance based on a magnesium concentration in the channel layer. The method further includes forming an electrolyte layer. The electrolyte layer includes a magnesium ion conductive material. A third terminal is formed over the electrolyte layer and applies a signal to the electrolyte layer and the channel layer.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: December 14, 2021
    Assignee: International Business Machines Corporation
    Inventors: Douglas M. Bishop, Martin Michael Frank, Teodor Krassimirov Todorov
  • Publication number: 20210305504
    Abstract: A method of fabricating a synaptic device is provided. The method includes forming a channel layer between a first terminal and a second terminal. The channel layer varies in resistance based on a magnesium concentration in the channel layer. The method further includes forming an electrolyte layer. The electrolyte layer includes a magnesium ion conductive material. A third terminal is formed over the electrolyte layer and applies a signal to the electrolyte layer and the channel layer.
    Type: Application
    Filed: March 24, 2020
    Publication date: September 30, 2021
    Inventors: Douglas M. Bishop, Martin Michael Frank, Teodor Krassimirov Todorov
  • Publication number: 20210272796
    Abstract: Embodiments of the present invention are directed to forming a sub-stoichiometric metal-oxide film using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor can include a metal and a first ligand. The second precursor can include the same metal and a second ligand. A substrate can be exposed to the first precursor during a first pulse of an ALD cycle. The substrate can be exposed to the second precursor during a second pulse of the ALD cycle. The second pulse can occur directly after the first pulse without an intervening thermal oxidant. The substrate can be exposed to the thermal oxidant during a third pulse of the ALD cycle.
    Type: Application
    Filed: May 18, 2021
    Publication date: September 2, 2021
    Inventors: John Rozen, Martin Michael Frank, Yohei Ogawa
  • Patent number: 11081343
    Abstract: Embodiments of the present invention are directed to forming a sub-stoichiometric metal-oxide film using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor can include a metal and a first ligand. The second precursor can include the same metal and a second ligand. A substrate can be exposed to the first precursor during a first pulse of an ALD cycle. The substrate can be exposed to the second precursor during a second pulse of the ALD cycle. The second pulse can occur directly after the first pulse without an intervening thermal oxidant. The substrate can be exposed to the thermal oxidant during a third pulse of the ALD cycle.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: August 3, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John Rozen, Martin Michael Frank, Yohei Ogawa
  • Publication number: 20210020426
    Abstract: Embodiments of the present invention are directed to forming a ternary compound using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor includes a first metal and a first ligand. The second precursor includes a second metal and a second ligand. The second ligand is selected based on the first ligand to target a second metal uptake. A substrate is exposed to the first precursor during a first pulse of an ALD cycle and the substrate is exposed to the second precursor during a second pulse of the ALD cycle, the second pulse occurring after the first pulse. The substrate is exposed to a third precursor (e.g., an oxidant) during a third pulse of the ALD cycle. The ternary compound can include a ternary oxide film.
    Type: Application
    Filed: July 17, 2019
    Publication date: January 21, 2021
    Inventors: Martin Michael Frank, John Rozen, Yohei Ogawa
  • Publication number: 20210020427
    Abstract: Embodiments of the present invention are directed to forming a sub-stoichiometric metal-oxide film using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor can include a metal and a first ligand. The second precursor can include the same metal and a second ligand. A substrate can be exposed to the first precursor during a first pulse of an ALD cycle. The substrate can be exposed to the second precursor during a second pulse of the ALD cycle. The second pulse can occur directly after the first pulse without an intervening thermal oxidant. The substrate can be exposed to the thermal oxidant during a third pulse of the ALD cycle.
    Type: Application
    Filed: July 19, 2019
    Publication date: January 21, 2021
    Inventors: John Rozen, Martin Michael Frank, Yohei Ogawa
  • Publication number: 20190245056
    Abstract: A circuit and method relating to a ferroelectric region free of extended grain boundaries through a thickness of ferroelectric film. The circuit includes an interlayer insulating film disposed on a semiconductor wafer; a first conductive film disposed on the interlayer insulating film; a ferroelectric film disposed on the first conductive film; a second conductive film disposed on the ferroelectric film; and a ferroelectric region patterned from the ferroelectric film, wherein the ferroelectric region is free of extended grain boundaries through a thickness of the ferroelectric film. The method includes depositing an interlayer insulating film over a semiconductor wafer; depositing a first conductive film over the interlayer insulating film; depositing a ferroelectric film over the first conductive film; depositing a second conductive film over the ferroelectric film; and forming a capacitor by patterning the first conductive film, the second conductive film, and the ferroelectric film.
    Type: Application
    Filed: February 2, 2018
    Publication date: August 8, 2019
    Inventors: John Bruley, Eduard Albert Cartier, Catherine Dubourdieu, Martin Michael Frank, Lucie Mazet, Vijay Narayanan
  • Publication number: 20150214323
    Abstract: An integrated circuit and method for forming an integrated circuit. There are at least three field-effect transistors with at least two of the field-effect transistors having the same electrically insulating material which is ferroelectric when unstrained or is capable of being ferroelectric when strain is induced. It is optional for the third field-effect transistor to have an electrically insulating material which is ferroelectric when unstrained or is capable of being ferroelectric when strain is induced. The at least three field-effect transistors are strained to varying amounts so that each of the three field-effect transistors has a threshold voltage, Vt, which is different from the Vt of the two other field-effect transistors.
    Type: Application
    Filed: April 8, 2015
    Publication date: July 30, 2015
    Inventors: Catherine Anne Dubourdieu, Martin Michael Frank, Vijay Narayanan