Abstract: A semiconductor read-only memory configuration in which two intermediate cell halves are directly adjacent to one another perpendicularly to the longitudinal direction of a word line and are periodically repeated in the longitudinal direction of the word line. In a first intermediate cell half, the polycrystalline silicon of the word lines is ruptured and a substrate contact is set, and in a second intermediate cell half, the polycrystalline silicon is refreshed. These intermediate cell halves are adjacent to one another, and the first and the second intermediate cell halves are alternately interchanged. Instead of requiring two intermediate cells, the semiconductor read-only memory configuration requires just one intermediate cell that includes the two intermediate cell halves which are used in an alternately mirrored manner.

Abstract: A semiconductor read-only memory configuration in which two intermediate cell halves are directly adjacent to one another perpendicularly to the longitudinal direction of a word line and are periodically repeated in the longitudinal direction of the word line. In a first intermediate cell half, the polycrystalline silicon of the word lines is ruptured and a substrate contact is set, and in a second intermediate cell half, the polycrystalline silicon is refreshed. These intermediate cell halves are adjacent to one another, and the first and the second intermediate cell halves are alternately interchanged. Instead of requiring two intermediate cells, the semiconductor read-only memory configuration requires just one intermediate cell that includes the two intermediate cell halves which are used in an alternately mirrored manner.