Patents by Inventor Masaaki Onomura
Masaaki Onomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12273101Abstract: A semiconductor device includes a first transistor, a first drive circuit including a second transistor, and a second drive circuit including a third transistor. The second transistor and the third transistor are connected in series; and a connection node of the second and third transistors is connected to a gate electrode of the first transistor. The first transistor, the second transistor, and the third transistor are normally-off MOS HEMTs formed in a first substrate that includes GaN. The first drive circuit charges a parasitic capacitance of the first transistor. The second drive circuit discharges the parasitic capacitance of the first transistor.Type: GrantFiled: February 10, 2023Date of Patent: April 8, 2025Assignees: Kabusbiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Toru Sugiyama, Noriaki Yoshikawa, Yasuhiko Kuriyama, Akira Yoshioka, Hitoshi Kobayashi, Hung Hung, Yasuhiro Isobe, Tetsuya Ohno, Hideki Sekiguchi, Masaaki Onomura
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Publication number: 20240322027Abstract: A conductor layer is positioned between a gate electrode and a drain electrode. The conductor layer contacts a nitride semiconductor layer. The conductor layer is electrically connected with the drain electrode. The drain electrode includes a first part contacting the nitride semiconductor layer, and a second part positioned further toward the conductor layer side than the first part in a first direction. An insulating film includes a portion positioned between the conductor layer and the drain electrode. The second part is located on the portion of the insulating film.Type: ApplicationFiled: August 23, 2023Publication date: September 26, 2024Inventors: Hitoshi KOBAYASHI, Masaaki ONOMURA, Toru SUGIYAMA, Akira YOSHIOKA, Yasuhiro ISOBE, Tetsuya OHNO, Hideki SEKIGUCHI, Hung HUNG, Yorito KAKIUCHI
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Patent number: 12062651Abstract: A semiconductor device according to an embodiment includes: a first nitride semiconductor layer having a first surface and a second surface; a first source electrode provided on the first surface; a first drain electrode provided on the first surface; a first gate electrode provided on the first surface between the first source electrode and the first drain electrode; a second nitride semiconductor layer having a third surface and a fourth surface, the third surface being provided on the second surface and facing the second surface, and the second nitride semiconductor layer having a smaller band gap than the first nitride semiconductor layer; and a first semiconductor device having a fifth surface provided on the fourth surface and facing the fourth surface with a size equal to or smaller than a size of the fourth surface, the first semiconductor device including a first semiconductor material having a smaller band gap than the second nitride semiconductor layer.Type: GrantFiled: September 7, 2021Date of Patent: August 13, 2024Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Yasuhiro Isobe, Hung Hung, Akira Yoshioka, Toru Sugiyama, Hitoshi Kobayashi, Tetsuya Ohno, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura
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Patent number: 12046668Abstract: A semiconductor device includes: a drain electrode including a plurality of drain finger parts; a source electrode including a plurality of source finger parts and a Kelvin source part electrically connected with the source finger parts; a sense electrode positioned between a drain finger part and the Kelvin source part, which are next to each other in a particular direction; and a gate electrode positioned between a drain finger part and a source finger part, which are next to each other in the particular direction, and between a drain finger part and the sense electrode, which are next to each other in the particular direction. The sense electrode and the Kelvin source part are electrically connected via a sense resistance due to a spacing between the sense electrode and the Kelvin source part in the particular direction.Type: GrantFiled: September 12, 2022Date of Patent: July 23, 2024Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Toru Sugiyama, Akira Yoshioka, Hitoshi Kobayashi, Masaaki Onomura, Yasuhiro Isobe, Hung Hung, Hideki Sekiguchi, Tetsuya Ohno
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Publication number: 20240105826Abstract: A semiconductor device of an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first electrode film provided on the first insulating film, a second electrode film provided on the first electrode film, and a first field plate electrode provided on the second electrode film. A lower end of the first field plate electrode is located on a second surface of the first electrode film, the second surface being in contact with the second electrode film, rather than a first surface of the first electrode film, the first surface being in contact with the first insulating film.Type: ApplicationFiled: March 1, 2023Publication date: March 28, 2024Inventors: Hitoshi KOBAYASHI, Masaaki ONOMURA, Toru SUGIYAMA, Akira YOSHIOKA, Hung HUNG, Hideki SEKIGUCHI, Tetsuya OHNO, Yasuhiro ISOBE
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Publication number: 20240105563Abstract: A semiconductor device includes a nitride semiconductor element, a first diode, and a second diode; the nitride semiconductor element includes a conductive mounting bed, a semiconductor substrate formed on the mounting bed, a first nitride semiconductor layer, a second nitride semiconductor layer, a first major electrode, a second major electrode, a first gate electrode, and a second gate electrode; the first diode includes a first anode electrode electrically connected to the mounting bed, and a first cathode electrode electrically connected to the first major electrode; and the second diode includes a second anode electrode electrically connected to the mounting bed, and a second cathode electrode electrically connected to the second major electrode.Type: ApplicationFiled: March 9, 2023Publication date: March 28, 2024Inventors: Toru SUGIYAMA, Akira YOSHIOKA, Hitoshi KOBAYASHI, Hung HUNG, Yasuhiro ISOBE, Hideki SEKIGUCHI, Tetsuya OHNO, Masaaki ONOMURA
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Publication number: 20240097671Abstract: A semiconductor device includes a first transistor, a first drive circuit including a second transistor, and a second drive circuit including a third transistor. The second transistor and the third transistor are connected in series; and a connection node of the second and third transistors is connected to a gate electrode of the first transistor. The first transistor, the second transistor, and the third transistor are normally-off MOS HEMTs formed in a first substrate that includes GaN. The first drive circuit charges a parasitic capacitance of the first transistor. The second drive circuit discharges the parasitic capacitance of the first transistor.Type: ApplicationFiled: February 10, 2023Publication date: March 21, 2024Inventors: Toru SUGIYAMA, Noriaki YOSHIKAWA, Yasuhiko KURIYAMA, Akira YOSHIOKA, Hitoshi KOBAYASHI, Hung HUNG, Yasuhiro ISOBE, Tetsuya OHNO, Hideki SEKIGUCHI, Masaaki ONOMURA
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Publication number: 20230290871Abstract: A semiconductor device includes: a drain electrode including a plurality of drain finger parts; a source electrode including a plurality of source finger parts and a Kelvin source part electrically connected with the source finger parts; a sense electrode positioned between a drain finger part and the Kelvin source part, which are next to each other in a particular direction; and a gate electrode positioned between a drain finger part and a source finger part, which are next to each other in the particular direction, and between a drain finger part and the sense electrode, which are next to each other in the particular direction. The sense electrode and the Kelvin source part are electrically connected via a sense resistance due to a spacing between the sense electrode and the Kelvin source part in the particular direction.Type: ApplicationFiled: September 12, 2022Publication date: September 14, 2023Inventors: Toru SUGIYAMA, Akira YOSHIOKA, Hitoshi KOBAYASHI, Masaaki ONOMURA, Yasuhiro ISOBE, Hung HUNG, Hideki SEKIGUCHI, Tetsuya OHNO
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Publication number: 20230031562Abstract: A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor including a first electrode, a second electrode, and a first control electrode, a normally-on transistor including a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first diode including a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a Zener diode including a second anode electrically connected to the first electrode and a second cathode electrically connected to the second electrode; a first terminal provided on the semiconductor package, the first terminal being electrically connected to the first electrode; a plurality of second terminals provided on the semiconductor package, the second terminals being electrically connected to the first electrode, and the second terminals being lined up in a first direction; a third terminal provided on tType: ApplicationFiled: October 18, 2022Publication date: February 2, 2023Inventors: Toru Sugiyama, Akira Yoshioka, Hung Hung, Yasuhiro Isobe, Hitoshi Kobayashi, Tetsuya Ohno, Naonori Hosokawa, Masaaki Onomura, Masaaki Iwai
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Patent number: 11508647Abstract: A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor, a normally-on transistor, a first diode, and a Zener diode; a first terminal provided on the semiconductor package; a plurality of second terminals provided on the semiconductor package, and the second terminals being lined up in a first direction; a third terminal provided on the semiconductor package; a plurality of fourth terminals provided on the semiconductor package; and a plurality of fifth terminals provided on the semiconductor package, and the fifth terminals being lined up in the first direction.Type: GrantFiled: March 10, 2021Date of Patent: November 22, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Toru Sugiyama, Akira Yoshioka, Hung Hung, Yasuhiro Isobe, Hitoshi Kobayashi, Tetsuya Ohno, Naonori Hosokawa, Masaaki Onomura, Masaaki Iwai
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Publication number: 20220293745Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer provided on the first nitride semiconductor layer, the second nitride semiconductor layer having a band gap larger than the first nitride semiconductor layer, a first electrode provided on the second nitride semiconductor layer, a second electrode provided on the second nitride semiconductor layer, a first insulating film provided between the first electrode and the second electrode on the second nitride semiconductor layer, the first insulating film being in connect with the second nitride semiconductor layer and including a first insulating material, a second insulating film provided on the second nitride semiconductor layer between the first electrode and the first insulating film, on the first insulating film, and on the second nitride semiconductor layer between the first insulating film and the second electrode, the second insulating film including a second insulating material, a third electrode proType: ApplicationFiled: September 7, 2021Publication date: September 15, 2022Inventors: Yasuhiro ISOBE, Hung HUNG, Akira YOSHIOKA, Toru SUGIYAMA, Masaaki ONOMURA
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Publication number: 20220140731Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is denoType: ApplicationFiled: January 19, 2022Publication date: May 5, 2022Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Akira YOSHIOKA, Toru SUGIYAMA, Masaaki IWAI, Naonori HOSOKAWA, Masaaki ONOMURA, Hung HUNG, Yasuhiro ISOBE
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Patent number: 11290100Abstract: Provided is a semiconductor device including a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode, a fourth electrode, and a second control electrode, a first capacitor having a first end and a second end, a Zener diode having a first anode and a first cathode, a first resistor having a third end and a fourth end, a first diode having a second anode and a second cathode, a second resistor having a fifth end and a sixth end, a second diode having a third anode and a third cathode, and a second capacitor having a seventh end and an eighth end.Type: GrantFiled: September 4, 2020Date of Patent: March 29, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hitoshi Kobayashi, Tetsuya Ohno
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Publication number: 20220084916Abstract: A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor including a first electrode, a second electrode, and a first control electrode, a normally-on transistor including a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first diode including a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a Zener diode including a second anode electrically connected to the first electrode and a second cathode electrically connected to the second electrode; a first terminal provided on the semiconductor package, the first terminal being electrically connected to the first electrode; a plurality of second terminals provided on the semiconductor package, the second terminals being electrically connected to the first electrode, and the second terminals being lined up in a first direction; a third terminal provided on tType: ApplicationFiled: March 10, 2021Publication date: March 17, 2022Inventors: Toru Sugiyama, Akira Yoshioka, Hung Hung, Yasuhiro Isobe, Hitoshi Kobayashi, Tetsuya Ohno, Naonori Hosokawa, Masaaki Onomura, Masaaki Iwai
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Publication number: 20220077131Abstract: A semiconductor device according to an embodiment includes: a first nitride semiconductor layer having a first surface and a second surface; a first source electrode provided on the first surface; a first drain electrode provided on the first surface; a first gate electrode provided on the first surface between the first source electrode and the first drain electrode; a second nitride semiconductor layer having a third surface and a fourth surface, the third surface being provided on the second surface and facing the second surface, and the second nitride semiconductor layer having a smaller band gap than the first nitride semiconductor layer; and a first semiconductor device having a fifth surface provided on the fourth surface and facing the fourth surface with a size equal to or smaller than a size of the fourth surface, the first semiconductor device including a first semiconductor material having a smaller band gap than the second nitride semiconductor layer.Type: ApplicationFiled: September 7, 2021Publication date: March 10, 2022Inventors: Yasuhiro ISOBE, Hung HUNG, Akira YOSHIOKA, Toru SUGIYAMA, Hitoshi KOBAYASHI, Tetsuya OHNO, Masaaki IWAI, Naonori HOSOKAWA, Masaaki ONOMURA
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Patent number: 11264899Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is denoType: GrantFiled: January 17, 2020Date of Patent: March 1, 2022Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hung Hung, Yasuhiro Isobe
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Patent number: 11251298Abstract: A semiconductor device of an embodiment includes: a first nitride semiconductor layer of a first conductive type; a second nitride semiconductor layer which is the first conductive type and is provided on the first nitride semiconductor layer; a third nitride semiconductor layer which is a second conductive type and is provided on the second nitride semiconductor layer; a fourth nitride semiconductor layer which is the first conductive type and is provided on the third nitride semiconductor layer; and a first electrode provided in a trench provided in the second nitride semiconductor layer, the third nitride semiconductor layer, and the fourth nitride semiconductor layer, via a first insulating film.Type: GrantFiled: February 25, 2020Date of Patent: February 15, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Yasuhiro Isobe, Hung Hung, Masaaki Onomura
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Publication number: 20210194475Abstract: Provided is a semiconductor device including: a normally-off transistor having a first electrode, a second electrode, and a first control electrode; a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode; a first capacitor having a first end and a second end electrically connected to the second control electrode; a Zener diode having a first anode and a first cathode, the first anode being electrically connected to the second end and the second control electrode, and the first cathode being electrically connected to the third electrode; a first resistor having a third end and a fourth end electrically connected to the first control electrode; a first diode having a second anode and a second cathode, the second anode being electrically connected to the third end; a second resistor having a fifth end electrically connected to the second cathode and a sixth end electrically connected to the fourth end and the first contType: ApplicationFiled: September 4, 2020Publication date: June 24, 2021Inventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hitoshi Kobayashi, Tetsuya Ohno
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Patent number: 10998433Abstract: A semiconductor device of an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer placed on the first nitride semiconductor layer; a first electrode placed on the second nitride semiconductor layer; a second electrode placed on the first nitride semiconductor layer; a gate electrode placed between the first electrode and the second electrode; a first field plate electrode placed on the second nitride semiconductor layer, the first field plate electrode having the same height as the gate electrode; and a second field plate electrode provided on an upper side of the first field plate electrode, the second field plate electrode being placed on a side of the second electrode compared to the first field plate electrode.Type: GrantFiled: September 3, 2019Date of Patent: May 4, 2021Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura
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Publication number: 20210083577Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is denoType: ApplicationFiled: January 17, 2020Publication date: March 18, 2021Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Akira YOSHIOKA, Toru SUGIYAMA, Masaaki IWAI, Naonori HOSOKAWA, Masaaki ONOMURA, Hung HUNG, Yasuhiro ISOBE