Patents by Inventor Masafumi Asano

Masafumi Asano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080147226
    Abstract: A management system includes a variable-period setting unit that sets a variable period in which quality-control values vary. Then, a retrieving unit retrieves events sandwiching the variable period. The events can be a maintenance of the semiconductor manufacturing device and/or a change of a correction value. An analysis-period setting unit sets an analysis period for analyzing a cause of variation of the quality-control values between the events retrieved by the retrieving unit.
    Type: Application
    Filed: December 19, 2007
    Publication date: June 19, 2008
    Inventors: Hiroshi MATSUSHITA, Junji Sugamoto, Masafumi Asano
  • Publication number: 20080134131
    Abstract: A method of making a simulation model, includes specifying a feature factor which characterizes a pattern layout of a mask pattern, specifying a control factor which affects a dimension of a resist pattern to be formed on a substrate by means of a lithography process using the mask pattern, determining a predicted dimension of the resist pattern to be formed on the substrate by means of the lithography process using the mask pattern through the use of a model based on the feature and control factors, obtaining an actual dimension of the resist pattern actually formed on the substrate by means of the lithography process using the mask pattern, and setting the feature and control factors and the predicted dimension as input layers and setting the actual dimension as an output layer to construct a neural network.
    Type: Application
    Filed: October 19, 2007
    Publication date: June 5, 2008
    Inventors: Masafumi Asano, Masaki Satake, Satoshi Tanaka
  • Publication number: 20070276528
    Abstract: According to the present, there is proved a semiconductor fabrication apparatus management system having: a sensor which monitors and outputs a plurality of apparatus parameters of a semiconductor fabrication apparatus which fabricates a semiconductor device; a measurement unit which measures a dimensional value of the semiconductor device, and outputs the dimensional value as dimensional data; an apparatus parameter storage unit which stores the apparatus parameters; a dimensional data storage unit which stores the dimensional data; an apparatus parameter controller which calculates predicted dimensional data by extracting the dimensional data from the dimensional data storage unit, and controls at least one of the plurality of apparatus parameters on the basis of the predicted dimensional data; and an abnormality factor extraction unit which analyzes correlations between the controlled apparatus parameter and other apparatus parameters, and extracts an abnormal apparatus parameter on the basis of a calcu
    Type: Application
    Filed: March 28, 2007
    Publication date: November 29, 2007
    Inventors: Hiroshi Matsushita, Junji Sugamoto, Masafumi Asano
  • Publication number: 20070259280
    Abstract: A photomask transferring a light shield film pattern formed on a transparent substrate by a projection exposure apparatus, comprising a circuit pattern for transferring a predetermined pattern to a resist film, and an exposure monitor mark, the exposure monitor mark being formed in a manner that blocks having a predetermined width p, which are not resolved by the projection exposure apparatus, are intermittently or continuously arrayed along one direction, light shield and transmission portions are arrayed along one direction in each of the blocks, the blocks are arrayed so that a dimension ratio of the light shield and transmission portions of the blocks simply changes and the phase difference of exposure light passing through adjacent light transmission portions is approximately 180°.
    Type: Application
    Filed: June 27, 2007
    Publication date: November 8, 2007
    Inventors: Tadahito Fujisawa, Soichi Inoue, Satoshi Tanaka, Masafumi Asano
  • Publication number: 20070254386
    Abstract: A measurement coordinate setting system is disclosed, which includes a measuring apparatus which measures a dimension in each of a plurality of portions of a first product, a sampling approximation module which approximates a distribution of the dimensions of the plurality of portions using a sampling orthogonal polynomial as a function of a coordinate, and a selection coordinate setting module which sets a plurality of selection coordinates at which dimensions of a second product are to be measured to inspect the approximated distribution of the dimensions regarding the second product.
    Type: Application
    Filed: April 10, 2007
    Publication date: November 1, 2007
    Inventor: Masafumi Asano
  • Publication number: 20070225853
    Abstract: A method for controlling a semiconductor manufacturing apparatus for processing wafers divided for each lot, has acquiring quality control value data group containing quality control value data of wafers in a plurality of lots previously processed, and an equipment engineering system parameter group containing equipment engineering system parameters corresponding to the wafers; creating a prediction formula of quality control value data, acquiring a first equipment engineering system parameters; inputting the first equipment engineering system parameters to the prediction formula, and performing calculation to predict first quality control value data of the wafers in the first lot; determining processing of the wafers corresponding to the first quality control value data; acquiring measured first quality control value data of the wafers in the first lot; replacing the quality control value data corresponding to the wafers in the first processed lot; updating the prediction formula.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 27, 2007
    Inventors: Hiroshi Matsushita, Junji Sugamoto, Masafumi Asano
  • Publication number: 20070212801
    Abstract: A system for adjusting a manufacturing equipment includes a measurement equipment configured to measure a plurality of sizes of portions of a product on a plane, an approximation module configured to approximate a planar distribution of the plurality of sizes by an orthogonal polynomial. as a function of coordinates on the plane, an association module configured to associate a plurality of terms in the orthogonal polynomial with a plurality of equipment parameters of the manufacturing equipment, respectively, the manufacturing equipment manufacturing the product, and an adjusting module configured to adjust the plurality of equipment parameters to reduce a plurality of distribution components, the plurality of distribution components composing the planar distribution approximated by the orthogonal polynomial.
    Type: Application
    Filed: February 21, 2007
    Publication date: September 13, 2007
    Inventors: Masahiro Kanno, Masafumi Asano
  • Patent number: 7250235
    Abstract: A focus monitor method comprising preparing a mask comprising a first and second focus monitor patterns and an exposure monitor pattern, the focus monitor patterns being used to form first and second focus monitor marks on a wafer, and the exposure monitor pattern being used to form exposure meters on the wafer, obtaining a exposure dependency of a relationship between a dimensions of the focus monitor marks and the defocus amount, forming the focus monitor marks and exposure monitor mark on the wafer, measuring a dimension of the exposure monitor mark to obtain an effective exposure, selecting a relationship between the dimensions of the focus monitor marks and the defocus amount corresponding to the effective exposure, measuring a dimensions of the first and second focus monitor marks, and obtaining a defocus amount in accordance with the measured dimensions of the focus monitor marks and the selected relationship.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: July 31, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kyoko Izuha, Masafumi Asano, Tadahito Fujisawa
  • Publication number: 20070105028
    Abstract: A reticle set, includes a first photomask having a circuit pattern provided with first and second openings provided adjacent to each other sandwiching a first opaque portion, and a monitor mark provided adjacent to the circuit pattern; and a second photomask having a trim pattern provided with a second opaque portion covering the first opaque portion in an area occupied by the circuit pattern and an extending portion connected to one end of the first opaque portion and extending outside the area when the second photomask is aligned with a pattern delineated on a substrate by the first photomask.
    Type: Application
    Filed: December 28, 2006
    Publication date: May 10, 2007
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masafumi Asano, Tadahito Fujisawa, Satoshi Tanaka
  • Patent number: 7184913
    Abstract: A testing system includes a testing device configured to test product characteristics of a first sample by sampling the first sample from a population; a main storage device configured to store analysis information and testing information, the testing information includes a confidence interval tolerance of the first sample; an analysis module configured to analyze at least one of statistical data and a confidence interval of a mean value of the population, based on the analysis information; and a calculation module configured to calculate a first sampling number of the first sample, based on results of the analysis module.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: February 27, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masafumi Asano
  • Patent number: 7175943
    Abstract: A reticle set, includes a first photomask having a circuit pattern provided with first and second openings provided adjacent to each other sandwiching a first opaque portion, and a monitor mark provided adjacent to the circuit pattern; and a second photomask having a trim pattern provided with a second opaque portion covering the first opaque portion in an area occupied by the circuit pattern and an extending portion connected to one end of the first opaque portion and extending outside the area when the second photomask is aligned with a pattern delineated on a substrate by the first photomask.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: February 13, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masafumi Asano, Tadahito Fujisawa, Satoshi Tanaka
  • Publication number: 20060226053
    Abstract: A system of testing semiconductor devices includes a classification module configured to classify a plurality of lots into a plurality of groups; an apparatus assignment module configured to assign a plurality of testing apparatuses to each of the groups; and a test recipe creation module configured to create a test recipe to test defects in a second group other than a first group specified in the groups, the test recipe including a definition of testing positions in the second group defined by a rule different from the first group.
    Type: Application
    Filed: March 14, 2006
    Publication date: October 12, 2006
    Inventor: Masafumi Asano
  • Patent number: 7103503
    Abstract: A testing system includes a testing device configured to test product characteristics of a first sample by sampling the first sample from a population; a main storage device configured to store analysis information and testing information, the testing information includes a confidence interval tolerance of the first sample; an analysis module configured to analyze at least one of statistical data and a confidence interval of a mean value of the population, based on the analysis information; and a calculation module configured to calculate a first sampling number of the first sample, based on results of the analysis module.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: September 5, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masafumi Asano
  • Publication number: 20060167653
    Abstract: A testing system includes a testing device configured to test product characteristics of a first sample by sampling the first sample from a population; a main storage device configured to store analysis information and testing information, the testing information includes a confidence interval tolerance of the first sample; an analysis module configured to analyze at least one of statistical data and a confidence interval of a mean value of the population, based on the analysis information; and a calculation module configured to calculate a first sampling number of the first sample, based on results of the analysis module.
    Type: Application
    Filed: March 24, 2006
    Publication date: July 27, 2006
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Masafumi Asano
  • Publication number: 20060161385
    Abstract: A testing system includes a testing device configured to test product characteristics of a first sample by sampling the first sample from a population; a main storage device configured to store analysis information and testing information, the testing information includes a confidence interval tolerance of the first sample; an analysis module configured to analyze at least one of statistical data and a confidence interval of a mean value of the population, based on the analysis information; and a calculation module configured to calculate a first sampling number of the first sample, based on results of the analysis module.
    Type: Application
    Filed: March 17, 2006
    Publication date: July 20, 2006
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Masafumi Asano
  • Publication number: 20060035158
    Abstract: A process control method includes forming an inspection pattern having a first line and a plurality of second lines being parallel with the first line, and a reference pattern being in the orthogonal direction to the direction in which the first line extends, flowing the inspection pattern and the reference pattern measuring the distance between the center of the inspection and the reference pattern after flowing the inspection and the reference pattern, and checking the magnitude of variation in increases of line widths of the inspection and the reference pattern after the flowing the inspection and the reference pattern.
    Type: Application
    Filed: August 8, 2005
    Publication date: February 16, 2006
    Inventor: Masafumi Asano
  • Publication number: 20050244724
    Abstract: A method for evaluating a pattern formation process includes applying a photoresist on a substrate, transferring a first pattern and a second pattern adjacent to or at least partly overlapped with each other to the photoresist, wherein the first pattern includes a plurality of lines consisting of transparent regions, having the same length and a line-width less than or on the order of wavelengths of visible light, periodically located parallel to one another with end portions aligned on both sides thereof, and the second pattern comprises a transparent region having a larger area compared with each of the lines, and determining, in a first pattern formed on the substrate with the first pattern transferred to the photoresist, by an optical means, an amount of shorting of the lines in a direction parallel to the line.
    Type: Application
    Filed: April 19, 2005
    Publication date: November 3, 2005
    Inventors: Masafumi Asano, Kazuya Fukuhara
  • Patent number: 6919153
    Abstract: There is disclosed a dose monitor method comprising illuminating a mask with illumination light, which is disposed in a projection exposure apparatus and in which a dose monitor pattern is formed, passing only a 0th-order diffracted light through a pupil surface of the projection exposure apparatus in diffracted lights of the dose monitor pattern, and transferring a 0th-order diffracted light image of the dose monitor pattern onto a substrate to measure dose, wherein during the illuminating, a center of gravity of the 0th-order diffracted light image passed through the dose monitor pattern on the pupil surface of the projection exposure apparatus is shifted from an optical axis of the projection exposure apparatus.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: July 19, 2005
    Assignee: Kabushiki Kaisaha Toshiba
    Inventors: Tadahito Fujisawa, Soichi Inoue, Takashi Sato, Masafumi Asano
  • Patent number: 6866976
    Abstract: A monitoring method, includes: delineating a monitor resist pattern on an underlying film, the monitor resist pattern having a tilted sidewall slanted to a surface of the underlying film at least at one edge of the monitor resist pattern; measuring a width of the monitor resist pattern in an orthogonal direction to a cross line of the tilted sidewall intersecting with the underlying film; delineating a monitor underlying film pattern by selectively etching the underlying film using the monitor resist pattern as a mask; measuring a width of the monitor underlying film pattern in the orthogonal direction; and obtaining a shift width in the monitor underlying film pattern from a difference between the width of the monitor resist pattern and the width of the monitor underlying film pattern.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: March 15, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masafumi Asano, Nobuhiro Komine, Soichi Inoue
  • Publication number: 20050048378
    Abstract: A reticle has a mask substrate, a test pattern established on the mask substrate having an asymmetrical diffraction grating so as to generate positive first order diffracting light and negative first order diffracting light in different diffraction efficiencies, and a device pattern adjacent to the test pattern established on the mask substrate.
    Type: Application
    Filed: July 14, 2004
    Publication date: March 3, 2005
    Inventors: Takashi Sato, Masafumi Asano, Hideki Kanai