Patents by Inventor Masafumi Hashimoto

Masafumi Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6593599
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1−xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1−xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1−xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semic
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: July 15, 2003
    Assignees: Japan Science and Technology Corporation, Toyoda Gosei Co., Ltd., Nagoya University
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Patent number: 6472690
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1−xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1−xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1−xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semic
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: October 29, 2002
    Assignees: Toyoda Gosei Co., Ltd., Nagoya University, Japan Science and Technology Corporation
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Patent number: 6472689
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1−xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1−xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1−xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semic
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: October 29, 2002
    Assignees: Toyoda Gosei Co., Ltd., Nagoya University, Japan Science and Technology Corporation
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Publication number: 20020060326
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1-xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1-xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1-xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semiconductor (AlxGa1-x
    Type: Application
    Filed: January 23, 2002
    Publication date: May 23, 2002
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Patent number: 6362017
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1−xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1−xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1−xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semic
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: March 26, 2002
    Assignees: Toyoda Gosei Co., Ltd., Nagoya University, Japan Science and Technology Corporation
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Publication number: 20020017857
    Abstract: A flat-type light-emitting device having an approximately even distribution of the light intensity is provided without luminance degradation. This device comprises (a) an envelope having an inner space and an inner surface; the inner space being filled with a discharge medium; (b) a phosphor layer formed in the inner space of the envelope; (c) a first electrode formed on the inner surface of the envelope; the first electrode including linear parts; each of the linear parts having branches apart from each other at a first gap; and (d) a second electrode formed on the inner surface of the envelope adjacent to the first electrode; the second electrode including linear parts; each of the linear parts having branches apart from each other at a second gap. The linear parts of the first electrode and the linear parts of the second electrode are arranged alternately in the direction.
    Type: Application
    Filed: July 26, 2001
    Publication date: February 14, 2002
    Applicant: NEC Corporation
    Inventors: Masafumi Hashimoto, Maki Minamoto, Hisashi Yoshida
  • Patent number: 6249012
    Abstract: A semiconductor device having an n-type layer of gallium nitride that is doped with silicon and has a resistively ranging from 3×10−1 &OHgr;cm to 8×10−3 &OHgr;cm or a carrier concentration ranging from 6×1016/cm3 to 3×1018/cm3.
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: June 19, 2001
    Assignees: Toyoda Gosei Co., Ltd., Nagoya University, Japan Science and Technology Corporation
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Patent number: 5733796
    Abstract: A light-emitting semiconductor device using a gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N) having an i.sub.L -layer of insulating gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N, inclusive of x=0) containing a low concentration of p-type impurities. An i.sub.H -layer of insulating gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N, inclusive of x=0) containing a high concentration of p-type impurities is adjacent to the i.sub.L -layer. An n-layer of n-type gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N, inclusive of x=0) of low carrier concentration is adjacent to the i.sub.L -layer. An n.sup.+ -layer of n-type gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N, inclusive of x=0) of high carrier concentration doped with n-type impurities is adjacent to the n-layer.
    Type: Grant
    Filed: November 9, 1995
    Date of Patent: March 31, 1998
    Assignees: Toyoda Gosei Co., Ltd., Kabushiki Kaisha Toyota Chuo Kenkyusho, Nagoya University, Research Development Corporation of Japan
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Patent number: 5408120
    Abstract: A light-emitting diode of GaN compound semiconductor emits a blue light from a plane rather than dots for improved luminous intensity. This diode includes a first electrode associated with a high-carrier density n.sup.+ layer and a second electrode associated with a high-impurity density i.sub.H -layer. These electrodes are made up of a first Ni layer (110 .ANG. thick), a second Ni layer (1000 .ANG. thick), an Al layer (1500 .ANG. thick), a Ti layer (1000 .ANG. thick), and a third Ni layer (2500 .ANG. thick). The Ni layers of dual structure permit a buffer layer to be formed between them. This buffer layer prevents the Ni layer from peeling. The direct contact of the Ni layer with GaN lowers a drive voltage for light emission and increases luminous intensity.
    Type: Grant
    Filed: January 22, 1993
    Date of Patent: April 18, 1995
    Assignees: Toyoda Gosei Co., Ltd., Kabushiki Kaisha Toyota Chuo Kenkyusho
    Inventors: Katsuhide Manabe, Masahiro Kotaki, Makoto Tamaki, Masafumi Hashimoto
  • Patent number: 5278433
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N) in which the n-layer of n-type gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N) is of double-layer structure including an n-layer of low carrier concentration and an n.sup.+ -layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an i.sub.L -layer of low impurity concentration containing p-type impurities in comparatively low concentration and an i.sub.
    Type: Grant
    Filed: August 7, 1992
    Date of Patent: January 11, 1994
    Assignees: Toyoda Gosei Co., Ltd., Kabushiki Kaisha Toyota Chuo Kenkyusho, Nagoya University, Research Development Corporation of Japan
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Patent number: 5205905
    Abstract: A dry etching method for Al.sub.x Ga.sub.1-x N (0.ltoreq.x.ltoreq.1) semiconductor uses plasma of a boron trichloride (BCl.sub.3) gas. The etching rate of the method is 490 .ANG./min. No crystal defect is produced in the etched semiconductor by the dry etching with the plasma of a BCl.sub.3 gas. After etching with the plasma of a BCl.sub.3 gas, the semiconductor is successively etched by an inert gas. The electrode formed on the etched surface is contacted ohmicly with the semiconductor. Ohmic contact can be obtained without sintering. An LED is produced by the dry etching method. The LED comprises a substrate, an n-layer (Al.sub.x Ga.sub.1-x N; 0.ltoreq.x<1), an i-layer, an electrode formed on the etched surface of the n-layer through a through hole, the through hole being formed through the i-layer to the n-layer by the dry etching with the plasma of the born trichloride (BCl.sub.3) gas and being successively etched by the plasma of an inert gas, and an electrode formed on the surface of said i-layer.
    Type: Grant
    Filed: May 30, 1991
    Date of Patent: April 27, 1993
    Assignees: Toyoda Gosei Co., Ltd., Kabushiki Kaisha Toyota Chuo Kenkyusho
    Inventors: Masahiro Kotaki, Katsuhide Manabe, Masaki Mori, Masafumi Hashimoto
  • Patent number: 4946548
    Abstract: A dry etching method for Al.sub.x Ga.sub.1-x N(0.ltoreq.x.ltoreq.1) semiconductor is disclosed. The method includes a first method using plasma of carbon tetrachloride (CCl.sub.4) gas, and a second method using plasma of dichlorodifluoromethane (CCl.sub.2 F.sub.2) gas. The etching speed of the former method was 430 .ANG./min. and the etching speed of the latter method was 625 .ANG./min. Also, no crystal defect was produced in the above-mentioned semiconductor by the above-mentioned etching.
    Type: Grant
    Filed: April 17, 1989
    Date of Patent: August 7, 1990
    Assignees: Toyoda Gosei Co., Ltd., Kabushiki Kaisha Toyota Chuo Kenkyusho, Research Development Corporation of Japan
    Inventors: Masahiro Kotaki, Masafumi Hashimoto
  • Patent number: 4925810
    Abstract: A compound semiconductor device comprises a substrate formed from a single crystal of silicon, a layer of an insulator formed on a portion of a surface of the substrate, at least one layer of a high resistance compound semiconductor formed on the insulator layer, and at least one layer of a single crystal of a compound semiconductor formed on a different portion of the substrate surface from the insulator layer. The device can be manufactured by forming an insulator layer on one portion of a surface of a single crystal silicon substrate, and growing a compound semiconductor by epitaxy on the insulator layer and on the different portion from the insulator layer. One of useful applications is a hybrid semiconductor device having a compound semiconductor formed from e.g. GaAs on a silicon substrate.
    Type: Grant
    Filed: August 24, 1989
    Date of Patent: May 15, 1990
    Assignee: Kabushiki Kaisha Toyota Chuo Kenkyusho
    Inventors: Hiroyuki Kano, Takatoshi Kato, Masafumi Hashimoto
  • Patent number: 4816878
    Abstract: A semiconductor device having a superlattice structure, which comprises at least one unit structure including first and third semiconductor layers as quantum well layers, and a second semiconductor layer as a barrier layer, which are arranged alternately on each other is described. The first semiconductor layer has a higher impurity concentration than the third semiconductor layer and has a quantum energy level determined by its thickness. The third semiconductor layer is of a thickness having quantum energy levels, one of which is lower than that of the first semiconductor layer and the second of which is equal to or higher than that of the first semiconductor layer. The second semiconductor layer is of a thickness which allows electrons existing at the second quantum energy level of the third semiconductor layer to transfer easily from the third to the first semiconductor layer.
    Type: Grant
    Filed: November 13, 1986
    Date of Patent: March 28, 1989
    Assignee: Kabushiki Kaisha Toyota Chuo Kenkyusho
    Inventors: Hiroyuki Kano, Masafumi Hashimoto, Nobuhiko Sawaki
  • Patent number: 4804988
    Abstract: In an instant film pack of the type comprising a parallelepipedal housing having a top wall in which an exposure aperture is formed and a front end wall with a film unit exit slot through which an instant film unit is withdrawn. A supporting member is provided to prevent the film unit from being improperly withdrawn. The supporting member comprises a pair of resilient arms attached to the bottom of the film pack at the front end and extending in the direction of withdrawal of the film unit. The resilient arms are so formed as to extend close to the juncture of the front end of a guide member and an edge controller disposed in a pack holder in which the film pack is loaded for use.
    Type: Grant
    Filed: October 13, 1987
    Date of Patent: February 14, 1989
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Masafumi Hashimoto, Minoru Ono
  • Patent number: 4316208
    Abstract: A light-emitting semiconductor device of the type having a substrate, a first layer of a semiconductor on the substrate and a second layer of a different conductivity on the first layer. The second layer is selectively voided so as to give a recess and leave the first layer uncovered in a region serving as the bottom of the recess. An ohmic electrode layer is selectively formed on the second layer so as to extend into the recess and contact with the uncovered region of the first layer, and another ohmic electrode layer is selectively formed on the second layer so as to be separated from the former electrode layer. A solder bump is built up on the first electrode layer to fill up the recess and another solder bump on the second electrode layer so as to be separated from the former solder bump.
    Type: Grant
    Filed: May 30, 1980
    Date of Patent: February 16, 1982
    Assignee: Matsushita Electric Industrial Company, Limited
    Inventors: Hiroyuki Kobayashi, Masafumi Hashimoto
  • Patent number: 3984263
    Abstract: A nitrogen-doped n-type epitaxial layer of GaP grown from a vapor phase is heated at a temperature ranging from 740.degree. to 1000.degree.C for a selected period of time depending on the temperature. The heat treatment is carried out in H.sub.2, N.sub.2 or Ar in the presence of Ga and P vapors. Alternatively, a protection coating of SiO.sub.2, Si.sub.3 N.sub.4 or Al.sub.2 O.sub.3 is formed on the epitaxial layer prior to the heat treatment.
    Type: Grant
    Filed: October 15, 1974
    Date of Patent: October 5, 1976
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ichiro Asao, Yoshimasa Ohki, Isamu Akasaki, Masafumi Hashimoto
  • Patent number: RE36747
    Abstract: A light-emitting diode of GaN compound semiconductor emits a blue light from a plane rather than dots for improved luminous intensity. This diode includes a first electrode associated with a high-carrier density n.sup.+ layer and a second electrode associated with a high-impurity density .[.i.sub.H -layer.]. .Iadd.H-layer.Iaddend.. These electrodes are made up of a first Ni layer (110 .ANG. thick), a second Ni layer (1000 .ANG. thick), an Al layer (1500 .ANG. thick), a Ti layer (1000 .ANG. thick), and a third Ni layer (2500 .ANG. thick). The Ni layers of dual structure permit a buffer layer to be formed between them. This buffer layer prevents the Ni layer from peeling. The direct contact of the Ni layer with GaN lowers a drive voltage for light emission and increases luminous intensity.
    Type: Grant
    Filed: April 18, 1997
    Date of Patent: June 27, 2000
    Assignees: Toyoda Gosei Co., Ltd, Kabushiki Kaisha Toyota Chuo Kenkyusho
    Inventors: Katsuhide Manabe, Masahiro Kotaki, Makoto Tamaki, Masafumi Hashimoto