Abstract: A memory card with a memory element utilizing a CMOS type electric field effect transistor comprises an overcurrent detecting device for detecting the size of current flowing through a power source circuit in order to immediately stop an overcurrent through the power source circuit when a latch-up phenomenon occurs in the memory element and a switch to open the power source circuit when the overcurrent is detected.

Abstract: The read only memory card into which data can be written includes a bidirectional buffer connected to a data bus and a read/write control circuit which controls the direction of data transmission by the buffer. The control circuit determines whether data is to be written into or read from the memory based on the voltage on a writing power supply line and an output enable signal line. The electrostatic discharge resistance of the read only memory card is thereby at least ten times higher than that of the conventional memory card in which the data bus is directly connected to external equipment.

Abstract: In a non-contact IC card based on an electromagnetic induction system, N small thin-film coils formed by thin-film technology are arranged to perform N-bit parallel data transfer at an increased data transfer rate. Each thin-film coil may be constructed with a pot core to solve a problem relating to errors in positioning the card relative to a terminal unit and thereby improving the reliability of data transfer. Shielding walls may be provided between the adjacent thin-film coils to prevent interference therebetween. The N thin-film coils are integrally formed as a thin-film coil module.

Abstract: An IC memory card includes an IC memory chip, a connector for electrically connecting the IC memory chip to a terminal, a control circuit for maintaining the IC memory chip inoperative during a fixed period of time after the connector has been connected to the terminal, and a data generating circuit for outputting to the terminal specific data corresponding to a predetermined address during the fixed period of time for determining whether the connector is properly connected to the terminal.

Abstract: Data for protecting software is written into a ROM for protecting software in an IC card including other ROMs for storing data and scrambled software. The data for protecting software provides a key for execution of the software. A read-write RAM is responsive to the same select signal that is applied to the software protecting ROM for reading and writing of data by a user. When the data of the software protecting ROM is read out, the outputs of the ROM and the RAM are exclusive-OR gated. Accordingly, it is impossible to easily know what software protection data has been written into the ROM, i.e., to decode the software key. The ROM, the RAM, and the data processing circuit may be constructed as one IC.

Abstract: A memory writing apparatus for simultaneously writing the same data in a plurality of memories such as PROMs, the apparatus having a master function portion and slave function portions connected to the master function portion. A plurality of memories in which the desired data is to be written by the master function portion are placed in a memory placing section provided in each of the master and slave function portions. The master function portion has a buffer memory which stores the data to be written. Each of the main and slave function portions has a decision circuit for comparing the data actually written in each of the memories with the data stored in the buffer memory.

Abstract: A battery circuit incorporated in an integrated circuit (IC) memory card includes a power control circuit having a power output for connection to a power input of a memory chip of the IC memory card, a data backup battery and an active switching device. The active switching device prevents a current from flowing into the data backup battery when the voltage applied to an external power supply line is higher than the voltage of the battery. The active switching device electrically connects the battery for supplying the battery voltage to the power output in response to a voltage greater than the battery voltage applied to the power output through the external power supply line and electrically connects the battery to the power output when the battery is connected for supplying the battery voltage to the power output and the voltage of the battery is higher than that of the external power supply line.

Abstract: A storage portion for a ROM card for storing a distribution software comprises a software storage memory (ROM region) and a temporary memory (RAM region). A memory address trap circuit, when a predetermined specific address is designated, selects a temporary memory portion as an alternative to the software storage memory, while it selects a software storage memory when an address other than the specific address is designated. A software protection program stored, together with the distribution software, or as a sub-routine of the distribution software in the software storage memory, is executed by a program executing portion of a peripheral device to which the card is connected.

Abstract: A battery circuit including an embdedded battery is incorporated in a disposable integrated circuit (IC) memory card having a memory. The battery voltage is higher than a predetermined holding voltage needed for retaining stored data in the memory. The battery circuit includes an inductor-capacitor (LC) circuit; a switching circuit for connecting and disconnecting the battery and the inductor; and a level-detection/control circuit for detecting the voltage applied to the power input terminal of the memory and alternately connecting and disconnecting the switching circuit so that the voltage across the memory is maintained at or slightly above the predetermined holding voltage. Electrical power is intermittently supplied from the battery while an excess of electrical energy supplied from the battery is temporarily accumulated in the inductor. The voltage across the memory is maintained at the predetermined holding voltage, thereby remarkably reducing the rate at which the battery energy is consumed.

Abstract: An IC memory card includes one or more memory devices for storing data, a memory latch for storing a start address set from outside of the card, a circuit for generating a signal representing the memory capacity of the card and for outputting the signal outside of the card, and a comparator for comparing the start address set in the memory latch with an address sent from an address bus and for making the data stored in the memory devices accessible from the outside of the card when upper bits of the two address are identical to each other. A computer system employing a plurality of such IC memory cards receives the memory capacities of the cards and assigns start addresses to the cards in sequence. Intervals between start addresses of cards adjacent in sequence are based on the memory capacities of the cards. Thus, a plurality of cards of varying memory capacities may make up a memory map having a continuous range of memory with no empty memory regions therein.

Abstract: An IC card writing system for writing data in a memory in an IC card includes a data writing device for writing data in the memory in the IC card utilizing a voltage which is below a predetermined value after it has received a memory identification signal, by applying a voltage having at least the predetermined value to an input terminal of the IC card. A high voltage detecting/suppressing circuit detects the voltage applied to the input terminal of the IC card by the data writing device, and, when the voltage equals or exceeds the predetermined value, suppresses the voltage applied to the input terminal of the IC card to below the predetermined value while outputting a detection signal. A memory identification signal generating circuit containing memory identification data concerning the memory of the IC card outputs the memory identification signal to the data writing device when it receives the detection signal from the high voltage detecting/suppressing circuit.

Abstract: An input/output IC gate circuit inserted in the input or output lines of an IC memory card contains at least one input stage, for one of the input or output lines, in which a first MOSFET, a second MOSFET and a third MOSFET are connected in series between an external power source line and a grounding line. The first MOSFET is in an ON state when the voltage of the input or output line is in the vicinity of that of a power source and in an OFF state when the voltage is at 0 V. The second MOSFET is in an OFF state when the voltage of the input or output line is in the vicinity of the power source and in an ON state when the voltage is at 0 V. The third MOSFET is on/off controlled by a control signal delivered from a level detection circuit. The third MOSFET is turned on when the voltage of the external power source line exceeds a predetermined value which is one-half the voltage of the data backup battery or above.

Abstract: A memory card with a connector having a male contact including a relatively large numbers of connecting pins. The card comprises a card-shaped housing in which a female contact is disposed to be accessible by the male contact from the outside of the housing. The housing also contains therein internal conductors between internal components and the female contact. The female contact comprises an elastomer connector having an electrically insulating elastomer and a large number of electrically conductive fine fibers, each having a first and a second end. The conductive fibers extend through and are supported by the insulating elastomer for establishing a large number of independent electrically conductive paths therethrough. The dimensions and the pitch of the conductive fibers is so fine that the respective conductors and the corresponding external male pin are electrically connected through at least one of the conductive fibers when the male and female contact are connected.

Abstract: The invention is in a data processing system comprising a data processing device and a data control device, and external abnormal signals inputted through the data processing device are stored by a latch circuit and then outputted as abnormal signals into a microcomputer. The logical sum of the external abnormal signals latched by the latch circuit is taken, and if the logical sum is significant an attention signal to inform generation of the abnormal state is outputted into a central control unit. An OR logic circuit for outputting a control signal to the central control unit is installed so as to take the abnormal signals from the latch circuit. By the external extraordinary signal introducing portion composed of the latch circuit and the OR logic circuit, the external abnormal signals can be processed without interrupting the task of the microcomputer.