Patents by Inventor Masahide Okamoto
Masahide Okamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9393645Abstract: The disclosed junction material, manufacturing method thereof, and manufacturing method of junction structure utilize lead-free materials and ensure a high reliability of the junction between a semiconductor element and a frame or substrate, or, between a metal plate and another metal plate. For junctions between a semiconductor element and a frame or substrate, by using as the JUNCTION MATERIAL a laminate material comprising a Zn-based metallic layer (101), Al-based metallic layers (102a, 102b) on both sides thereof, and X-based metallic layers (103a, 103b) (X=Cu, Au, Ag or Sn) on the outside of both the Al-based metallic layers (102a, 102b), even in an oxygen-rich environment, the superficial X-based metallic layers protect the Zn and Al from oxidation until said junction material melts, preserving the wettability and bondability of said junction material as solder and securing the high reliability of the junction.Type: GrantFiled: July 28, 2011Date of Patent: July 19, 2016Assignee: Hitachi Metals, Ltd.Inventors: Takuto Yamaguchi, Masahide Okamoto, Osamu Ikeda, Hiromitsu Kuroda, Kazuma Kuroki, Shohei Hata, Yuichi Oda
-
Publication number: 20160146878Abstract: The problem to be solved by the present invention is to provide a substrate for providing early warning of degradation in a semiconductor device. The problem is solved by providing a substrate comprising an actual device comprising a semiconductor component and a solder joint, and a dummy device closely placed to the actual device on the substrate and connected electrically in parallel circuit to the actual device, comprising a dummy semiconductor component and a solder joint comprising an outer solder joint part and an inner solder joint part, wherein the outer solder joint part has same characteristic to the solder joint of the actual device and the inner solder joint part accelerates the crack growth faster than the outer solder joint, and percentage area of outer solder joint part is smaller than the predetermined failure criterion of delamination percentage in actual device corresponding to the threshold value of electrical change.Type: ApplicationFiled: July 1, 2013Publication date: May 26, 2016Applicant: Hitachi, Ltd.Inventors: Lina Jaya DIGUNA, Masahide OKAMOTO, Kenji TAMAKI
-
Publication number: 20130287654Abstract: A valuable metal recovery method of recovering metals from a lithium ion battery without using complicate steps and by a relatively simple and convenient facility is intended to be provided. For attaining the purpose, lithium is leached selectively from a positive electrode active material containing a composite oxide of lithium and transition metal elements by using a solution showing a weak acidity at a pH of 4 to 7 so that the high Li/Co selectivity is high and a Li recovery rate is high, and lithium is recovered from the leaching solution. By using a solute that the acidity of the acidic solution spontaneously disappears due to evolution of a gas after leaching of lithium, neutralization step is no more required and the volume of liquid wastes is decreased.Type: ApplicationFiled: November 11, 2011Publication date: October 31, 2013Inventors: Yasuko Yamada, Yoshihide Yamaguchi, Masahide Okamoto
-
Publication number: 20130256390Abstract: The disclosed junction material, manufacturing method thereof, and manufacturing method of junction structure utilize lead-free materials and ensure a high reliability of the junction between a semiconductor element and a frame or substrate, or, between a metal plate and another metal plate. For junctions between a semiconductor element and a frame or substrate, by using as the JUNCTION MATERIAL a laminate material comprising a Zn-based metallic layer (101), Al-based metallic layers (102a, 102b) on both sides thereof, and X-based metallic layers (103a, 103b) (X=Cu, Au, Ag or Sn) on the outside of both the Al-based metallic layers (102a, 102b), even in an oxygen-rich environment, the superficial X-based metallic layers protect the Zn and Al from oxidation until said junction material melts, preserving the wettability and bondability of said junction material as solder and securing the high reliability of the junction.Type: ApplicationFiled: July 28, 2011Publication date: October 3, 2013Applicant: Hitachi Cable, Ltd.Inventors: Takuto Yamaguchi, Masahide Okamoto, Osamu Ikeda, Hiromitsu Kuroda, Kazuma Kuroki, Shohei Hata, Yuichi Oda
-
Patent number: 8525330Abstract: Provided is a connecting part for a semiconductor device including a semiconductor element, a frame, and a connecting part which connects the semiconductor element and the frame to each other, in which an interface between the connecting part and the semiconductor element and an interface between the connecting part and the frame respectively have the area of Al oxide film which is more than 0% and less than 5% of entire area of the respective interfaces. The connecting part has an Al-based layer and first and second Zn-based layers on main surfaces of the Al-based layer, a thickness ratio of the Al-based layer relative to the Zn-based layers being less than 0.59.Type: GrantFiled: August 30, 2010Date of Patent: September 3, 2013Assignee: Hitachi, Ltd.Inventors: Masahide Okamoto, Osamu Ikeda, Yuki Murasato
-
Publication number: 20130206607Abstract: To provided a method for recovering lithium from a lithium ion battery using comparatively simple equipment and without using a cumbersome process. A lithium extraction method for extracting lithium from the positive electrode material of a lithium ion battery containing lithium and cobalt, the method being characterized in that the positive electrode material is immersed into an acidic solution at 50° C. or less, lithium ions are selectively leached into the acidic solution while inhibiting the leaching of cobalt ions, and the leaching of lithium ions is stopped while the amount of lithium contained in the positive electrode material is sufficient.Type: ApplicationFiled: July 13, 2011Publication date: August 15, 2013Applicant: Hitachi, Ltd.Inventors: Yasuko Kojima, Yoshihide Yamaguchi, Masahide Okamoto
-
Publication number: 20130127026Abstract: In a connecting material of the present invention, a Zn series alloy layer is formed on an outermost surface of an Al series alloy layer. In particular, in the connecting material, an Al content of the Al series alloy layer is 99 to 100 wt.% or a Zn content of the Zn series alloy layer is 90 to 100 wt.%. By using this connecting material, the formation of an Al oxide film on the surface of the connecting material at the time of the connection can be suppressed, and preferable wetness that cannot be obtained with the Zn—Al alloy can be obtained. Further, a high connection reliability can be achieved when an Al series alloy layer is left after the connection, since the soft Al thereof functions as a stress buffer material.Type: ApplicationFiled: January 18, 2013Publication date: May 23, 2013Inventors: Osamu IKEDA, Masahide OKAMOTO
-
Patent number: 8389854Abstract: A Ni plating is applied on a base metal in a metal strip form, and a brightener-free Sn-(1 to 4% by mass)Cu plating is applied on the Ni plating. The metal strip is heat-treated at a temperature at or above the melting point (solidus line) of a Sn-(1 to 4% by mass)Cu alloy to form a Cu-Sn compound layer or a Cu—Ni—Sn-compound layer on the Ni plating layer and a Sn layer or a Sn—Cu-ally layer on the Cu—Sn compound layer or the Cu—Ni—Sn-compound layer. The metal strip is further fabricated into a connector.Type: GrantFiled: October 14, 2008Date of Patent: March 5, 2013Assignee: Hitachi, Ltd.Inventors: Masahide Okamoto, Osamu Ikeda
-
Patent number: 8356742Abstract: In a connecting material of the present invention, a Zn series alloy layer is formed on an outermost surface of an Al series alloy layer. In particular, in the connecting material, an Al content of the Al series alloy layer is 99 to 100 wt. % or a Zn content of the Zn series alloy layer is 90 to 100 wt. %. By using this connecting material, the formation of an Al oxide film on the surface of the connecting material at the time of the connection can be suppressed, and preferable wetness that cannot be obtained with the Zn—Al alloy can be obtained. Further, a high connection reliability can be achieved when an Al series alloy layer is left after the connection, since the soft Al thereof functions as a stress buffer material.Type: GrantFiled: September 8, 2011Date of Patent: January 22, 2013Assignee: Hitachi, Ltd.Inventors: Osamu Ikeda, Masahide Okamoto
-
Publication number: 20120098134Abstract: When connecting with a conventional Zn/Al/Zn cladding material, thickness of a connecting part needs to be less than double an existing high-lead solder (about 100 ?m) in order to make heat resistance in the connecting part at least equivalent to a level of the existing solder. Moreover, thickness of an Al layer needs to make as thick as possible in order to fully exhibit stress relaxation performance of the Al layer. Provided is a semiconductor device including a semiconductor element, a frame, and a connecting part which connects the semiconductor element and the frame to each other, in which an interface between the connecting part and the semiconductor element and an interface between the connecting part and the frame respectively have the area of Al oxide film which is more than 0% and less than 5% of entire area of the respective interfaces.Type: ApplicationFiled: August 30, 2010Publication date: April 26, 2012Inventors: Masahide Okamoto, Osamu Ikeda, Yuki Murasato
-
Publication number: 20120000965Abstract: In a connecting material of the present invention, a Zn series alloy layer is formed on an outermost surface of an Al series alloy layer. In particular, in the connecting material, an Al content of the Al series alloy layer is 99 to 100 wt. % or a Zn content of the Zn series alloy layer is 90 to 100 wt. %. By using this connecting material, the formation of an Al oxide film on the surface of the connecting material at the time of the connection can be suppressed, and preferable wetness that cannot be obtained with the Zn—Al alloy can be obtained. Further, when an Al series alloy layer is left after the connection, since the soft Al functions as a stress buffer material, the high connection reliability can be achieved.Type: ApplicationFiled: September 8, 2011Publication date: January 5, 2012Inventors: Osamu IKEDA, Masahide Okamoto
-
Publication number: 20100175908Abstract: A Ni plating is applied on a base metal in a metal strip form, and a brightener-free Sn-(1 to 4% by mass)Cu plating is applied on the Ni plating. The metal strip is heat-treated at a temperature at or above the melting point (solidus line) of a Sn-(1 to 4% by mass)Cu alloy to form a Cu—Sn compound layer or a Cu—Ni—Sn-compound layer on the Ni plating layer and a Sn layer or a Sn—Cu-ally layer on the Cu—Sn compound layer or the Cu—Ni—Sn-compound layer. The metal strip is further fabricated into a connector. Thus, a metal strip, which has good soldability on a substrate, is free from the occurrence of whiskers at a terminal part during storage or upon fitting into FPC or FFC, and is necessary for a lead-free connector, can be realized.Type: ApplicationFiled: October 14, 2008Publication date: July 15, 2010Applicant: Hitachi, Ltd.Inventors: Masahide Okamoto, Osamu Ikeda
-
Patent number: 7722962Abstract: A solder foil formed from a material comprising particles of Cu, etc. as metal particles and Sn particles as solder particles by rolling is suitable for solder bonding at a high temperature side in temperature-hierarchical bonding, and semiconductor devices and electronic devices produced by use of such solder bonding have distinguished reliability of mechanical characteristics, etc.Type: GrantFiled: December 19, 2001Date of Patent: May 25, 2010Assignee: Renesas Technology Corp.Inventors: Tasao Soga, Hanae Hata, Toshiharu Ishida, Kanko Ishida, legal representative, Tetsuya Nakatsuka, Masahide Okamoto, Kazuma Miura
-
Patent number: 7579677Abstract: In a power semiconductor device, a joint between the power semiconductor element and frame plated with Ni is composed of a laminated structure comprising, from the power semiconductor element side, an intermetallic compound layer having a melting point of 260° C. or higher, a Cu layer, a metal layer having a melting point of 260° C. or higher, a Cu layer and an intermetallic layer having a melting point of 260° C. or higher. The structure of the joint buffers the stress generated by the secondary mounting and temperature cycle at the bond for the semiconductor element and the frame having a large difference in thermal expansion coefficient from each other.Type: GrantFiled: October 25, 2006Date of Patent: August 25, 2009Assignee: Renesas Technology Corp.Inventors: Osamu Ikeda, Masahide Okamoto, Hidemasa Kagii, Hiroi Oka, Hiroyuki Nakamura
-
Publication number: 20080206590Abstract: In a connecting material of the present invention, a Zn series alloy layer is formed on an outermost surface of an Al series alloy layer. In particular, in the connecting material, an Al content of the Al series alloy layer is 99 to 100 wt. % or a Zn content of the Zn series alloy layer is 90 to 100 wt. %. By using this connecting material, the formation of an Al oxide film on the surface of the connecting material at the time of the connection can be suppressed, and preferable wetness that cannot be obtained with the Zn—Al alloy can be obtained. Further, when an Al series alloy layer is left after the connection, since the soft Al functions as a stress buffer material, the high connection reliability can be achieved.Type: ApplicationFiled: November 21, 2007Publication date: August 28, 2008Inventors: Osamu Ikeda, Masahide Okamoto
-
Publication number: 20080122050Abstract: A power semiconductor device in which a semiconductor element is die-mount-connected onto a lead frame in a Pb-free manner. In a die-mount-connection with a large difference of thermal expansion coefficient between a semiconductor element 1 and a lead frame 2, the connection is made with an intermetallic compound 200 having a melting point of 260° C. or higher or a Pb-free solder having a melting point of 260° C. or higher to 400° C. or lower, at the same time, the thermal stress produced in temperature cycles is buffered by a metal layer 100 having a melting point of 260° C. or higher. A Pb-free die-mount-connection which does not melt at the time of reflowing but have no chip crack to occur according to thermal stress can be achieved.Type: ApplicationFiled: June 15, 2005Publication date: May 29, 2008Inventors: Osamu Ikeda, Masahide Okamoto, Ryo Haruta, Hidemasa Kagii, Hiroi Oka, Hiroyuki Nakamura
-
Patent number: 7274103Abstract: In a semiconductor module connecting a semiconductor element and a passive element to a printed board, each of connection portions between the semiconductor element and the printed board and between the passive element and the printed board includes a metal with a melting point of 260° C. or higher and an intermetallic compound with a melting point of 260° C. or higher. Specifically, by connecting them using Pb-free solder with a melting point of 260° C. or lower, the printed board capable of lowering in cost, lightening, and reducing back height can be applied to a module board.Type: GrantFiled: November 14, 2005Date of Patent: September 25, 2007Assignee: Renesas Technology Corp.Inventors: Osamu Ikeda, Masahide Okamoto, Yukihiro Satou
-
Patent number: 7256501Abstract: In a semiconductor device having a package structure in which lead terminals connected to electrodes on both of the upper and lower surfaces of a semiconductor chip are exposed from both of the upper and lower surfaces and side surfaces of a sealing body formed of resin, electrodes of the semiconductor chip and the lead terminals are connected by Pb-free connection parts each having a configuration of connection layer/stress buffer layer/connection layer. In each connection part, the connection layer is formed of an inter-metallic compound layer having a melting point of 260° C. or higher or Pb-free solder having a melting point of 260° C. or higher, and the stress buffer layer is formed of a metal layer having a melting point of 260° C. or higher and having a function to buffer the thermal stress.Type: GrantFiled: November 18, 2005Date of Patent: August 14, 2007Assignee: Renesas Technology Corp.Inventors: Masahide Okamoto, Osamu Ikeda, Akira Muto, Yukihiro Satou
-
Publication number: 20070089811Abstract: In a power semiconductor device, a joint between the power semiconductor element and frame plated with Ni is composed of a laminated structure comprising, from the power semiconductor element side, an intermetallic compound layer having a melting point of 260° C. or higher, a Cu layer, a metal layer having a melting point of 260° C. or higher, a Cu layer and an intermetallic layer having a melting point of 260° C. or higher. The structure of the joint buffers the stress generated by the secondary mounting and temperature cycle at the bond for the semiconductor element and the frame having a large difference in thermal expansion coefficient from each other.Type: ApplicationFiled: October 25, 2006Publication date: April 26, 2007Inventors: Osamu Ikeda, Masahide Okamoto, Hidemasa Kagii, Hiroi Oka, Hiroyuki Nakamura
-
Patent number: 7131566Abstract: This invention relates to a packaging method using lead-free solder, characterized by including a reflow-soldering step in which a surface mount device is soldered to a circuit board with a lead-free solder paste; an inserting step in which the lead or terminal of a insertion mount device is inserted into the circuit board; a step in which a warp preventing jig is attached to the circuit board; a flux applying step in which flux is applied to the foregoing circuit board; a preheating step in which, after applying flux, the lower surface of the circuit board is preheated; a flow-soldering step in which the upper surface of the circuit board the lower surface of which was preheated in the preheating step is heated, and by applying lead-free solder paste to the lower surface of the circuit board, the lead or terminal of the insertion mount device is flow-soldered to the circuit board; and a temperature controlling step where temperatures of both surfaces of a circuit board are adjusted, the upper surface of theType: GrantFiled: May 19, 2003Date of Patent: November 7, 2006Assignee: Hitachi, Ltd.Inventors: Tetsuya Nakatsuka, Masahide Okamoto, Tomoyuki Ohmura