Abstract: A selective PEG algorithm, creating a sparse matrix while maintaining row weight/column weight at arbitrary multi-levels, and in the process, inactivating an arbitrary edge so that a minimum loop formed between arbitrary nodes is enlarged or performing constrained interleaving, so that encoding efficiency in the case where a matrix space is narrow is improved.

Abstract: An image forming apparatus includes a frame, a platen roller having a first end and a second end, each of the first and second ends being rotatably supported by the frame, a thermal head that faces the platen roller and that forms an image on a printing medium, the thermal head having a first end and a second end, a gear that is provided on the first end of the platen roller and that is rotated by a motor, the rotation of the gear causing the platen roller to rotate, and a pair of urging units that urges the first end and the second end of the platen roller or the thermal head, wherein an urging force generated by one of the pair of urging units on the first end is smaller than an urging force generated by the other of the pair of urging units on the second end.

Abstract: An image forming apparatus includes a frame, a platen roller rotatably supported by the frame, a thermal head that is provided to face the platen roller, and a supporting unit that supports the thermal head from above, wherein the supporting unit includes an adjustment part that can adjust a height of the supporting unit by an adjuster, and the supporting unit can adjust an angle of the thermal head by adjusting the height of the adjustment part by the adjuster with at least a portion of the supporting unit being deformed, and wherein the supporting unit can adjust the height of the adjustment part by adjusting a protrusion amount of the adjuster with a tip of the adjuster being butted against the frame.

Abstract: An electricity storage device includes: a plurality of batteries juxtaposed in a first direction, each battery having on a first side a gas discharge valve that discharges a gas produced inside the battery; and a cooling path formed between the plurality of batteries that face each other in the first direction, constructed to convey a coolant that cools the batteries, and an intake opening for taking in the coolant on a second side that is an opposite side to the first side in a second direction orthogonal to the first direction and a discharge opening for discharging the coolant taken in on at least one of sides in a third direction orthogonal to the second direction and to the first direction.

Abstract: The power storage device comprises a plural cell, an exhaust passage and a sealing plate. The plural cells is aligned in a first direction, each of the cells includes a gas discharging valve for discharging a gas generated in the cell, each of the gas discharging valves is provided on a first side in a second direction of the cell, and the second direction is orthogonal to the first direction. The exhaust passage is configured to discharge the gas discharged from each of the gas discharging valves, extends in the first direction, and has an opening at a first end in the first direction. The sealing plate is provided at a second end of the exhaust passage in the first direction, includes plural recesses on a surface on the exhaust passage side of the sealing plate, and made of a resin.

Abstract: A cooling duct apparatus for an onboard battery includes an air intake duct that leads cooling air for cooling a battery module mounted in a vehicle to the battery module; a bezel provided on an inlet of the air intake duct; a filter provided on a back surface of the bezel; a supporting member that fixes the filter to the bezel; and a protruding portion being provided on at least one of the bezel and the supporting member. The protruding portion restricts surface displacement of the filter by being inserted into a recessed portion provided to an inside of an outer peripheral portion of the filter.

Abstract: A selective PEG algorithm, creating a sparse matrix while maintaining row weight/column weight at arbitrary multi-levels, and in the process, inactivating an arbitrary edge so that a minimum loop formed between arbitrary nodes is enlarged or performing constrained interleaving, so that encoding efficiency in the case where a matrix space is narrow is improved.

Abstract: The power storage device comprises a plural cell, an exhaust passage and a sealing plate. The plural cells is aligned in a first direction, each of the cells includes a gas discharging valve for discharging a gas generated in the cell, each of the gas discharging valves is provided on a first side in a second direction of the cell, and the second direction is orthogonal to the first direction. The exhaust passage is configured to discharge the gas discharged from each of the gas discharging valves, extends in the first direction, and has an opening at a first end in the first direction. The sealing plate is provided at a second end of the exhaust passage in the first direction, includes plural recesses on a surface on the exhaust passage side of the sealing plate, and made of a resin.

Abstract: An electricity storage device includes: a plurality of batteries juxtaposed in a first direction, each battery having on a first side a gas discharge valve that discharges a gas produced inside the battery; and a cooling path formed between the plurality of batteries that face each other in the first direction, constructed to convey a coolant that cools the batteries, and an intake opening for taking in the coolant on a second side that is an opposite side to the first side in a second direction orthogonal to the first direction and a discharge opening for discharging the coolant taken in on at least one of sides in a third direction orthogonal to the second direction and to the first direction.

Abstract: A semiconductor wafer (W) where circuits are formed in the area divided by streets is split into semiconductor chips having individual circuits. By interposing an adhesive sheet, whose adhesive force is lowered by stimulation, between the semiconductor wafer (W) and the support plate (13), the front side of the semiconductor wafer (W) is adhered to the support plate (13), thereby exposing the rear face (10) of the semiconductor wafer (W). The rear face (10) of the semiconductor wafer (W) with the support plate (13) is ground. After the grinding is finished, the semiconductor wafer (W) held with the rear face (10) up is diced into semiconductor chips (C). The adhesive sheet is given stimulus to lower the adhesive force and the semiconductor chips (C) are removed from the support plate (13). The semiconductor wafer and semiconductor chips are always supported by the support plate, avoiding damage and deformation.

Abstract: In manufacturing thinned semiconductor chips by grinding a semiconductor wafer supported on a rigid support substrate, in order to remove the semiconductor wafer or semiconductor chips from the support substrate without damage to the semiconductor wafer or semiconductor chips, a semiconductor wafer at its surface is bonded on a light-transmissive support substrate through an adhesive layer having an adhesion force that is reduced upon exposure to light radiation, thereby exposing the back surface of the semiconductor wafer. A tape is bonded to the backside of the semiconductor wafer integrated with the support substrate after grinding, wherein the tape is supported at the periphery. Before or after bonding of the tape, light radiation is applied to the adhesive layer at a side close to the support substrate to reduce the adhesion force in the adhesion layer.

Abstract: A semiconductor wafer protecting unit which enables a semiconductor wafer to be handled as required, without breakage of the semiconductor wafer, even when the back of the semiconductor wafer is ground to decrease the thickness of the semiconductor wafer markedly; and a semiconductor wafer processing method using such a semiconductor wafer protecting unit. The semiconductor wafer protecting unit is composed of a magnetized tape having one surface with tackiness, and a magnetic substrate having many pores formed at least in a central zone thereof.

Abstract: It is an object of the invention to provide a method for manufacturing an IC chip wherein a wafer is prevented from being damaged and the ease of handling thereof is improved so that the wafer can be appropriately processed into IC chips, even if a thickness of the wafer is extremely reduced to approximately 50 ?m.

Abstract: A wafer support plate comprises a support surface on which a semiconductor wafer is supported, and a crystal orientation mark which indicates the crystal orientation of the semiconductor wafer. Even the semiconductor wafer thinned by grinding can be stably held on the support surface, and the crystal orientation can be recognized even when the outer periphery of the semiconductor wafer has chipped.

Abstract: A semiconductor wafer is applied to a support disk via an intervening adhesive layer with the front side of the semiconductor wafer facing the adhesive layer, which is sensitive to a certain exterior factor for reducing its adhesive force; the semiconductor wafer is ground on the rear side; the wafer-and-support combination is applied to a dicing adhesive tape with the so ground rear side facing the dicing adhesive tape, which is surrounded and supported by the circumference by a dicing frame; the certain exterior factor is effected on the intervening adhesive layer to reduce its adhesive force; and the intervening adhesive layer and support disk are removed from the semiconductor wafer or chips without the possibility of damaging the same.

Abstract: A semiconductor wafer (W) where circuits are formed in the area formed in the area divided by streets is split into semiconductor chips having an individual circuit. By interposing an adhesive sheet whose adhesive force is lowered by stimulation between the semiconductor wafer (W) and the support plate (13), the front side of the semiconductor wafer (W) is adhered to the support plate (13), exposing the rear face (10) of the semiconductor wafer (W). The rear face (10) of the semiconductor wafer (W) with the support plate (13) is ground. After the grinding is finished, the semiconductor wafer (W) is held with the rear face (10) up is diced into semiconductor chips (C). The adhesive sheet is given stimulus to lower the adhesive force and the semiconductor chips (C) are removed from the support plate (13). The semiconductor wafer and semiconductor chips are always supported by the support plate, avoiding damaging or deforming.

Abstract: A semiconductor wafer protecting unit which enables a semiconductor wafer to be handled as required, without breakage of the semiconductor wafer, even when the back of the semiconductor wafer is ground to decrease the thickness of the semiconductor wafer markedly; and a semiconductor wafer processing method using such a semiconductor wafer protecting unit. The semiconductor wafer protecting unit is composed of a magnetized tape having one surface with tackiness, and a magnetic substrate having many pores formed at least in a central zone thereof.

Abstract: In manufacturing thinned semiconductor chips by grinding a semiconductor wafer supported on a rigid support substrate, in order to remove semiconductor wafer or semiconductor chips from the support substrate without damage to the semiconductor wafer or semiconductor chips, a semiconductor wafer at its surface is bonded on a light-transmissive support substrate through an adhesive layer having an adhesion force to reduce upon exposed to light radiation, thereby exposing the back surface of the semiconductor wafer. A tape is bonded to the backside of the semiconductor wafer integrated with the support substrate of after grinding, wherein the tape is supported at the periphery. Before or after bonding of the tape, light radiation is applied to the adhesive layer at a side close to the support substrate to reduce the adhesion force in the adhesion layer.

Abstract: It is an object of the invention to provide a method for manufacturing an IC chip wherein a wafer is prevented from being damaged and the ease of handling thereof is improved so that the wafer can be appropriately processed into IC chips, even if a thickness of the wafer is extremely reduced to approximately 50 &mgr;m.

Abstract: A wafer support plate comprises a support surface on which a semiconductor wafer is supported, and a crystal orientation mark which indicates the crystal orientation of the semiconductor wafer. Even the semiconductor wafer thinned by grinding can be stably held on the support surface, and the crystal orientation can be recognized even when the outer periphery of the semiconductor wafer has chipped.