Abstract: To reduce the influence of noise in the imaging device configured with the plurality of semiconductor chips. A first semiconductor chip includes a signal input transistor in which an input signal which is a signal corresponding to incident light is input to a control terminal, a reference input transistor which forms a differential pair along with the signal input transistor and in which a reference signal is input to a control terminal, a first signal line which delivers a change in a current flowing in one of the signal input transistor and the reference input transistor as a result of comparison between the input signal and the reference signal when the current is changed in accordance with a difference between the input signal and the reference signal, and a first pad which is electrically connected to the first signal line.

Abstract: A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode and a cathode. The cathode is in a well region of the first substrate. The first pixel includes an isolation region that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region between the isolation region and the well region. The hole accumulation region is electrically connected to the anode.

Abstract: A solid-state imaging element of a pixel sharing type with improved driving of transistors is disclosed. A first electric charge accumulating section and a second electric charge accumulating section are arranged in a predetermined direction. A first transfer section transfers electric charge from first photoelectric conversion elements to the first electric charge accumulating section, causing it to accumulate the electric charge. A second transfer section transfers electric charge from second photoelectric conversion elements to the second electric charge accumulating section, causing it to accumulate the electric charge. A first transistor is configured to output a signal corresponding to an amount of the electric charge accumulated in each of the first electric charge accumulating section and the second electric charge accumulating section. A second transistor is arranged with the first transistor in the predetermined direction and connected in parallel to the first transistor.

Abstract: A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode and a cathode. The cathode is in a well region of the first substrate. The first pixel includes an isolation region that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region between the isolation region and the well region. The hole accumulation region is electrically connected to the anode.

Abstract: To reduce the influence of noise in the imaging device configured with the plurality of semiconductor chips. A first semiconductor chip includes a signal input transistor in which an input signal which is a signal corresponding to incident light is input to a control terminal, a reference input transistor which forms a differential pair along with the signal input transistor and in which a reference signal is input to a control terminal, a first signal line which delivers a change in a current flowing in one of the signal input transistor and the reference input transistor as a result of comparison between the input signal and the reference signal when the current is changed in accordance with a difference between the input signal and the reference signal, and a first pad which is electrically connected to the first signal line.

Abstract: A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode (105) and a cathode (101). The cathode is in a well region (103) of the first substrate. The first pixel includes an isolation region (108) that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region (107a) between the isolation region and the well region. The hole accumulation region is electrically connected to the anode.

Abstract: A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode and a cathode. The cathode is in a well region of the first substrate. The first pixel includes an isolation region that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region between the isolation region and the well region. The hole accumulation region is electrically connected to the anode.

Abstract: The present disclosure relates to a solid-state imaging device, a solid-state imaging device operating method, an imaging apparatus, and an electronic apparatus that can realize an image at a low resolution with low power consumption without deteriorating imaging characteristics of all pixels. A floating interconnection line connecting FDs (floating diffusions) each set in a unit of shared pixels including at least one or more pixels, the FDs being provided in each column having a predetermined column number, and a switch changing over between connection and disconnection of the floating interconnection line to and from the FDs are provided. In addition, the switch changes over between the connection and the disconnection between the FDs and the floating interconnection line in response to a resolution that is a low resolution. The present disclosure can be applied to a solid-state imaging device.

Abstract: The present technique relates to a solid-state image pickup device capable of realizing low power consumption in a simpler configuration, a control method therefor, and an electronic apparatus. The solid-state image pickup device includes a pixel array section that has a plurality of pixels arranged two-dimensionally in a matrix shape, load transistors each of which configures a source follower circuit with an amplification transistor of each pixel of the pixel array section, and a control circuit that, in accordance with the amount of light received by one or more of the pixels, controls a supply voltage of each of the load transistors or controls a current flowing through each of the load transistors. The present technique can be applied to a solid-state image pickup device, for example.

Abstract: The present technology relates to an imaging element and an electronic device that enable pixels to flexibly share a charge voltage converting unit. The imaging element includes a pixel array unit in which pixels respectively having charge voltage converting units and switches are arranged, and the charge voltage converting units of the plurality of pixels are connected to a signal line in parallel via the respective switches. The present technology is applied to, for example, a Complementary Metal Oxide Semiconductor (CMOS) image sensor in which pixels share a charge voltage converting unit.

Abstract: A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode (105) and a cathode (101). The cathode is in a well region (103) of the first substrate. The first pixel includes an isolation region (108) that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region (107a) between the isolation region and the well region. The hole accumulation region is electrically connected to the anode.

Abstract: To reduce the influence of noise in the imaging device configured with the plurality of semiconductor chips. A first semiconductor chip includes a signal input transistor in which an input signal which is a signal corresponding to incident light is input to a control terminal, a reference input transistor which forms a differential pair along with the signal input transistor and in which a reference signal is input to a control terminal, a first signal line which delivers a change in a current flowing in one of the signal input transistor and the reference input transistor as a result of comparison between the input signal and the reference signal when the current is changed in accordance with a difference between the input signal and the reference signal, and a first pad which is electrically connected to the first signal line.

Abstract: To reduce the influence of noise in the imaging device configured with the plurality of semiconductor chips. A first semiconductor chip includes a signal input transistor in which an input signal which is a signal corresponding to incident light is input to a control terminal, a reference input transistor which forms a differential pair along with the signal input transistor and in which a reference signal is input to a control terminal, a first signal line which delivers a change in a current flowing in one of the signal input transistor and the reference input transistor as a result of comparison between the input signal and the reference signal when the current is changed in accordance with a difference between the input signal and the reference signal, and a first pad which is electrically connected to the first signal line.

Abstract: The present technique relates to a solid-state image pickup device capable of realizing low power consumption in a simpler configuration, a control method therefor, and an electronic apparatus. The solid-state image pickup device includes a pixel array section that has a plurality of pixels arranged two-dimensionally in a matrix shape, load transistors each of which configures a source follower circuit with an amplification transistor of each pixel of the pixel array section, and a control circuit that, in accordance with the amount of light received by one or more of the pixels, controls a supply voltage of each of the load transistors or controls a current flowing through each of the load transistors. The present technique can be applied to a solid-state image pickup device, for example.

Abstract: In a liquid crystal display device in which one pixel is divided into a plurality of sub-pixels, power consumption is reduced. A liquid crystal display device in which a pixel formation portion forming one pixel includes a first sub-pixel portion and a second sub-pixel portion is provided with a charge sharing circuit (50) for short-circuiting a CS bus line (CSL1) provided for the first sub-pixel portion and a CS bus line (CSL2) provided for the second sub-pixel portion to each other based on a short-circuit control signal (CTL). A CS voltage generating circuit (40) generates CS signals (CS1 and CS2) whose potentials change every predetermined period. The charge sharing circuit (50) short-circuits the CS bus line (CSL1) and the CS bus line (CSL2) to each other at timing at which the potentials of the CS signals (CS1 and CS2) change, based on the short-circuit control signal (CTL).

Abstract: A shift register includes series-connection circuits to transmit a shift pulse. The series-connection circuits include a continuous stage group with continuous stages. Each stage of the continuous stage group includes a first output transistor, a first capacitor, an input gate, a first switching element, a second switching element, a third switching element, and a fourth switching element.

Abstract: A display device 10 according to the present invention includes a plurality of pixels 40 each including a plurality of sub pixels 42, a plurality of auxiliary capacitance lines 36 forming an auxiliary capacitance 56 with the sub pixels 42, and an auxiliary capacitance driver 34 configured to supply an auxiliary capacitance drive signal to the auxiliary capacitance lines 36 and to apply a voltage to the auxiliary capacitance. In the display device 10, the auxiliary capacitance driver 34 includes a plurality of connection terminals 64 each connected to each of the auxiliary capacitance lines 36.

Abstract: A multi-primary color display device is capable of handling an increased number of primary colors for color image display with a reduced number of external parts, with reduced increase in the amount of drive circuit and reduced increase in operating speed. An active matrix liquid crystal panel includes a display section constituted by pixel formation portions, each made of four sub pixel-formation portions which handle four primary colors. These four sub pixel-formation portions are arranged in a 2×2 matrix pattern. With such a pixel configuration, a source driver drives as many as M source lines, which is two times the number M of pixels arranged in a horizontal direction. A gate driver is formed on the liquid crystal panel integrally with pixel circuit in the display section, and drives as many as N gate lines, which is two times the number N of the pixels arranged in a vertical direction.

Abstract: In a liquid crystal display device in which one pixel is divided into a plurality of sub-pixels, power consumption is reduced. A liquid crystal display device in which a pixel formation portion forming one pixel includes a first sub-pixel portion and a second sub-pixel portion is provided with a charge sharing circuit (50) for short-circuiting a CS bus line (CSL1) provided for the first sub-pixel portion and a CS bus line (CSL2) provided for the second sub-pixel portion to each other based on a short-circuit control signal (CTL). A CS voltage generating circuit (40) generates CS signals (CS1 and CS2) whose potentials change every predetermined period. The charge sharing circuit (50) short-circuits the CS bus line (CSL1) and the CS bus line (CSL2) to each other at timing at which the potentials of the CS signals (CS1 and CS2) change, based on the short-circuit control signal (CTL).

Abstract: Each stage of a shift register includes: a shift pulse input terminal; a shift pulse output terminal; first to fifth terminals; an input gate, first to fourth switching elements; a first output transistor, and a first circuit, connected between a first output terminal and the second input terminal, which forms a current path between the first output terminal and the second input terminal.