Abstract: A motorcycle tire for running on rough terrain has a block pattern that includes major groups arranged circumferentially of the tire at intervals, and minor groups arranged between the major groups. The major group consists of four blocks arranged axially of the tire and each connected to the next with a tie bar, wherein each is defined as having the centroid of its top surface within a tread center region having a developed width of 60% of a developed tread width, and angles (?1a) of straight lines drawn between axially adjacent centroids are not more than 10 degrees with respect to the tire axial direction. The minor group consists of two or three blocks connected with a tie bar, and angles of straight lines drawn between axially adjacent centroids of top surfaces of the blocks are 15 to 80 degrees with respect to the tire axial direction.

Abstract: A semiconductor device includes a substrate, a first nitride semiconductor layer formed on the substrate, a p-type nitride semiconductor layer formed on the first nitride semiconductor layer, a recess having a bottom portion which reaches the first nitride semiconductor layer through a part of the p-type nitride semiconductor layer, a third nitride semiconductor layer formed to cover the bottom portion of the recess, a side portion of the recess, and a part of an upper surface of the p-type nitride semiconductor layer. The semiconductor device further includes a fourth nitride semiconductor layer formed on the third nitride semiconductor layer, a first electrode formed on another side of the substrate, a gate electrode formed on the upper surface of the p-type nitride semiconductor layer, and a second electrode that is in contact with the third nitride semiconductor layer or the fourth nitride semiconductor layer.

Abstract: A semiconductor device includes a substrate, a semiconductor layer stacked body, and a source electrode and a drain electrode formed on the semiconductor layer stacked body. The semiconductor layer stacked body includes a first nitride semiconductor layer formed on the substrate, and a second nitride semiconductor layer formed on the first nitride semiconductor layer. The semiconductor device further includes a third nitride semiconductor layer formed on the second nitride semiconductor layer and disposed between the source electrode and the drain electrode, and a gate electrode formed on the third nitride semiconductor layer. The semiconductor device includes a first magnesium-containing region having a magnesium concentration of 1×1018 cm?3 or more that is provided right under the third nitride semiconductor layer, from an upper surface of the second nitride semiconductor layer to a position lower than an interface between the first nitride semiconductor layer and the second nitride semiconductor layer.

Abstract: A motorcycle tire includes a tread having shoulder blocks, and sidewalls. Each shoulder block includes a main portion and an end portion. The main portion is formed by a first crosslinked rubber composition. The end portion and the sidewalls are formed by a second crosslinked rubber composition. JIS-A hardness Ha of the main portion is greater than JIS-A hardness Hb of the end portion and the sidewalls. Difference (Ha?Hb) is greater than or equal to 5, and is not greater than 12. A ratio (H2/H1) of a height H2 from a boundary point Pb between the tread and each sidewall to a boundary point P2 between the main portion and the end portion, relative to a height H1 from the boundary point Pb to an outermost end P1 of a corresponding one of the shoulder blocks in the axial direction, is greater than or equal to 1/3.

Abstract: A semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer above the first nitride semiconductor layer and having a band gap larger than that of the first nitride semiconductor layer; a p-type nitride semiconductor layer above the second nitride semiconductor layer; two third nitride semiconductor layers of n-type above the second nitride semiconductor layer and located separately on either side of the p-type nitride semiconductor layer; and a first ohmic electrode above one of the two third nitride semiconductor layers and a second ohmic electrode above the other of the two third nitride semiconductor layers; and a gate electrode above the p-type nitride semiconductor layer. The second nitride semiconductor layer includes, in a region above which neither the p-type nitride semiconductor layer nor the two third nitride semiconductor layers is located, a surface layer including p-type impurities identical to those in the p-type nitride semiconductor layer.

Abstract: A tire 20 includes a tread 22, a pair of beads 26, a carcass 28, and a belt 30. A ply 56a of the carcass 28 includes: a body 58a that extends toward each bead 26; and a pair of turned-up portions 60a that extend approximately outward from the body 58a in the radial direction. The belt 30 includes a first layer 64a and a second layer 64b which are layered over each other in the radial direction. Ends 68b of the second layer 64b are located inwardly from ends 68a, respectively, of the first layer 64a in the axial direction. The tread 22 includes a plurality of blocks 42.

Abstract: An off-road pneumatic tire has a tread having an outer surface forming a tread surface, the tread including a body and multiple blocks projecting from the body substantially outward in radial direction. The blocks have a center block group, a pair of shoulder block groups and a pair of middle block groups. The center group includes center blocks at interval in circumferential direction on plane of equator. Each shoulder group includes shoulder blocks at interval in the circumferential direction on an edge of the tread surface. Each middle group includes middle blocks at interval in the circumferential direction between the center and one shoulder groups. The center group has units each having first, second, third and fourth center blocks in the order of the first, second, third and fourth blocks in the circumferential direction.

Abstract: A nitride semiconductor device includes a semiconductor multilayer formed on a substrate, a first ohmic electrode and a Schottky electrode spaced apart from each other on the semiconductor multilayer; and a passivation film covering a top of the semiconductor multilayer. The semiconductor multilayer 102 includes a first nitride semiconductor layer, a second nitride semiconductor layer, and a p-type third nitride semiconductor layer 124 sequentially formed on the substrate. The third nitride semiconductor layer contains p-type impurities, and is selectively formed between the first ohmic electrode and the Schottky electrode in contact with the Schottky electrode.

Abstract: A motorcycle tire for running on rough terrain comprises a tread portion having a developed tread width and provided with a plurality of tread blocks. The tread blocks include a plurality of crown blocks defined as having a ground contacting top surface whose centroid is located within a crown region defined as having a developed width of ? of the developed tread width and centered on the tire equator. The crown blocks include a plurality of central crown blocks whose axial distance from the tire equatorial plane to the centroid is not more than 2% of the developed tread width, and a plurality of off-center crown blocks whose axial distance from the tire equatorial plane to the centroid is more than 2% and not more than 6% of the developed tread width.

Abstract: A nitride semiconductor device includes a semiconductor multilayer formed on a substrate, a first ohmic electrode and a Schottky electrode spaced apart from each other on the semicnductor multilayer; and a passivation film covering a top of the semiconductor multilayer. The semiconductor multilayer 102 includes a first nitride semiconductor layer, a second nitride semiconductor layer, and a p-type third nitride semiconductor layer 124 sequentially formed on the substrate. The third nitride semiconductor layer contains p-type impurities, and is selectively formed between the first ohmic electrode and the Schottky electrode in contact with the Schottky electrode.

Abstract: A semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer above the first nitride semiconductor layer and having a band gap larger than that of the first nitride semiconductor layer; a p-type nitride semiconductor layer above the second nitride semiconductor layer; two third nitride semiconductor layers of n-type above the second nitride semiconductor layer and located separately on either side of the p-type nitride semiconductor layer; and a first ohmic electrode above one of the two third nitride semiconductor layers and a second ohmic electrode above the other of the two third nitride semiconductor layers; and a gate electrode above the p-type nitride semiconductor layer. The second nitride semiconductor layer includes, in a region above which neither the p-type nitride semiconductor layer nor the two third nitride semiconductor layers is located, a surface layer including p-type impurities identical to those in the p-type nitride semiconductor layer.

Abstract: An AlN buffer layer, an undoped GaN layer, an undoped AlGaN layer, a p-type GaN layer and a heavily doped p-type GaN layer are formed in this order. A gate electrode forms an Ohmic contact with the heavily doped p-type GaN layer. A source electrode and a drain electrode are provided on the undoped AlGaN layer. A pn junction is formed in a gate region by a two dimensional electron gas generated at an interface between the undoped AlGaN layer and the undoped GaN layer and the p-type GaN layer, so that a gate voltage can be increased.

Abstract: A nitride semiconductor device includes a semiconductor multilayer formed on a substrate, a first ohmic electrode and a Schottky electrode spaced apart from each other on the semiconductor multilayer; and a passivation film covering a top of the semiconductor multilayer. The semiconductor multilayer 102 includes a first nitride semiconductor layer, a second nitride semiconductor layer, and a p-type third nitride semiconductor layer 124 sequentially formed on the substrate. The third nitride semiconductor layer contains p-type impurities, and is selectively formed between the first ohmic electrode and the Schottky electrode in contact with the Schottky electrode.

Abstract: In a manufacturing method of a semiconductor device, first, a first semiconductor layer, a second semiconductor layer, and a p-type third semiconductor layer are sequentially epitaxially grown on a substrate. After that, the third semiconductor layer is selectively removed. Then, a fourth semiconductor layer is epitaxially grown on the second semiconductor layer. Then, a gate electrode is formed on the third semiconductor layer.

Abstract: A semiconductor device having: a substrate; a nitride semiconductor layer including a first semiconductor layer made of GaN or InxGa1-xN (0<x?1) and formed on the substrate and a second semiconductor layer containing Al and formed on the first semiconductor layer; and a protective film formed on the set of nitride semiconductor layers. The nitride semiconductor layer has an active section and an inactive section surrounding the active section, and a portion of the second semiconductor layer has been removed from the inactive section.

Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer (1) located over the substrate; a second nitride semiconductor layer (2) located over the first nitride semiconductor layer (1), having a larger band gap than the first nitride semiconductor layer (1), and having a recess (11) penetrating into the first nitride semiconductor layer (1); and a third nitride semiconductor layer (12) continuously covering the second nitride semiconductor layer (2) and the recess (11), and having a larger band gap than the first nitride semiconductor layer (1); a gate electrode (5) located above a portion of the third nitride semiconductor layer (12) over the recess (11); and a first ohmic electrode (4a) and a second ohmic electrode (4b) located on opposite sides of the gate electrode (5).

Abstract: A normally off semiconductor device with a reduced off-state leakage current, which is applicable to a power switching element, includes: a substrate; an undoped GaN layer formed above the substrate; an undoped AlGaN layer formed on the undoped GaN layer; a source electrode and a drain electrode, formed on the undoped GaN layer or the undoped AlGaN layer; a P-type GaN layer formed on the undoped AlGaN layer and disposed between the source electrode and the drain electrode; and a gate electrode formed on the P-type GaN layer, wherein the undoped GaN layer includes an active region including a channel and an inactive region not including the channel, and the P-type GaN layer is disposed to surround the source electrode.

Abstract: A transistor includes a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer and has a band gap larger than that of the first semiconductor layer, a control layer formed on the second semiconductor layer and contains p-type impurities, a gate electrode formed in contact with at least part of the control layer and a source electrode and a drain electrode formed on both sides of the control layer, respectively. A third semiconductor layer made of material having a lower etch rate than that of the control layer is formed between the control layer and the second semiconductor layer.

Abstract: A field-effect transistor includes a first semiconductor layer formed on a substrate, and a second semiconductor layer. The first semiconductor layer has a containing region provided as an isolation region which contains non-conductive impurities, and a non-containing region which contains no non-conductive impurities. A first region is defined by a vicinity of a portion of the interface between the containing region and the non-containing region, the portion of the interface being below a gate electrode, the vicinity including the portion of the interface and being included in the containing region. The second semiconductor layer includes a second region which is located directly above the first region. The concentration of the non-conductive impurities of the second region is lower than that of the first region.

Abstract: A pneumatic tire for rough terrain comprises a tread portion provided with a block having a top face and a sidewall face extending radially inwardly from the peripheral edge of the top face, wherein the top face has a polygonal shape having a plurality of sides, and the sidewall face comprises a plurality of strip surfaces extending radially inwardly from the above-mentioned sides, respectively, so as to define a corner between every two adjacent strip surfaces. At least one of the corners is chamfered by a circular arc in a cross section parallel with the top face, wherein the center of the circular arc is positioned inside the block, and the radius of the circular arc is gradually increased from the radially outside to the radially inside of the tire.