Abstract: In a magnetic-field angle detection device and a rotation angle detection device in which the accuracy of the measured angle is not degraded even if the MR ratio of the tunneling magnetoresistance element is increased. In a magnetic-field-angle measurement apparatus including a magnetic-field-angle detection circuit and a magnetic sensor having a tunneling magnetoresistance element with a pinned magnetic layer, the magnetic-field-angle detection circuit has a power-supply unit that outputs a constant voltage as a bias voltage to the tunneling magnetoresistance element of the magnetic sensor and a current-detection unit that detects an output current of the tunneling magnetoresistance element.

Abstract: An antenna includes a dielectric substrate, an antenna conductor, a ground conductor, a waveguide tube, a shield, and short-circuit portions. The shield is provided with a cut having a reverse-taper shape whose width becomes greater from an open end of the cut to an inward end of the cut. The short-circuit portions are provided along a whole periphery of the shield except for a portion provided with the cut.

Abstract: An antenna includes a dielectric substrate, an antenna conductor, a ground conductor, a waveguide tube, a shield, and short-circuit portions. The shield is provided with a cut having a reverse-taper shape whose width becomes greater from an open end of the cut to an inward end of the cut. The short-circuit portions are provided along a whole periphery of the shield except for a portion provided with the cut.

Abstract: An electric storage system includes at least two types of electric storage cells. A first electric storage unit is configured from a first electric storage cell, and a second electric storage unit is configured from a second electric storage cell. The first and second electric storage units are electrically connected to each other through a current controlling circuit.

Abstract: In a magnetic-field angle detection device and a rotation angle detection device in which the accuracy of the measured angle is not degraded even if the MR ratio of the tunneling magnetoresistance element is increased. In a magnetic-field-angle measurement apparatus including a magnetic-field-angle detection circuit and a magnetic sensor having a tunneling magnetoresistance element with a pinned magnetic layer, the magnetic-field-angle detection circuit has a power-supply unit that outputs a constant voltage as a bias voltage to the tunneling magnetoresistance element of the magnetic sensor and a current-detection unit that detects an output current of the tunneling magnetoresistance element.

Abstract: An integrated circuit for driving a semiconductor device, which is adaptable for demands, such as a higher output (larger current), a higher voltage, and a smaller loss, and has a small size, is produced at a low cost, and has high reliability. A power converter including such an integrated circuit is also provided. Circuit elements constituting a drive section of an upper arm drive circuit 212, a level shift circuit 20 including a current sensing circuit 210, a drive section of a lower arm drive circuit 222, and a drive signal processing circuit 224 are integrated and built in one high withstand voltage IC chip 200. Circuit elements constituting a final output stage buffer section 213 of the upper arm drive circuit 212 are built in a vertical p-channel MOS-FET chip 213p and a vertical n-channel MOS-FET chip 213n.

Abstract: An integrated circuit for driving a semiconductor device, which is adaptable for demands, such as a higher output (larger current), a higher voltage, and a smaller loss, and has a small size, is produced at a low cost, and has high reliability. A power converter including such an integrated circuit is also provided. Circuit elements constituting a drive section of an upper arm drive circuit 212, a level shift circuit 20 including a current sensing circuit 210, a drive section of a lower arm drive circuit 222, and a drive signal processing circuit 224 are integrated and built in one high withstand voltage IC chip 200. Circuit elements constituting a final output stage buffer section 213 of the upper arm drive circuit 212 are built in a vertical p-channel MOS-FET chip 213p and a vertical n-channel MOS-FET chip 213n.

Abstract: An integrated circuit for driving a semiconductor device, which is adaptable for demands, such as a higher output (larger current), a higher voltage, and a smaller loss, and has a small size, is produced at a low cost, and has high reliability. A power converter including such an integrated circuit is also provided. Circuit elements constituting a drive section of an upper arm drive circuit 212, a level shift circuit 20 including a current sensing circuit 210, a drive section of a lower arm drive circuit 222, and a drive signal processing circuit 224 are integrated and built in one high withstand voltage IC chip 200. Circuit elements constituting a final output stage buffer section 213 of the upper arm drive circuit 212 are built in a vertical p-channel MOS-FET chip 213p and a vertical n-channel MOS-FET chip 213n.

Abstract: V-phase upper-arm open phase detecting circuit outputs a permission signal to allow U-phase lower-arm MOSFET to be conductive when the V-phase voltage is higher than the positive electrode potential. In response to this permission signal, U-phase lower-arm driver circuit drives U-phase lower-arm MOSFET. V-phase lower-arm open phase detecting circuit outputs a permission signal to allow U-phase upper-arm MOSFET to be conductive when the V-phase voltage is lower than the negative electrode potential. In response to this permission signal, U-phase upper-arm driver circuit drives U-phase upper-arm MOSFET. Thereby, a MOS rectifying device capable of rectifying even when an open phase occurs, a driving method thereof, and a motor vehicle using thereof can be provided.

Abstract: A generator having a field coil L, and an SW1 control circuit 2 for controlling field current flowing through the field coil L. When a generating operation of the generator is to be ended, a switch 1 SW1 is turned off to interrupt the field current flowing through the field coil L, and a switch 2 SW2 is turned off to allow the field current remaining the field coil L to the current path including a resistance element 1 with a resistance element capable of quickly attenuating the field current.

Abstract: An interface circuit capable of reliably transmitting signal even when there is fluctuation in the potential difference in reference potentials between circuits between which signal transmission is carried out. An interface circuit 4 is comprised of a level shift circuit 20 and a potential selection circuit 10 for selecting the potential of a power supply voltage for operating the level shift circuit 20. The potential selection circuit 10 selects one of a plurality of input potentials. The level shift circuit 20 receives a voltage pulse having a first potential as reference potential and outputs a voltage pulse having a second potential as reference potential. The level shift circuit 20 is operated on the basis of both a potential difference between the output potential from the potential selection circuit and the first potential and a potential difference between the selected potential and the second potential.

Abstract: An interface circuit capable of reliably transmitting signal even when there is fluctuation in the potential difference in reference potentials between circuits between which signal transmission is carried out. An interface circuit 4 is comprised of a level shift circuit 20 and a potential selection circuit 10 for selecting the potential of a power supply voltage for operating the level shift circuit 20. The potential selection circuit 10 selects one of a plurality of input potentials. The level shift circuit 20 receives a voltage pulse having a first potential as reference potential and outputs a voltage pulse having a second potential as reference potential. The level shift circuit 20 is operated on the basis of both a potential difference between the output potential from the potential selection circuit and the first potential and a potential difference between the selected potential and the second potential.

Abstract: An inverter device is mounted on the rotating electric machine body The inverter device includes a module unit having a converter circuit and a control unit that controls the operation of the converter circuit. The converter circuit is configured by connecting a plurality of the following series circuits in parallel, each of the series circuits includes a P-channel MOS semiconductor device disposed at a higher potential side and an N-channel MOS semiconductor device disposed at a lower potential side which are electrically connected in series. An electric power that is supplied from a battery or an electric power that is supplied to the battery is controlled.

Abstract: An inverter device is mounted on the rotating electric machine body The inverter device includes a module unit having a converter circuit and a control unit that controls the operation of the converter circuit. The converter circuit is configured by connecting a plurality of the following series circuits in parallel, each of the series circuits includes a P-channel MOS semiconductor device disposed at a higher potential side and an N-channel MOS semiconductor device disposed at a lower potential side which are electrically connected in series. An electric power that is supplied from a battery or an electric power that is supplied to the battery is controlled.

Abstract: An integrated circuit for driving a semiconductor device, which is adaptable for demands, such as a higher output (larger current), a higher voltage, and a smaller loss, and has a small size, is produced at a low cost, and has high reliability. A power converter including such an integrated circuit is also provided. Circuit elements constituting a drive section of an upper arm drive circuit 212, a level shift circuit 20 including a current sensing circuit 210, a drive section of a lower arm drive circuit 222, and a drive signal processing circuit 224 are integrated and built in one high withstand voltage IC chip 200. Circuit elements constituting a final output stage buffer section 213 of the upper arm drive circuit 212 are built in a vertical p-channel MOS-FET chip 213p and a vertical n-channel MOS-FET chip 213n.

Abstract: An information processing system having an original clock oscillator for delivering at least one original clock signal K defined as a first clock signal and a plurality of information processing units supplied with the original clock signal K, wherein each information processing unit comprises clock generating means for generating at least one second clock signal K1 which is phase-locked with the original clock signal K and which has a predetermined duty cycle and a logic device whose operation timing is controlled by the second clock signal K1 and the operation timing of an interface provided between at least one pair of logic devices is synchronously controlled by the clock signal K1.

Abstract: An interface circuit capable of reliably transmitting signal even when there is fluctuation in the potential difference in reference potentials between circuits between which signal transmission is carried out. An interface circuit 4 is comprised of a level shift circuit 20 and a potential selection circuit 10 for selecting the potential of a power supply voltage for operating the level shift circuit 20. The potential selection circuit 10 selects one of a plurality of input potentials. The level shift circuit 20 receives a voltage pulse having a first potential as reference potential and outputs a voltage pulse having a second potential as reference potential. The level shift circuit 20 is operated on the basis of both a potential difference between the output potential from the potential selection circuit and the first potential and a potential difference between the selected potential and the second potential.

Abstract: A generator having a field coil L, and an SW1 control circuit 2 for controlling field current flowing through the field coil L. When a generating operation of the generator is to be ended, a switch 1 SW1 is turned off to interrupt the field current flowing through the field coil L, and a switch 2 SW2 is turned off to allow the field current remaining the field coil L to the current path including a resistance element 1 with a resistance element capable of quickly attenuating the field current.

Abstract: V-phase upper-arm open phase detecting circuit outputs a permission signal to allow U-phase lower-arm MOSFET to be conductive when the V-phase voltage is higher than the positive electrode potential. In response to this permission signal, U-phase lower-arm driver circuit drives U-phase lower-arm MOSFET. V-phase lower-arm open phase detecting circuit outputs a permission signal to allow U-phase upper-arm MOSFET to be conductive when the V-phase voltage is lower than the negative electrode potential. In response to this permission signal, U-phase upper-arm driver circuit drives U-phase upper-arm MOSFET. Thereby, a MOS rectifying device capable of rectifying even when an open phase occurs, a driving method thereof, and a motor vehicle using thereof can be provided.

Abstract: An inverter device is mounted on the rotating electric machine body The inverter device includes a module unit having a converter circuit and a control unit that controls the operation of the converter circuit. The converter circuit is configured by connecting a plurality of the following series circuits in parallel, each of the series circuits includes a P-channel MOS semiconductor device disposed at a higher potential side and an N-channel MOS semiconductor device disposed at a lower potential side which are electrically connected in series. An electric power that is supplied from a battery or an electric power that is supplied to the battery is controlled.