Abstract: A semiconductor memory device that performs a flash write operation without increasing the circuit area. Column selection lines CL0-CL7 extend parallel to word lines at locations corresponding to where column gates are formed. During a flash write mode, the subcolumn decoder 14 simultaneously selects the column selection lines. This writes cell information to every memory cell connected to the selected word line.

Abstract: A DRAM (Dynamic Random Access Memory) having a plurality of memory cells includes a data read/write circuit reading or writing data for the memory cells, a self-refresh circuit refreshing data stored in the memory cells, and a power supply unit for supplying electric power to the data read/write circuit and the self-refresh circuit, the electric power having a first voltage level in a normal operation mode and a second voltage level in a self-refresh mode, wherein the second voltage level is lower than the first voltage level.

Abstract: A DRAM (dynamic Random Access Memory) having a plurality of memory cells includes a data read/write circuit reading or writing data for the memory cells, a self-refresh circuit refreshing data stored in the memory cells, and a power supply unit for supplying electric power to the data read/write circuit and the self-refresh circuit, the electric power having a first voltage level in a normal operation mode and a second voltage level in a self-refresh mode, wherein the second voltage level is lower than the first voltage level.

Abstract: Each client unit 2 diagnoses its operation environment (hardware, software, firmware and so on) at the start time of itself, and when an abnormality or any change (deletion, modification or creation) has occurred and it is repairable, the client unit 2 itself repairs itself or maintenance process is conducted by reinstallation from the server unit 1. When it is unrepairable, the client unit 2 releases itself from the LAN line 100. In this way, by having the client unit 2 be provided with self maintenance capability to allow each client unit 2 to conduct the self maintenance of itself such a client/server system is realized by which loads of the server unit 1 and the LAN line 100 are reduced as well as the probability of system down occurrence is lowered, further the capability of the entire system is improved and a maintenance engineer or a user is not required much labor.

Abstract: A DRAM (Dynamic Random Access Memory) having a plurality of memory cells includes a data read/write circuit reading or writing data for the memory cells, a self-refresh circuit refreshing data stored in the memory cells, and a power supply unit for supplying electric power to the data read/write circuit and the self-refresh circuit, the electric power having a first voltage level in a normal operation mode and a second voltage level in a self-refresh mode, wherein the second voltage level is lower than the first voltage level.

Abstract: This invention allows high-purity maltose to be manufactured both simply and economically by sequentially going through the steps of liquefaction of starch, saccharification of the resulting liquefied substance by combining with general-purpose enzymes and further saccharification with an enzyme which hydrolyzes oligosaccharides of trisaccharide or more, and also allows the economical and favorable manufacturing of maltitol, the reduced product of the above maltose, by going through an additional reduction step.

Abstract: This invention allows high-purity maltose to be manufactured both simply and economically by sequentially going through the steps of liquefaction of starch, saccharification of the resulting liquefied substance by combining with general-purpose enzymes and further saccharification with an enzyme which hydrolyzes oligosaccharides of trisaccharide or more, and also allows the economical and favorable manufacturing of maltitol, the reduced product of the above maltose, by going through an additional reduction step.