Abstract: A solid-state image sensor capable of suppressing mixture of charge between adjacent charge transfer paths (charge transfer regions), and suppressing reduction of a transfer efficiency of charge is provided. In the solid-state image sensor, the charge transfer region includes a first region with a first channel width, and a second region with a second channel width smaller than the first channel width. A boundary part of the charge transfer region between the first region with the first channel width and the second region with the second channel width is located in a region between two transfer electrodes adjacent to each other.

Abstract: A solid-state image sensor capable of suppressing increase of a dark current and a power consumption, and suppressing reduction of a transfer efficiency of electrons is provided. The solid-state image sensor comprises a charge storage region including a first conductive type first impurity region that has a first depth from a main surface of a semiconductor substrate, a first conductive type second impurity region that has a second depth larger than the first depth and an impurity concentration lower than an impurity concentration of the first impurity region, and a first conductive type third impurity region that has a third depth larger than the first depth and smaller than the second depth.

Abstract: A conventional image sensing device allowed significant amounts of unwanted electrons to flow upon pixel mixture, thereby providing a low transfer efficiency. An image sensing device has an image sensing section in which multiple light-receiving pixels for converting incident light into information charge for storage during an image sensing period are disposed in rows and columns in a light-receiving region on a semiconductor substrate. A storage section temporarily stores information charge that has been vertically transferred from the image sensing section. A horizontal transfer section vertically transfers row by row the information charges accumulated in the storage section. A driving section provides vertical transfer control.

Abstract: A solid state imaging device includes photoelectric conversion portions for performing photoelectric conversion, and transfer portions for transferring signal charge occurring at the photoelectric conversion portions. Each transfer portion includes a transfer electrode formed of polysilicon film or the like, and an insulating coating film formed of a material such as a silicon nitride film and so forth, which has a higher relative dielectric constant than that of the silicon oxide, for coating the bottom face, the upper face, and both side faces, of the transfer electrode. The silicon nitride film is formed with a film thickness which is greater than 0 nm and smaller than 60 nm, on both sides of the transfer electrode.

Abstract: The present invention provides an imaging device capable of suppressing deterioration of image quality due to shortage of the amount of light. The imaging device comprises an imaging part which performs photoelectric conversion; a mixing part which mixes electrons corresponding to at least two of pixels transferred from the imaging part; and an electron-ejection gate electrode which has a length in the transfer direction smaller than the length in the transfer direction of a gate electrode of later stage and ejects the electrons mixed by the mixing part.

Abstract: A method of fabricating a semiconductor device capable of improving reliability of a gate insulator film is obtained. This method of fabricating a semiconductor device comprises a step of forming a gate insulator film on the main surface of a semiconductor layer by heat treatment, and the step of forming the gate insulator film includes a step of performing the heat treatment in an atmosphere containing oxidizing gas at a temperature exceeding the temperature causing viscous flow of the gate insulator film thereby forming the gate insulator film on the main surface of the semiconductor layer.

Abstract: A method for manufacturing a semiconductor device including forming a buffer film on a semiconductor substrate, forming a element partitioning trench, forming a oxidized film on the surface of the element partitioning trench, and washing the semiconductor substrate with hydrofluoric acid. The washing removes part of the buffer film, and the end of the buffer film is inwardly removed from the top edge of the element partitioning trench by a predetermined distance. The distance and the thickness of the oxidized film are represented by the expression 0?x?(d/2 sin ?), where x represents the distance, and ? represents the angle between a plane parallel to the semiconductor substrate and a side surface of the element partitioning trench.

Abstract: A semiconductor device capable of improving the operating speed and inhibiting the threshold voltage from fluctuation is obtained. In this semiconductor device, fluorine is introduced into at least any of regions extending over the junction interfaces between a first conductivity type semiconductor region and second conductivity type source/drain regions, at least the interface between the gate insulator film and the central region of a channel region as well as a gate insulator film, and side wall insulator films.

Abstract: A method of fabricating a semiconductor device capable of improving reliability of a gate insulator film is obtained. This method of fabricating a semiconductor device comprises a step of forming a gate insulator film on the main surface of a semiconductor layer by heat treatment, and the step of forming the gate insulator film includes a step of performing the heat treatment in an atmosphere containing oxidizing gas at a temperature exceeding the temperature causing viscous flow of the gate insulator film thereby forming the gate insulator film on the main surface of the semiconductor layer.

Abstract: A method for manufacturing a semiconductor device including forming a buffer film on a semiconductor substrate, forming a element partitioning trench, forming a oxidized film on the surface of the element partitioning trench, and washing the semiconductor substrate with hydrofluoric acid. The washing removes part of the buffer film, and the end of the buffer film is inwardly removed from the top edge of the element partitioning trench by a predetermined distance. The distance and the thickness of the oxidized film are represented by the expression 0≦x≦(d/2 sin &thgr;), where x represents the distance, and &thgr; represents the angle between a plane parallel to the semiconductor substrate and a side surface of the element partitioning trench.

Abstract: Threshold voltage fluctuation in upper corner portions of a trench isolation is inhibited by rounding upper corner portions of the trench by thermal oxidation, introducing a first impurity into both upper corner portions of the trench and heat-treating the semiconductor substrate. Embodiments include increasing the threshold voltage in the upper corner portion of the trench in an n-channel transistor, previously increased by rounding oxidation, and introducing a p-type impurity, thereby canceling the threshold voltage reduction resulting from diffusion of the impurity during heat-treating the semiconductor substrate. In a p-channel transistor, the threshold voltage in the upper corner portion of the trench is increased by rounding oxidation thereby canceling the threshold voltage reduction resulting from introduction of the p-type first impurity into both upper corner portions of the trench.

Abstract: A method of fabricating a semiconductor device capable of inhibiting a threshold voltage from fluctuation in upper corner portions of a trench isolating a first conductivity type channel region and a second conductivity type channel region from each other is obtained. This method of fabricating a semiconductor device comprises steps of forming a trench for isolating a first transistor and a second transistor from each other on a semiconductor substrate, rounding upper corner portions of the trench by thermal oxidation, introducing a first impurity into both upper corner portions of the trench and heat-treating the semiconductor substrate. Therefore, when a p-type impurity is employed as the first impurity, for example, the threshold voltage in the upper corner portion of the trench is previously increased in an n-channel transistor due to rounding oxidation and introduction of the p-type impurity.

Abstract: A printed board comprising a plurality of through holes formed therein and located on intersecting points of an X-Y orthogonal basic grid, and an oblique conductor pattern, wherein conductors are formed along channels arranged in accordance with a principle that one conductor passes between adjacent grid points arranged in the X direction, while two or more conductors pass between adjacent grid points arranged in the Y direction, and each conductor obliquely extends in a zigzag line without contacting the grid points. Such conductor pattern ensures a high density and minimum length of wiring.

Abstract: This application discloses a multilayer printed wiring board having a plurality of pattern layers. Said printed wiring board has at least one pair of plated through holes, i.e. a first and a second plated through hole. The first plated through hole is directly connected to said patterns. The second plated through hole is not directly connected to said patterns. An electronic element terminal is connected to said second plated through hole. The first and second plated through holes are electrically connected to each other on a surface opposite an element mounting surface of the printed wiring board.