Patents by Inventor Masahiro Sumiya

Masahiro Sumiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160172161
    Abstract: Provided is a plasma processing apparatus capable of obtaining desired etch profiles and preventing the degradation of yield rates due to the adhesion of particles, and equipped with a processing chamber in which a sample is plasma-treated; a radio-frequency power source for supplying radio-frequency power used to generate plasma; a sample stage which is provided with electrodes for electrostatically adsorbing the sample and on which the sample is mounted; and a DC power supply for applying DC voltages to the electrodes, the apparatus being further equipped with a control apparatus for controlling the DC power supply so as to apply such DC voltages as to decrease the absolute value of the potential of the sample in the absence of the plasma.
    Type: Application
    Filed: August 24, 2015
    Publication date: June 16, 2016
    Inventors: Kazuyuki IKENAGA, Masaki ISHIGURO, Masahiro SUMIYA, Shigeru SHIRAYONE
  • Publication number: 20160027615
    Abstract: A plasma processing apparatus includes: a plasma processing chamber; a radio frequency power source; a sample stage on which a sample is mounted; an electrode which is arranged inside the sample stage and electrostatically chucks the sample; a DC power source which applies a DC voltage to the electrode; and a control device which controls an output voltage of the DC power source so that an electric potential difference between an electric potential of the sample and an electric potential of an inner wall of the plasma processing chamber is reduced to an electric potential difference within a predetermined range during interruption of plasma discharge.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 28, 2016
    Inventors: Masaki ISHIGURO, Masahiro SUMIYA, Shigeru SHIRAYONE, Kazuyuki IKENAGA, Tomoyuki TAMURA
  • Publication number: 20160027618
    Abstract: A plasma processing apparatus includes a sample stage in a processing chamber in a vacuum container having a placement surface on which a wafer to be processed by using the plasma is placed, a discharge pump connected to a discharge port disposed below the sample stage, and an adjuster that adjusts the amount of discharged gas, in which a first process step of supplying a first processing gas from above the placement surface into the processing chamber and supplying a second processing gas from below the placement surface into the processing chamber to process the wafer by using the first processing gas and a second process step where the first processing gas and the second processing gas are reversed are repeatedly switched over therebetween, and the adjuster adjusts a pressure in the processing chamber to a predetermined value during the processing.
    Type: Application
    Filed: February 20, 2015
    Publication date: January 28, 2016
    Inventors: Masatoshi Kawakami, Hiroho Kitada, Hideki Kihara, Hironori Kusumoto, Masahiro Sumiya, Motohiro Tanaka, Yutaka Kozuma
  • Publication number: 20150024599
    Abstract: In a plasma processing apparatus comprising a processing chamber arranged in a vacuum chamber, a sample stage arranged under the processing chamber and having its top surface on which a wafer to be processed is mounted, a vacuum decompression unit for evacuating the interior of the processing chamber to reduce the pressure therein, and introduction holes arranged above said sample stage to admit process gas into the processing chamber, the wafer having its top surface mounted with a film structure and the film structure being etched by using plasma formed by using the process gas, the film structure is constituted by having a resist film or a mask film, a poly-silicon film and an insulation film laminated in this order from top to bottom on a substrate and before the wafer is mounted on the sample stage and the poly-silicon film underlying the mask film is etched, plasma is formed inside the processing chamber to cover the surface of members inside the processing chamber with a coating film containing a compo
    Type: Application
    Filed: October 8, 2014
    Publication date: January 22, 2015
    Inventors: Masahiro SUMIYA, Motohiro TANAKA
  • Publication number: 20140377958
    Abstract: A plasma processing method embodying this invention is for applying plasma processing to a sample having a metal-containing film. This method includes the steps of applying plasma processing to the sample by using a mixture of halogen-containing gas and nitrogen gas, generating a plasma using a mixture of oxygen gas and inert gas in a plasma production chamber, which is different from a post-treatment chamber used for posttreatment of the plasma-processed sample, and performing posttreatment of the sample while at the same time transporting the generated plasma to the posttreatment chamber via a transfer path disposed between the plasma production chamber and the posttreatment chamber.
    Type: Application
    Filed: February 14, 2014
    Publication date: December 25, 2014
    Applicant: Hitachi High-Technologies Corporation
    Inventors: Kazuumi Tanaka, Masahiro Sumiya
  • Publication number: 20140094981
    Abstract: An availability prediction apparatus includes an access section that accesses a storage section and a prediction section. The storage section stores availability specified periods occurred before a present time associated with respective frequencies of the availability specified periods, and the access section acquires the availability specified periods from the storage section. The prediction section predicts at least one target availability specified period within a prediction term, which begins at the present time and ends at a time later than the present time by a predetermined term. The prediction section includes a correlating section that correlates the availability specified periods with candidate periods included in the prediction term, and a selection section that specifies and selects one of the candidate periods having a highest occurrence probability as the target availability specified period.
    Type: Application
    Filed: October 1, 2013
    Publication date: April 3, 2014
    Applicants: National University Corporation Nagoya University, DENSO CORPORATION
    Inventors: Akira Ito, Junichirou Kanamori, Mitsuru Fujita, Tatsuya Suzuki, Shinkichi Inagaki, Takuma Yamaguchi, Masahiro Sumiya
  • Publication number: 20140053983
    Abstract: In a plasma processing apparatus comprising a processing chamber arranged in a vacuum chamber, a sample stage arranged under the processing chamber and having its top surface on which a wafer to be processed is mounted, a vacuum decompression unit for evacuating the interior of the processing chamber to reduce the pressure therein, and introduction holes arranged above said sample stage to admit process gas into the processing chamber, the wafer having its top surface mounted with a film structure and the film structure being etched by using plasma formed by using the process gas, the film structure is constituted by having a resist film or a mask film, a poly-silicon film and an insulation film laminated in this order from top to bottom on a substrate and before the wafer is mounted on the sample stage and the poly-silicon film underlying the mask film is etched, plasma is formed inside the processing chamber to cover the surface of members inside the processing chamber with a coating film containing a compo
    Type: Application
    Filed: October 4, 2013
    Publication date: February 27, 2014
    Applicant: Hitachi High-Technologies Corporation
    Inventors: Masahiro SUMIYA, Motohiro TANAKA
  • Patent number: 8557709
    Abstract: In a plasma processing apparatus comprising a processing chamber arranged in a vacuum chamber, a sample stage arranged under the processing chamber and having its top surface on which a wafer to be processed is mounted, a vacuum decompression unit for evacuating the interior of the processing chamber to reduce the pressure therein, and introduction holes arranged above said sample stage to admit process gas into the processing chamber, the wafer having its top surface mounted with a film structure and the film structure being etched by using plasma formed by using the process gas, the film structure is constituted by having a resist film or a mask film, a poly-silicon film and an insulation film laminated in this order from top to bottom on a substrate and before the wafer is mounted on the sample stage and the poly-silicon film underlying the mask film is etched, plasma is formed inside the processing chamber to cover the surface of members inside the processing chamber with a coating film containing a compo
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: October 15, 2013
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Masahiro Sumiya, Motohiro Tanaka
  • Publication number: 20130024035
    Abstract: A power supply system for supplying a grid power to a building includes a power generator, a power storing device, and a power controller. The power generator generates off-grid power from a predetermined energy. The power storing device stores the grid power and the off-grid power and supplies the stored power to the building. The power controller controls consumptions of the grid power and the off-grid power. The power controller calculates predicted consumption data related to power consumed in the building and predicted generation data related to power generated by the power generator. The power controller calculates a charging-discharging schedule for the power storing device based on the predicted consumption data and the predicted generation data by formulating the charging-discharging schedule as a mixed integer programming problem.
    Type: Application
    Filed: July 20, 2012
    Publication date: January 24, 2013
    Applicants: National University Corporation Nagoya University, DENSO CORPORATION
    Inventors: Akira ITO, Junichirou Kanamori, Mitsuru Fujita, Tatsuya Suzuki, Shinkichi Inagaki, Masahiro Sumiya, Takuma Yamaguchi
  • Publication number: 20120252200
    Abstract: A plasma processing apparatus includes a processing chamber arranged in a vacuum vessel. A wafer placed on a sample stage in the processing chamber is processed using a plasma formed in the processing chamber. Before etching the film layers provided on the wafer composed of a metal substance and an underlying oxide film or a material having a high dielectric constant, another wafer, provided on surface thereof a film composed of a metal of the same kind as the metal substance, processed and particles of the metal are deposited on an inner wall of said processing chamber.
    Type: Application
    Filed: June 15, 2012
    Publication date: October 4, 2012
    Applicant: Hitachi High-Technologies Corporation
    Inventors: Masahiro Sumiya, Motohiro Tanaka, Kousa Hirota
  • Patent number: 8236701
    Abstract: A plasma processing apparatus includes a processing chamber arranged in a vacuum vessel. A wafer placed on a sample stage in the processing chamber is processed using a plasma formed in the processing chamber. Before etching the film layers provided on the wafer composed of a metal substance and an underlying oxide film or a material having a high dielectric constant, another wafer, provided on a surface thereof a film composed of a metal of the same kind as the metal substance, is processed and particles of the metal are deposited on an inner wall of said processing chamber.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: August 7, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Masahiro Sumiya, Motohiro Tanaka, Kousa Hirota
  • Publication number: 20110226734
    Abstract: In a plasma processing apparatus comprising a processing chamber arranged in a vacuum chamber, a sample stage arranged under the processing chamber and having its top surface on which a wafer to be processed is mounted, a vacuum decompression unit for evacuating the interior of the processing chamber to reduce the pressure therein, and introduction holes arranged above said sample stage to admit process gas into the processing chamber, the wafer having its top surface mounted with a film structure and the film structure being etched by using plasma formed by using the process gas, the film structure is constituted by having a resist film or a mask film, a poly-silicon film and an insulation film laminated in this order from top to bottom on a substrate and before the wafer is mounted on the sample stage and the poly-silicon film underlying the mask film is etched, plasma is formed inside the processing chamber to cover the surface of members inside the processing chamber with a coating film containing a compo
    Type: Application
    Filed: August 12, 2010
    Publication date: September 22, 2011
    Inventors: MASAHIRO SUMIYA, MOTOHIRO TANAKA
  • Patent number: 7771608
    Abstract: A plasma processing method using a plasma processing apparatus comprising a vacuum processing chamber, a substrate electrode having an electrostatic chucking film for chucking a material to be processed, an electrostatic chucking DC power supply and a substrate bias high-frequency power supply connected to the substrate electrode, and a plasma generating unit for generating the plasma in the vacuum processing chamber. The high-frequency voltage Vpp applied to the substrate electrode is monitored, and based on the Vpp signal thus monitored, the output voltage of the electrostatic chucking DC power supply is controlled thereby to maintain the voltage applied on the electrostatic chucking film at the desired value while at the same time controlling the output of the substrate bias high-frequency power supply in ramp with time.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: August 10, 2010
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Masahiro Sumiya, Tsutomu Iida
  • Publication number: 20100197137
    Abstract: A plasma processing apparatus includes a processing chamber arranged in a vacuum vessel. A wafer placed on a sample stage in the processing chamber is processed using a plasma formed in the processing chamber. Before etching the film layers provided on the wafer composed of a metal substance and an underlying oxide film or a material having a high dielectric constant, another wafer, provided on a surface thereof a film composed of a metal of the same kind as the metal substance, is processed and particles of the metal are deposited on an inner wall of said processing chamber.
    Type: Application
    Filed: February 26, 2009
    Publication date: August 5, 2010
    Inventors: Masahiro SUMIYA, Motohiro TANAKA, Kousa HIROTA
  • Patent number: 7615132
    Abstract: A plasma processing apparatus suitable for high-speed and high-definition etching is provided. By applying to a wafer chucking electrode 9 a voltage waveform in which an absolute value of high frequency voltage increases with time and switching between a positive voltage and a negative voltage occurs, a rectangular high frequency voltage is caused to be generated in the wafer 10, with the result that the duty ratio of the rectangular high frequency voltage decreases and that the high energy ion ratio in the energy distribution of ions incident on the wafer increases. Therefore, high efficiency and high accuracy etching becomes possible, providing the advantage that the material selection ratio is improved.
    Type: Grant
    Filed: March 9, 2004
    Date of Patent: November 10, 2009
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Naoki Yasui, Seiichi Watanabe, Masahiro Sumiya, Hitoshi Tamura
  • Patent number: 7585776
    Abstract: It is an object to provide a high-precision method for forming deep holes of elliptic pattern, which can improve hole directionality on the short diameter side, the hole directionality being possibly deteriorated as a result of excessive polymer deposition in the initial etching stage. The insulating film dry etching method is for treating a work on which a mask of elliptic pattern is formed with a fluorocarbon gas, wherein the etching process is divided into a first and second steps after the etching is started, the first step operating to deposit a polymer at a rate set lower than that in the second step, and controlling step time in accordance with ellipticity (long diameter/short diameter ratio) of the elliptic pattern.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: September 8, 2009
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Nobuyuki Negishi, Masatoshi Oyama, Masahiro Sumiya
  • Publication number: 20090165955
    Abstract: A plasma processing apparatus including: a phase controller for controlling a phase difference between biasing power supplied to the antenna biasing electrode and biasing power supplied to the substrate electrode to have a difference of 180°±45°; wherein the biasing power supplied to the antenna biasing electrode and the biasing power supplied to the substrate electrode have a same frequency, which same frequency is lower than a frequency of the RF power for plasma generation. A plurality of filters is included, to perform a variety of filtering.
    Type: Application
    Filed: March 9, 2009
    Publication date: July 2, 2009
    Inventors: Masahiro SUMIYA, Naoki YASUI, Seiichi WATANABE
  • Patent number: 7373899
    Abstract: A plasma processing apparatus having a processing chamber connected to a vacuum exhauster so that its inside pressure can be reduced by the vacuum exhauster, a gas feed unit for supplying gas into the processing chamber, a substrate electrode provided in the processing chamber and on which a sample can be placed, an RF power supply connected through a matching circuit to the substrate electrode, plasma generating means for generating plasma within the processing chamber and a voltage waveform control circuit provided within the matching circuit or between the substrate electrode and the matching circuit to flatten the voltage waveform from the RF power supply.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: May 20, 2008
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Masahiro Sumiya, Naoki Yasui, Seiichi Watanabe, Hitoshi Tamura
  • Publication number: 20080085605
    Abstract: It is an object to provide a high-precision method for forming deep holes of elliptic pattern, which can improve hole directionality on the short diameter side, the hole directionality being possibly deteriorated as a result of excessive polymer deposition in the initial etching stage. The insulating film dry etching method is for treating a work on which a mask of elliptic pattern is formed with a fluorocarbon gas, wherein the etching process is divided into a first and second steps after the etching is started, the first step operating to deposit a polymer at a rate set lower than that in the second step, and controlling step time in accordance with ellipticity (long diameter/short diameter ratio) of the elliptic pattern.
    Type: Application
    Filed: January 29, 2007
    Publication date: April 10, 2008
    Inventors: Nobuyuki Negishi, Masatoshi Oyama, Masahiro Sumiya
  • Publication number: 20080068774
    Abstract: A plasma processing method using a plasma processing apparatus comprising a vacuum processing chamber, a substrate electrode having an electrostatic chucking film for chucking a material to be processed, an electrostatic chucking DC power supply and a substrate bias high-frequency power supply connected to the substrate electrode, and a plasma generating unit for generating the plasma in the vacuum processing chamber. The high-frequency voltage Vpp applied to the substrate electrode is monitored, and based on the Vpp signal thus monitored, the output voltage of the electrostatic chucking DC power supply is controlled thereby to maintain the voltage applied on the electrostatic chucking film at the desired value while at the same time controlling the output of the substrate bias high-frequency power supply in ramp with time.
    Type: Application
    Filed: January 29, 2007
    Publication date: March 20, 2008
    Inventors: Masahiro Sumiya, Tsutomu Iida