Patents by Inventor Masahiro Yamamura

Masahiro Yamamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4283674
    Abstract: This invention relates to a constant voltage output circuit using, as its reference potential source, power source feed terminals for feeding a power source voltage to a reference potential source of a given circuit. The constant voltage output circuit includes a series circuit of an npn transistor and a pnp transistor interposed between the reference potential source of the given circuit and the power source feed terminals, means for biasing the base potential of the pnp transistor by a predetermined potential with respect to the potential of the power source feed terminals, and an emitter follower circuit disposed in the collector output circuit of the npn transistor of the series circuit, and forming a negative feed-back circuit.
    Type: Grant
    Filed: July 19, 1979
    Date of Patent: August 11, 1981
    Assignees: Hitachi, Ltd., Pioneer Electronic Corp.
    Inventors: Yasuo Kominami, Masahiro Yamamura, Katsuji Mizumoto, Toshihide Hanada
  • Patent number: 4276442
    Abstract: The output derived from an electric circuit such as an OCL type power amplifier circuit is delivered to a load such as a speaker, through a switching means such as a relay. When the operation of the electric circuit has come out of a predetermined range of operation, the switching means is operated to break the connection between the electric circuit and the load. A detection circuit for detecting the operation of the electric circuit includes a detecting transistor constructed in a semiconductor integrated circuit. The detecting transistor is connected at its base to the input terminal for external connection of the semiconductor integrated circuit, so as to receive a signal representative of the operation state of the electric circuit. The detecting transistor is so biased as to allow a predetermined electric current to flow therethrough, when the electric circuit is operating within the predetermined range of operation.
    Type: Grant
    Filed: March 29, 1979
    Date of Patent: June 30, 1981
    Assignee: Hitachi, Ltd.
    Inventors: Masanori Ienaka, Masahiro Yamamura, Kazuo Watanabe, Yasuo Kominami
  • Patent number: 4272709
    Abstract: The present invention is related to a temperature-compensated circuit for controlling the drive of a motor, comprising a differential comparator for comparing a running-speed signal of a motor with a reference signal, and a feedback amplifier having a differential amplifier to which is given an input offset.
    Type: Grant
    Filed: July 18, 1979
    Date of Patent: June 9, 1981
    Assignees: Pioneer Electronic Corporation, Hitachi, Ltd.
    Inventors: Katsuji Mizumoto, Toshihide Hanada, Yasuo Kominami, Masahiro Yamamura
  • Patent number: 4264873
    Abstract: A differential amplification is disclosed which comprises differential paired transistors. The direct bias current flowing in the differential paired transistors is determined by a constant current flowing from a first constant current circuit connected to the emitters of the differential paired transistors. The collector current of one of the differential paired transistors is caused to flow as an input current in a high-precision current mirror circuit. The current value of the constant current flowing in the first constant current circuit is set at 2Io. Since a direct base current Ib flows in the differential paired transistors, the current value of the collector current of one of the differential paired transistors is (Io-Ib). Accordingly, the high-precision current mirror circuit generates an output current of a current value of (Io-Ib) at the output terminal thereof.
    Type: Grant
    Filed: July 10, 1979
    Date of Patent: April 28, 1981
    Assignees: Hitachi, Ltd., Pioneer Electronic Corporation
    Inventors: Yasuo Kominami, Masahiro Yamamura, Katsuji Mizumoto, Toshihide Hanada
  • Patent number: 4059808
    Abstract: In a semiconductor differential amplifier comprising a differential pair of npn transistors having the emitters connected to the emitter of lateral transistors, the bases supplied with an input signal, and the collectors connected in common to one terminal of the voltage source so as to derive the output signal from the collector of the lateral transistor, the emitter voltage of each of the differential pair transistors is applied to the common base of the pnp lateral transistors through a constant voltage element consisting of a transistor or a diode. Therefore, the voltage applied between the base and the substrate of the lateral transistor is reduced and hence the tolerance to the reverse breakdown voltage is increased and simplification of the circuit structure becomes possible. Further, a sink current path is provided between the base of the pnp lateral transistor and the other terminal of the voltage source to allow a stabilized bias current to flow through the differential amplifier.
    Type: Grant
    Filed: July 23, 1976
    Date of Patent: November 22, 1977
    Assignee: Hitachi, Ltd.
    Inventors: Yoshio Sakamoto, Masahiro Yamamura