Patents by Inventor Masahito Kanaya

Masahito Kanaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9332342
    Abstract: The invention provides a microphone amplifier circuit which enhances the SNR (signal noise ratio) and expands the dynamic range by reducing the noise level. A microphone amplifier circuit includes a preamplifier which amplifies an audio signal from a capacitor microphone, a level detection circuit which outputs a level detection signal when the level of the audio signal is in the vicinity of the noise level of the microphone amplifier circuit, and an attenuator which attenuates the level of the audio signal outputted from the preamplifier in response to the level detection signal. The preamplifier includes an operational amplifier, a feedback capacitor and a feedback resistor.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: May 3, 2016
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Masahito Kanaya, Akio Watanabe
  • Publication number: 20140010384
    Abstract: The invention provides a microphone amplifier circuit which enhances the SNR (signal noise ratio) and expands the dynamic range by reducing the noise level. A microphone amplifier circuit includes a preamplifier which amplifies an audio signal from a capacitor microphone, a level detection circuit which outputs a level detection signal when the level of the audio signal is in the vicinity of the noise level of the microphone amplifier circuit, and an attenuator which attenuates the level of the audio signal outputted from the preamplifier in response to the level detection signal. The preamplifier includes an operational amplifier, a feedback capacitor and a feedback resistor.
    Type: Application
    Filed: July 3, 2013
    Publication date: January 9, 2014
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Masahito KANAYA, Akio WATANABE
  • Patent number: 8600079
    Abstract: The invention provides an amplifier circuit of a capacitor microphone of which the noise resistance against noise of a supply voltage is enhanced. In an amplifier circuit of a capacitor microphone of the invention, while a noise component of a supply voltage is applied to one inversion input terminal of an operational amplifier of an amplification portion through a parasitic capacitor existing between an external power supply wiring and an external wiring that are adjacent to each other, the problem noise component of the supply voltage is applied to the other non-inversion input terminal by capacitive coupling to an internal power supply wiring. Therefore, the noise component is cancelled at the operational amplifier.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: December 3, 2013
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventors: Yasuyuki Kimura, Masahito Kanaya, Takashi Tokano
  • Patent number: 8159292
    Abstract: To efficiently obtain two outputs including one at a normal level and the other at an excessive level. An input signal input to the negative input terminal of an operational amplifier (14) having a negative feedback path is amplified to output an output signal. Signal combining units (18, 20, 22) are provided for adding in a weighted manner a negative input terminal side signal obtained by combining the input signal input to the negative input terminal of the operational amplifier (14) and a feedback signal from the negative feedback path and the output signal from the operational amplifier to output a combined signal, so that two signals, namely the output signal from the operational amplifier (14) and the combined signal, are obtained.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: April 17, 2012
    Assignee: ON Semiconductor Trading Ltd.
    Inventor: Masahito Kanaya
  • Publication number: 20110204972
    Abstract: To efficiently obtain two outputs including one at a normal level and the other at an excessive level. An input signal input to the negative input terminal of an operational amplifier (14) having a negative feedback path is amplified to output an output signal. Signal combining units (18, 20, 22) are provided for adding in a weighted manner a negative input terminal side signal obtained by combining the input signal input to the negative input terminal of the operational amplifier (14) and a feedback signal from the negative feedback path and the output signal from the operational amplifier to output a combined signal, so that two signals, namely the output signal from the operational amplifier (14) and the combined signal, are obtained.
    Type: Application
    Filed: February 22, 2011
    Publication date: August 25, 2011
    Applicant: ON SEMICONDUCTOR TRADING, LTD.
    Inventor: Masahito Kanaya
  • Publication number: 20100254544
    Abstract: The invention provides an amplifier circuit of a capacitor microphone of which the noise resistance against noise of a supply voltage is enhanced. In an amplifier circuit of a capacitor microphone of the invention, while a noise component of a supply voltage is applied to one inversion input terminal of an operational amplifier of an amplification portion through a parasitic capacitor existing between an external power supply wiring and an external wiring that are adjacent to each other, the problem noise component of the supply voltage is applied to the other non-inversion input terminal by capacitive coupling to an internal power supply wiring. Therefore, the noise component is cancelled at the operational amplifier.
    Type: Application
    Filed: April 2, 2010
    Publication date: October 7, 2010
    Applicants: SANYO Electric Co., Ltd, SANYO Semiconductor Co., Ltd
    Inventors: Yasuyuki KIMURA, Masahito KANAYA, Takashi TOKANO
  • Patent number: 5450037
    Abstract: A gradient detecting unit detects the gradient in the output of a driven circuit. An offset voltage generating unit generates an offset voltage in response to an output of a driven circuit as well as the gradient detected by the gradient detecting unit. The gradient in the output of the driven circuit is increased as the change thereof is more abrupt and decreased as the change thereof is more gentle. For example, if the detected gradient is added to the normal offset voltage to form an offset voltage, the offset voltage can follow the changes in the output of the driven circuit to supply a proper supply voltage to the driven circuit.
    Type: Grant
    Filed: June 29, 1994
    Date of Patent: September 12, 1995
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masahito Kanaya, Takeshi Suzuki, Masakazu Ueno, Takahisa Makino, Yukinao Sakuma
  • Patent number: D345963
    Type: Grant
    Filed: April 29, 1992
    Date of Patent: April 12, 1994
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masahito Kanaya, Masakazu Ueno, Kenichi Kobayashi