Patents by Inventor Masahito Tomizawa

Masahito Tomizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030002121
    Abstract: The present invention suppresses to a minimum the degradation of the transmission quality caused by chromatic dispersion characteristic of an optical transmission medium, and the interplay between the chromatic dispersion and non-linear optical effects in dense WDM transport systems. A baseband input data signal is pre-coded in advance by a pre-coding unit, phase modulation is carried out using a pre-coded signal by the optical phase modulating unit, and the phase modulated optical signal is converted to an RZ intensity modulated signal by the optical filter unit that performs phase-shift-keying to amplitude-shift-keying conversion. For example, an optical phase modulating unit generates an encoded DPSK phase modulated signal using a differential phase shirt keying (DPSK) format, and a phase modulated signal is converted to an RZ intensity modulated signal by the optical filter unit disposed downstream of the optical phase modulating unit.
    Type: Application
    Filed: June 26, 2002
    Publication date: January 2, 2003
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Yutaka Miyamoto, Akira Hirano, Shoichiro Kuwahara, Masahito Tomizawa
  • Publication number: 20010053161
    Abstract: A multiplexing and transmission apparatus including a transmitter and a receiver is provided. The transmitter includes a control pulses generating circuit generating control pulses having different phases; channel-frame generating circuits each outputting low-speed frame signal in synchronization with the control pulse; and a multiplexing circuit multiplexing the low-speed frame signals into the high-speed serial signal. The receiver includes a demultiplexer demultiplexing high-speed serial signal into low-speed frame signals; channel-frame synchronization circuits each generating a frame pulse corresponding to the low-speed frame signal; a switching circuit switching each of the low-speed frame signals to an appropriate port of the channel; and a switch controller circuit controlling the switching circuit.
    Type: Application
    Filed: June 15, 2001
    Publication date: December 20, 2001
    Inventors: Masahito Tomizawa, Takashi Ono, Yoshiaki Kisaka
  • Publication number: 20010003833
    Abstract: In a trunk transmission network for transmitting information signals between nodes via paths, flexible path operation is achieved by setting up paths between source nodes and destination nodes after pre-classifying paths into a higher service class in which any loss of information occurring in that path is made good, and a lower service class which permits loss of information to occur in the path, and by arranging for each node, when it acts as a source node, to recognize the service class of the information signal it is sending to a destination node, and to select a path corresponding to that service class.
    Type: Application
    Filed: December 19, 2000
    Publication date: June 14, 2001
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Masahito Tomizawa, Shinji Matsuoka, Yoshihiko Uematsu
  • Patent number: 6202082
    Abstract: In a trunk transmission network for transmitting information signals between nodes via paths, flexible path operation is achieved by setting up paths between source nodes and destination nodes after pre-classifying paths into a higher service class in which any loss of information occurring in that path is restored, and a lower service class which permits loss of information to occur in the path. The flexible operation is further achieved by arranging for each node, when it acts as a source node, to recognize the service class of the information signal it is sending to a destination node, and to select a path corresponding to that service class.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: March 13, 2001
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Masahito Tomizawa, Shinji Matsuoka, Yoshihiko Uematsu
  • Patent number: 6034974
    Abstract: The invention has the object of offering a channel-selection-type demultiplexing circuit which is capable of interchanging the time slots of demultiplexed signals when demultiplexing ultra-high-speed multi-channel multiplexed signal stream without expanding the scale of the circuits, and does not require the scale of the circuits to be expanded even if the speed of the transmission path increases. The invention is a channel-selection-type demultiplexing circuit capable of demultiplexing signals to a desired output port during bit demultiplexing, instead of simply demultiplexing the bits as in conventional devices, which performs bit demultiplexing based on a frequency division clock after selecting the bit signals to be demultiplexed to the desired output port from the N-channel multiplexed signal stream based on channel selection information.
    Type: Grant
    Filed: July 16, 1997
    Date of Patent: March 7, 2000
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Shinji Matsuoka, Yoshihiko Uematsu, Masahito Tomizawa
  • Patent number: 5574717
    Abstract: In an optical transmission system applicable to a SDH network, communication between two line terminating equipments is performed in a form of a STM frame composed of a SOH field and a payload, which is determined by CCITT recommendations. The line terminating equipment provides a FEC circuit which is preferably arranged at a location between MSP and MST function blocks. The FEC circuit is designed to perform coding/decoding operations, using a cyclic Hamming code, directly on each AU-4 message derived from the STM frame. Otherwise, the FEC circuit performs operations on each k-bit interleaved AU-4 message (where `k` is an integer larger than 1). Check bits generated by a FEC coding circuit are written into undefined byte areas in a MSOH field, and error correcting is performed at a decoder circuit on the basis of embedded check bits, therefore FEC operations are performed within a multiplex-section layer.
    Type: Grant
    Filed: May 16, 1995
    Date of Patent: November 12, 1996
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Masahito Tomizawa, Yoshiaki Yamabayashi, Yukio Kobayashi, Kiyoshi Nakagawa, Ken-ichi Yagisawa