Patents by Inventor Masaki Kanazawa

Masaki Kanazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090191796
    Abstract: A wafer processing method for processing a wafer (20) having bumps (B) formed on a front surface (21) comprises the steps of: holding on a table (51), a bump region-conforming member (40) that has an outer shape conforming only to a bump region (25) where said bumps are formed in the wafer; forming a resin layer (29) by applying resin around the bump region-conforming member up to a thickness equal to or greater than that of the bump region-conforming member; grinding the bump region-conforming member along with the resin layer to a predetermined thickness; removing the bump region-conforming member from the table to form a concave part (45) in the resin layer; applying a film (11) on the front surface of the wafer; and disposing the wafer in the concave part of the resin layer and holding the wafer on the table so that a back surface (22) of said wafer faces upward. After that, the back surface of the wafer can also be ground.
    Type: Application
    Filed: January 27, 2009
    Publication date: July 30, 2009
    Inventors: Masaki Kanazawa, Hajime Akahori
  • Publication number: 20090163120
    Abstract: A wafer grinding machine and a wafer grinding method are disclosed. A barrier (60) is arranged around a holding unit (29) to hold at least a wafer (40) with a film (11) attached on the front surface (41) thereof and with the back surface (42) thereof directed upward. The upper surface (61) of the barrier unit is ground to the position between the back surface of the wafer held by the holding unit and the boundary between the wafer and the film. Then, the wafer is ground while being held with the back surface thereof up by the holding unit. As a result, the film is prevented from coming off from the wafer at the time of grinding the back surface of the wafer. Further, when the wafer is ground, a fluid may be supplied into the gap between the barrier unit and the outer peripheral portion of the wafer held by the holding unit.
    Type: Application
    Filed: December 17, 2008
    Publication date: June 25, 2009
    Inventor: Masaki Kanazawa
  • Publication number: 20090107634
    Abstract: There is provided a film peeling device (100) for peeling a film (3) stuck onto a first portion (121) containing a peripheral portion of a wafer (20) and also stuck onto a second portion (122) located inward with respect to the first portion, comprising: a moving means (61, 62) for relatively moving the first portion and/or second portion so that the film of the first portion of the wafer can be located at a position higher than the film of the second portion; a tape drawing means (142) for drawing out a peeling tape (103) onto the film stuck onto the first and the second portion; and a peeling means (146) for peeling the film from the first and the second portion of the wafer when the peeling tape drawn out from the tape drawing means is pressed against only the first portion film and moved along the first portion. Due to the foregoing, it is possible to prevent the wafer from being damaged at the time of peeling the front surface protection film.
    Type: Application
    Filed: July 5, 2006
    Publication date: April 30, 2009
    Inventor: Masaki Kanazawa
  • Patent number: 7521384
    Abstract: A method and an apparatus for peeling a surface protective film attached on the surface of a semiconductor wafer are provided. A heating block is set in proximity to the whole surface of the semiconductor wafer, and the whole surface protective film is heated by the heating block. Thus, the air bubbles existing between the semiconductor wafer and the surface protective film are expanded or swelled, and the adhesion between the semiconductor wafer and the surface protective film is weakened. After that, the surface protective film is peeled from the semiconductor wafer. As a result, a peel starting point can be appropriately formed and damage to the wafer can be prevented.
    Type: Grant
    Filed: October 5, 2006
    Date of Patent: April 21, 2009
    Assignee: Tokyo Seimitsu Co., Ltd.
    Inventors: Masaki Kanazawa, Minoru Ametani, Daisuke Akita, Motoi Nezu
  • Publication number: 20080247148
    Abstract: A semiconductor device 10 includes a first transistor 11 placed on a substrate 16, a second transistor 12 placed on the first transistor 11 via a heat radiation layer 17, a third transistor 13 placed on the substrate 16, and a fourth transistor 14 placed on the third transistor 11 via a heat radiation layer 17. The first transistor 11 has a first region corresponding to a region where the second transistor is placed, and a second region which is formed so as to surround the first region and in which the rate of area occupied by the emitter region in the base region is higher than in the first region. Likewise the first transistor 11, the third transistor 13 has a region in which the rate of area occupied by the emitter region in the base region is varied.
    Type: Application
    Filed: February 17, 2006
    Publication date: October 9, 2008
    Applicant: SANKEN ELECTRIC CO., LTD.
    Inventors: Katsuyuki Torii, Masaki Kanazawa
  • Publication number: 20070087475
    Abstract: A method and an apparatus for peeling a surface protective film attached on the surface of a semiconductor wafer are provided. A heating block is set in proximity to the whole surface of the semiconductor wafer, and the whole surface protective film is heated by the heating block. Thus, the air bubbles existing between the semiconductor wafer and the surface protective film are expanded or swelled, and the adhesion between the semiconductor wafer and the surface protective film is weakened. After that, the surface protective film is peeled from the semiconductor wafer. As a result, a peel starting point can be appropriately formed and damage to the wafer can be prevented.
    Type: Application
    Filed: October 5, 2006
    Publication date: April 19, 2007
    Inventors: Masaki Kanazawa, Minoru Ametani, Daisuke Akita, Motoi Nezu
  • Patent number: 7158360
    Abstract: A solenoid drive circuit includes a control circuit which comprises a detector with a resistor for discerning current flow therethrough to produce electric signals that correspond to level of current flow through a solenoid connected to the resistor; an amplifier for amplifying the electric signals from the resistor; and an integrator for integrating the amplified output from the amplifier.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: January 2, 2007
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Kiyokatsu Satoh, Masaki Kanazawa
  • Patent number: 7126342
    Abstract: A voltage measurement device includes a first group of switches Q1, Q2, a second group of switches Q7, Q8 and a third groups of switches Q5, Q6. By turning on the third group of switches Q5, Q6, the first group of switches Q1, Q2 are turned on, so that a condenser C1 is charged by voltage impressed between a voltage input terminal A and a voltage input terminal B. While the first group of switches Q1, Q2 are turned off by tuning off the third group of switches Q5, Q6, the second group of switches Q7, Q8 are turned on, so that voltage retained in the condenser C1 is generated between a voltage output terminal G and a voltage output terminal H.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: October 24, 2006
    Assignees: Sanken Electric Co., Ltd., Honda Motor Co., Ltd.
    Inventors: Akio Iwabuchi, Masaki Kanazawa, Kazuya Aizawa, Norimasa Yamada, Toshiaki Ariyoshi, Takafumi Tsurumi, Yoshikazu Nomoto
  • Publication number: 20060202228
    Abstract: A semiconductor device is provided which comprises a heat-radiative support plate 5; and first and second semiconductor elements 1 and 2 mounted and layered on support plate 5 for alternate switching of first and second semiconductor elements 1 and 2. The arrangement of piling and securing first and second semiconductor elements 1 and 2 on support plate 5 improves integration degree of semiconductor elements 1 and 2, and reduces the occupation area on support plate 5. Alternate switching of first and second semiconductor elements 1 and 2 controls heat produced from first and second semiconductor elements 1 and 2 because one of first and second semiconductor elements 1 and 2 is turned on, while the other is turned off.
    Type: Application
    Filed: May 27, 2004
    Publication date: September 14, 2006
    Inventor: Masaki Kanazawa
  • Publication number: 20060186894
    Abstract: A voltage measurement device includes a first group of switches Q1, Q2, a second group of switches Q7, Q8 and a third groups of switches Q5, Q6. By turning on the third group of switches Q5, Q6, the first group of switches Q1, Q2 are turned on, so that a condenser C1 is charged by voltage impressed between a voltage input terminal A and a voltage input terminal B. While the first group of switches Q1, Q2 are turned off by tuning off the third group of switches Q5, Q6, the second group of switches Q7, Q8 are turned on, so that voltage retained in the condenser C1 is generated between a voltage output terminal G and a voltage output terminal H.
    Type: Application
    Filed: March 23, 2004
    Publication date: August 24, 2006
    Inventors: Akio Iwabuchi, Masaki Kanazawa, Kazuya Aizawa, Norimasa Yamada, Toshiaki Ariyoshi, Takafumi Tsurumi, Yoshikazu Nomoto
  • Publication number: 20050105239
    Abstract: A solenoid drive circuit includes a control circuit 2 which comprises a detector 6 with a resistor 6a for discerning current flow therethrough to produce electric signals that correspond to level of current flow through a solenoid 4 connected to the resistor 6a; an amplifier 7 for amplifying the electric signals from the resistor 6a; and an integrator 8 for integrating the amplified output from the amplifier 7. As integrator 8 is reset each time a PWM controller 3 generates at least one of the successive drive signals S3, an operational comparator 5 receives the latest updated and integrated values S8 of relatively small amount from the integrator 8, easily and promptly compares the updated values S8 from the integrator 8 and an objective current values to produce a deviation of the integrated values S8 from the objective current value, and provides the PWM controller 3 with a command value S5 indicative of the deviation.
    Type: Application
    Filed: September 15, 2004
    Publication date: May 19, 2005
    Inventors: Kiyokatsu Satoh, Masaki Kanazawa
  • Patent number: 6157284
    Abstract: For packaging an electric circuit of the kind having a coil or coils in addition to electronic components such as transistors, diodes, and capacitors, a plastic molding is provided which comprises a bobbin with a pair of flanges on its opposite ends. The coils are wound on the bobbin and retained in position thereon by the flanges. The electronic components of the circuit, such as transistors and diodes, are all integrally embedded in one of the flanges and electrically connected to sheet-metal terminals which also are partly embedded in the same flange.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: December 5, 2000
    Assignee: Sanken Electric Co., Ltd.
    Inventor: Masaki Kanazawa
  • Patent number: 6140779
    Abstract: A lighting system for a fluorescent lamp includes an inverter circuit having a pair of outputs between which is connected a resonant circuit of an inductor and a capacitor in series, with the discharge lamp connected in parallel with the capacitor. An inversely frequency dependent voltage is applied between the lamp electrodes according to a predefined resonance characteristic. During a preheat period, which precedes a lightup period during which the lamp is to be lit up with the commencement of an electric discharge between the lamp electrodes, the voltage is made lower in the first half than in the second, thereby averting the sudden flow of a large preheating current through the filamentary lamp electrodes.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: October 31, 2000
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Masaki Kanazawa, Hideki Nakamichi, Hironobu Sou
  • Patent number: 6121731
    Abstract: A lighting system for a fluorescent lamp includes an inverter circuit to which is connected a load circuit including a resonant circuit of an inductor and a capacitor in serial connection, with a lamp connected in parallel with the capacitor. An inversely frequency dependent voltage is applied between the lamp electrodes according to a predefined resonance characteristic such that the resonance frequency is less than a discharge start frequency at which the lamp is to start glowing. For lighting up the lamp the frequency of the inverter output voltage is changed from a first frequency that is higher than the discharge start frequency to a second frequency that is less than the resonance frequency. If the lamp accidentally goes off, the current flowing through the load circuit will advance out of phase with the inverter output voltage, possibly resulting in the destruction of the inverter switch or switches due to overcurrent.
    Type: Grant
    Filed: February 18, 1999
    Date of Patent: September 19, 2000
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Masaki Kanazawa, Hironobu Sou, Hideki Nakamichi, Nanjou Aoike