Abstract: A semiconductor device includes a substrate having a circuit region and a peripheral region disposed around and enclosing the circuit region in a plan view, a first interconnect layer formed on the substrate, a second interconnect layer formed on the first interconnect layer, a third interconnect layer formed on the second interconnect layer, and a guard ring formed in the peripheral region, wherein the guard ring includes a first interconnect formed in the first interconnect layer, and disposed around and enclosing the circuit region in a plan view, a second interconnect formed in the third interconnect layer, and disposed around and enclosing the circuit region in a plan view, and a first via connected to the first interconnect and to the second interconnect, and disposed in a groove shape along a perimeter edge of the substrate in a plan view.

Abstract: A semiconductor device includes a substrate having a circuit region and a peripheral region disposed around and enclosing the circuit region in a plan view, a first interconnect layer formed on the substrate, a second interconnect layer formed on the first interconnect layer, a third interconnect layer formed on the second interconnect layer, and a guard ring formed in the peripheral region, wherein the guard ring includes a first interconnect formed in the first interconnect layer, and disposed around and enclosing the circuit region in a plan view, a second interconnect formed in the third interconnect layer, and disposed around and enclosing the circuit region in a plan view, and a first via connected to the first interconnect and to the second interconnect, and disposed in a groove shape along a perimeter edge of the substrate in a plan view.

Abstract: A guide pin piercing jig includes a curved frame, a front cylinder unit provided at a front end of the frame, and a rear cylinder unit provided at a rear end of the frame, in which the front cylinder unit has a positioning projection and a boring aiming portion at a tip thereof, the rear cylinder unit has a plurality of parallel guide pin insertion cylinders into which to insert the guide pins and a tentative fixing unit provided at a tip of the rear cylinder unit, and the rear cylinder unit is provided at a rear end of the frame slidably so as be directed to a tip of the front cylinder unit. It becomes possible to aim at a proper portion of a living body bone through which to bore a bone tunnel and to pierce the living body bone with guide pins for hollow drills from behind the living body bone to the proper aiming portion in a proper direction.

Abstract: A guide pin piercing jig includes a cylinder unit and a frame having a positioning projection at a tip thereof, in which the cylinder unit has plural parallel guide pin insertion cylinders and tentative fixing unit and is attached to the frame slidably so as to be directed to the tip of the frame. It becomes possible to pierce living body bone with plural guide pins for hollow drills to a proper portion of a living body bone in a proper direction with parallel arrangement to form a bone tunnel that has a rectangular or elliptical opening and is suitable for tendon transplantation.

Abstract: A drill guide has a main body in which a drill insertion hole is formed and plural projection portions to be inserted into plural bone tunnels. The plural projection portions project forward from the main body parallel with the center line of the drill insertion hole, a virtual drill insertion hole which extends from the drill insertion hole of the main body is formed between the plural projection portions parallel with their center lines by cutting out confronting portions of the plural projection portions, and the length of at least one of the drill insertion hole and the virtual drill insertion hole is 5 mm or more. The drill guide can guide a drill so as to be correctly between plural bone tunnels bored through a living body bone without causing axis deviation so that a link bone tunnel for connecting the plural bone tunnels can be formed between them in the same direction as their direction.

Abstract: A semiconductor manufacturing method includes exposing on a photoresist film a first partial pattern of a contact hole, overlapping a part of a gate interconnection in alignment with an alignment mark formed simultaneously with forming the gate interconnection, exposing on the photoresist film a second partial pattern, overlapping a part of an active region in alignment with an alignment mark formed simultaneously with forming the active region, developing the photoresist film to form an opening at the portion where the first partial pattern and the second partial pattern have been exposed, and etching an insulation film to form a contact hole down to the gate interconnection and the source/drain diffused layer.

Abstract: A drill guide has a main body in which a drill insertion hole is formed and plural projection portions to be inserted into plural bone tunnels. The plural projection portions project forward from the main body parallel with the center line of the drill insertion hole, a virtual drill insertion hole which extends from the drill insertion hole of the main body is formed between the plural projection portions parallel with their center lines by cutting out confronting portions of the plural projection portions, and the length of at least one of the drill insertion hole and the virtual drill insertion hole is 5 mm or more. The drill guide can guide a drill so as to be correctly between plural bone tunnels bored through a living body bone without causing axis deviation so that a link bone tunnel for connecting the plural bone tunnels can be formed between them in the same direction as their direction.

Abstract: A guide pin piercing jig includes a curved frame, a front cylinder unit provided at a front end of the frame, and a rear cylinder unit provided at a rear end of the frame, in which the front cylinder unit has a positioning projection and a boring aiming portion at a tip thereof, the rear cylinder unit has a plurality of parallel guide pin insertion cylinders into which to insert the guide pins and a tentative fixing unit provided at a tip of the rear cylinder unit, and the rear cylinder unit is provided at a rear end of the frame slidably so as be directed to a tip of the front cylinder unit. It becomes possible to aim at a proper portion of a living body bone through which to bore a bone tunnel and to pierce the living body bone with guide pins for hollow drills from behind the living body bone to the proper aiming portion in a proper direction.

Abstract: A guide pin piercing jig includes a cylinder unit and a frame having a positioning projection at a tip thereof, in which the cylinder unit has plural parallel guide pin insertion cylinders and tentative fixing unit and is attached to the frame slidably so as to be directed to the tip of the frame. It becomes possible to pierce living body bone with plural guide pins for hollow drills to a proper portion of a living body bone in a proper direction with parallel arrangement to form a bone tunnel that has a rectangular or elliptical opening and is suitable for tendon transplantation.

Abstract: A semiconductor manufacturing method includes exposing on a photoresist film a first partial pattern of a contact hole, overlapping a part of a gate interconnection in alignment with an alignment mark formed simultaneously with forming the gate interconnection, exposing on the photoresist film a second partial pattern, overlapping a part of an active region in alignment with an alignment mark formed simultaneously with forming the active region, developing the photoresist film to form an opening at the portion where the first partial pattern and the second partial pattern have been exposed, and etching an insulation film to form a contact hole down to the gate interconnection and the source/drain diffused layer.

Abstract: A semiconductor manufacturing method includes exposing on a photoresist film a first partial pattern of a contact hole, overlapping a part of a gate interconnection in alignment with an alignment mark formed simultaneously with forming the gate interconnection, exposing on the photoresist film a second partial pattern, overlapping a part of an active region in alignment with an alignment mark formed simultaneously with forming the active region, developing the photoresist film to form an opening at the portion where the first partial pattern and the second partial pattern have been exposed, and etching an insulation film to form a contact hole down to the gate interconnection and the source/drain diffused layer.

Abstract: A semiconductor device includes a gate electrode formed over a semiconductor substrate, and a sidewall spacer formed on a sidewall of the gate electrode. The sidewall spacer formed along the sidewall parallel to a gate length direction of the gate electrode has a first thickness, and the sidewall spacer formed along the sidewall parallel to a gate width direction of the gate electrode has a second thickness that is greater than the first thickness.

Abstract: A semiconductor device includes a first p-channel FET, the first p-channel FET includes: a first fin-type semiconductor region; a first gate electrode crossing the first fin-type semiconductor region and defining a first p-channel region at an intersection of the first fin-type semiconductor region and the first gate electrode; p-type first source/drain regions, each formed on either side of the first gate electrode in the first fin-type semiconductor region; and first and second compressive stress generating regions formed by oxidizing regions located outside the p-type first source/drain regions in the first fin-type semiconductor region.

Abstract: A semiconductor device includes a gate electrode formed over a semiconductor substrate, and a sidewall spacer formed on a sidewall of the gate electrode. The sidewall spacer formed along the sidewall parallel to a gate length direction of the gate electrode has a first thickness, and the sidewall spacer formed along the sidewall parallel to a gate width direction of the gate electrode has a second thickness that is greater than the first thickness.

Abstract: A disclosed semiconductor device includes multiple gate electrodes disposed on a semiconductor substrate; and multiple sidewall spacers disposed on sidewalls of the gate electrodes. The thickness of the sidewall spacers is larger on the sidewalls along longer sides of the gate electrodes than on the sidewalls along shorter sides of the gate electrodes.

Abstract: A semiconductor manufacturing method includes exposing on a photoresist film a first partial pattern of a contact hole, overlapping a part of a gate interconnection in alignment with an alignment mark formed simultaneously with forming the gate interconnection, exposing on the photoresist film a second partial pattern, overlapping a part of an active region in alignment with an alignment mark formed simultaneously with forming the active region, developing the photoresist film to form an opening at the portion where the first partial pattern and the second partial pattern have been exposed, and etching an insulation film to form a contact hole down to the gate interconnection and the source/drain diffused layer.

Abstract: A disclosed semiconductor device includes multiple gate electrodes disposed on a semiconductor substrate; and multiple sidewall spacers disposed on sidewalls of the gate electrodes. The thickness of the sidewall spacers is larger on the sidewalls along longer sides of the gate electrodes than on the sidewalls along shorter sides of the gate electrodes.

Abstract: A disclosed semiconductor device includes multiple gate electrodes disposed on a semiconductor substrate; and multiple sidewall spacers disposed on sidewalls of the gate electrodes. The thickness of the sidewall spacers is larger on the sidewalls along longer sides of the gate electrodes than on the sidewalls along shorter sides of the gate electrodes.

Abstract: A disclosed semiconductor device includes multiple gate electrodes disposed on a semiconductor substrate; and multiple sidewall spacers disposed on sidewalls of the gate electrodes. The thickness of the sidewall spacers is larger on the sidewalls along longer sides of the gate electrodes than on the sidewalls along shorter sides of the gate electrodes.

Abstract: A semiconductor device is disclosed that includes a semiconductor substrate, a device region disposed at a predetermined location of the semiconductor substrate, and a shallow trench isolation region that isolates the device region. The shallow trench isolation region includes a trench, a nitride film liner disposed at an upper portion of a side wall of the trench, and a thermal oxide film disposed at a lower portion of the side wall of the trench. The shallow trench isolation is arranged such that the width of a second portion of the shallow trench isolation region at which the thermal oxide film is disposed may be wider than the width of a first portion of the shallow trench isolation region at which the lower end of the nitride film liner is disposed.