Patents by Inventor Masaki Tosaka

Masaki Tosaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090168859
    Abstract: A transmission characteristic adjustment device with high reliability in a transmission characteristic that can adjust a circuit before an error occurs and does not generate an error is provided. A transmission characteristic adjustment device that adjusts a transmission characteristic between a transmission element and a receiving element interposing a transmission path, includes: a sight test circuit that is provided on the receiving element side and detects an eye pattern aperture; a margin calculation circuit that calculates a margin with respect to a mask included in the detected eye pattern aperture; a circuit element adjustment circuit that evaluates a setting value of a circuit element of the transmission element or the receiving element having influence on a receiving waveform based on fluctuation of the calculated margin, and changes the setting value of the circuit element of the transmission element or the receiving element based on a result of the evaluation.
    Type: Application
    Filed: August 8, 2008
    Publication date: July 2, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Daita TSUBAMOTO, Makoto SUWADA, Hitoshi YOKEMURA, Masaki TOSAKA
  • Publication number: 20090167452
    Abstract: A transmission characteristic adjustment device and the like that can carry out circuit adjustment before an error occurs, and has a transmission characteristic with high reliability without generating an error are provided. The device determines existence or non-existence of a difference with respect to confirmed data based on each phase of a multiphase clock, detects a window width in a time axis direction of receiving data based on a result of the determination and a phase of the multiphase clock, and evaluates a setting value of a circuit element of the transmission element or the reception element that has an influence on a receiving waveform based on a fluctuation of the detected window width, and changes the setting value of the circuit element of the transmission element or the reception element based on a result of the evaluation.
    Type: Application
    Filed: August 5, 2008
    Publication date: July 2, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Daita TSUBAMOTO, Makoto Suwada, Hitoshi Yokemura, Masaki Tosaka
  • Patent number: 7337087
    Abstract: A circuit analyzing apparatus for analyzing operation characteristics of a circuit unit in which, on a substrate, circuit devices are arranged, has a part for automatically obtaining a value of a substrate parameter concerning the substrate for an operating frequency, which value depends on the operating frequency; and a part for analyzing operation of the circuit unit based on the value of the substrate parameter for the operating frequency.
    Type: Grant
    Filed: October 5, 2006
    Date of Patent: February 26, 2008
    Assignee: Fujitsu Limited
    Inventors: Megumi Nagata, Masaki Tosaka, Makoto Suwada
  • Patent number: 7313509
    Abstract: A simulation method makes a noise analysis based on parameters including a conductor resistance which takes skin effect into consideration. The simulation method calculates a first resistance of one of conductors having a largest cross sectional area, obtains a predetermined pitch which saturates a diagonal component of a second resistance of a conductor with reference to the first resistance and makes the diagonal component approximately constant, by varying a pitch of the conductors, calculates the parameters for each pitch with respect to one of the pitches larger than or equal to the predetermined pitch and the pitches smaller than the predetermined pitch, and substitutes the parameters calculated for the one of the pitches with respect to the other of the pitches, and outputs calculation results.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: December 25, 2007
    Assignee: Fujitsu Limited
    Inventors: Megumi Nagata, Masaki Tosaka
  • Publication number: 20070294048
    Abstract: A circuit analyzing apparatus for analyzing operation characteristics of a circuit unit in which, on a substrate, circuit devices are arranged, has a part for automatically obtaining a value of a substrate parameter concerning the substrate for an operating frequency, which value depends on the operating frequency; and a part for analyzing operation of the circuit unit based on the value of the substrate parameter for the operating frequency.
    Type: Application
    Filed: October 5, 2006
    Publication date: December 20, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Megumi Nagata, Masaki Tosaka, Makoto Suwada
  • Patent number: 7280953
    Abstract: A noise countermeasure determination method includes the step of obtaining an analyzing circuit judgement result by judging acceptability of the analyzing circuit based on a comparison of features of the analyzing circuit and transmission circuit topologies, and outputting an improvement proposal for making the analyzing circuit closer to one of basic types of the transmission circuit topologies depending on the analyzing circuit judgement result.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: October 9, 2007
    Assignee: Fujitsu Limited
    Inventors: Shogo Fujimori, Yasuhiro Yamashita, Ryoji Yamada, Masaki Tosaka, Kazuhiko Tokuda, Jiro Yoneda, Makoto Suwada, Tatsuo Koizumi
  • Publication number: 20070198957
    Abstract: A circuit simulator includes: a DC analysis section which analyses a static stable potential on a transmission circuit if a capacitor which blocks a DC current while allowing an AC current to pass therethrough is connected in series in the line of the transmission circuit; and an initial potential application section which applies, as an initial potential in the simulation, the stable potential obtained by the DC analysis section to an application position on the upstream side of the capacitor in the flow of the signal through the transmission circuit. The simulator also includes a circuit simulation section which performs the simulation of the transmission circuit under the initial potential applied by the initial potential application section.
    Type: Application
    Filed: September 5, 2006
    Publication date: August 23, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Makoto Suwada, Masaki Tosaka, Megumi Nagata
  • Patent number: 7136797
    Abstract: The apparatus comprises the syntax checking section that checks the syntax of a device model according to a check table showing the relation between the syntax of the device model showing electrical characteristics of a semiconductor device and an amendment when deviating from the syntax. The syntax error amendment creating section corrects the device model according to a corresponding amendment when a description deviating from the syntax is checked by the syntax checking section.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: November 14, 2006
    Assignee: Fujitsu Limited
    Inventors: Masaki Tosaka, Toshio Karino, Tatsuo Koizumi, Jiro Yoneda, Megumi Nagata, Hiroyuki Orihara, Hikoyuki Kawata
  • Patent number: 7103525
    Abstract: The high-frequency-corresponding simulation apparatus includes a control section that calculates a sum of the DC resistance value and skin resistance value of each of a plurality of elements corresponding to wiring patterns in accordance with circuit deign information, sorts resistance values corresponding to the elements by using a high-frequency element delay as a key when the total resistance value is equal to or larger than a first threshold value, integrates resistance values starting with a resistance value having the smallest high-frequency element delay, and which determines whether the result of the integration reaches a value immediately before a second threshold value whenever the integration is executed and a RLC-model analysis section.
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: September 5, 2006
    Assignee: Fujitsu Limited
    Inventors: Makoto Suwada, Tatsuo Koizumi, Masaki Tosaka, Kazuhiko Tokuda, Jiro Yoneda
  • Patent number: 7065480
    Abstract: A noise countermeasure determination method includes the steps of calculating recommended circuit information considered to minimize a noise by use of at least one formula, based on input circuit information amounting to at least one net of a target circuit which is to be subjected to a noise analysis, and comparing the input circuit information and the recommended circuit information, and determining a differing portion of the recommended circuit information differing from the input circuit information, as noise countermeasures.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: June 20, 2006
    Assignee: Fujitsu Limited
    Inventors: Shogo Fujimori, Yasuhiro Yamashita, Ryoji Yamada, Masaki Tosaka, Kazuhiko Tokuda, Jiro Yoneda, Makoto Suwada, Tatsuo Koizumi
  • Patent number: 7035783
    Abstract: In a simulation considering a skin effect, a signal conductor is vertically and horizontally divided by faces parallel to the surface of the signal conductor, which are set so that intervals are smaller as the faces are nearer to the surface, and larger as the faces are farther from the surface. Also a ground conductor is vertically divided with a similar method, and an integration calculation is made, so that the resistance of the signal conductor, which corresponds to a given frequency, is obtained.
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: April 25, 2006
    Assignee: Fujitsu LImited
    Inventors: Megumi Nagata, Masaki Tosaka, Kazuhiko Tokuda, Hiroyuki Orihara, Hikoyuki Kawata
  • Publication number: 20060036421
    Abstract: An electromagnetic field simulator of the present invention includes: a search section; a domain setting section; an individual characteristic calculation sections; and a characteristic connection section. The search section searches discontinuous parts having a predetermined discontinuous shape on the conductor wiring. The domain setting section sets an analysis domain including the conductor wiring as a set of simulation domains so that the discontinuous parts as well as the wiring parts in a predetermined range around the discontinuous parts are included in the same simulation domain. The individual characteristic calculation sections calculate the characteristic by simulating the electromagnetic field for each simulation domain set by the domain setting section. The characteristic connection section connects characteristics of the respective simulation domains calculated by the individual characteristic calculation section and calculates a characteristic of the entire conductor wiring.
    Type: Application
    Filed: December 3, 2004
    Publication date: February 16, 2006
    Applicant: Fujitsu Limited
    Inventors: Akio Sekino, Masaki Tosaka, Yuuji Suwa, Jirou Yoneda, Megumi Nagata
  • Patent number: 6925430
    Abstract: The apparatus includes the wiring-model generation section that generates a wiring model in accordance with high-frequency-circuit design information; the random-pattern analysis section that generates and analyzes a dummy random-pattern waveform for transmitting a wiring model in accordance with a command including the bit information of a random-pattern waveform and a differential waveform corresponding to the dummy random-pattern waveform; and the skew analysis section that skews a random-pattern waveform or differential waveform in accordance with a preset skew width.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: August 2, 2005
    Assignee: Fujitsu Limited
    Inventors: Makoto Suwada, Tatsuo Koizumi, Masaki Tosaka, Kazuhiko Tokuda, Jiro Yoneda
  • Patent number: 6915249
    Abstract: In order to achieve augmentation of the accuracy in calculation of noise and augmentation of the accuracy in a noise check which is performed, for example, when an electronic circuit is designed and further realize significant reduction of the time required for a noise check and augmentation of the operation efficiency by reduction of the man-hours of a designer in a noise analysis, a noise checking apparatus includes a model production section (3) for producing a simulation model of a circuit portion relating to a noticed wiring line, a simulation section (4) for performing a simulation using the simulation model to calculate a signal waveform which propagates in the noticed wiring line and calculate a noise waveform superposed on the signal waveform for each kind of noise, a noise waveform synthesis section (5) for synthesizing the signal waveform and the noise waveforms with generation timings of the noise waveforms taken into consideration to obtain a noise composite waveform, and a noise checking section
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: July 5, 2005
    Assignee: Fujitsu Limited
    Inventors: Toshiro Sato, Yuji Suwa, Yoshiyuki Iwakura, Kazunari Gotou, Toshiaki Sato, Kazuyoshi Kanei, Masaki Tosaka, Yasuhiro Yamashita
  • Publication number: 20030233193
    Abstract: A simulation method makes a noise analysis based on parameters including a conductor resistance which takes skin effect into consideration. The simulation method calculates a first resistance of one of conductors having a largest cross sectional area, obtains a predetermined pitch which saturates a diagonal component of a second resistance of a conductor with reference to the first resistance and makes the diagonal component approximately constant, by varying a pitch of the conductors, calculates the parameters for each pitch with respect to one of the pitches larger than or equal to the predetermined pitch and the pitches smaller than the predetermined pitch, and substitutes the parameters calculated for the one of the pitches with respect to the other of the pitches, and outputs calculation results.
    Type: Application
    Filed: January 16, 2003
    Publication date: December 18, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Megumi Nagata, Masaki Tosaka
  • Patent number: 6662132
    Abstract: A noise analyzing method analyzes a crosstalk noise based on circuit data in which buses having the same signal transmitting direction and buses having opposite signal transmitting directions are distinguished from each other, by analyzing the crosstalk noise only for the same signal transmitting direction with respect to the buses having the same signal transmitting direction.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: December 9, 2003
    Assignee: Fujitsu Limited
    Inventors: Yasuhiro Yamashita, Shogo Fujimori, Ryoji Yamada, Kazuhiko Tokuda, Makoto Suwada, Masaki Tosaka, Jiro Yoneda, Yoshiyuki Iwakura, Kazunari Gotou
  • Publication number: 20030083853
    Abstract: In a simulation considering a skin effect, a signal conductor is vertically and horizontally divided by faces parallel to the surface of the signal conductor, which are set so that intervals are smaller as the faces are nearer to the surface, and larger as the faces are farther from the surface. Also a ground conductor is vertically divided with a similar method, and an integration calculation is made, so that the resistance of the signal conductor, which corresponds to a given frequency, is obtained.
    Type: Application
    Filed: January 23, 2002
    Publication date: May 1, 2003
    Applicant: Fujitsu Limited
    Inventors: Megumi Nagata, Masaki Tosaka, Kazuhiko Tokuda, Hiroyuki Orihara, Hikoyuki Kawata
  • Publication number: 20020156607
    Abstract: The apparatus comprises the syntax checking section that checks the syntax of a device model according to a check table showing the relation between the syntax of the device model showing electrical characteristics of a semiconductor device and an amendment when deviating from the syntax. The syntax error amendment creating section corrects the device model according to a corresponding amendment when a description deviating from the syntax is checked by the syntax checking section.
    Type: Application
    Filed: July 19, 2001
    Publication date: October 24, 2002
    Applicant: Fujitsu Limited
    Inventors: Masaki Tosaka, Toshio Karino, Tatsuo Koizumi, Jiro Yoneda, Megumi Nagata, Hiroyuki Orihara, Hikoyuki Kawata
  • Publication number: 20020032555
    Abstract: The apparatus includes the wiring-model generation section that generates a wiring model in accordance with high-frequency-circuit design information; the random-pattern analysis section that generates and analyzes a dummy random-pattern waveform for transmitting a wiring model in accordance with a command including the bit information of a random-pattern waveform and a differential waveform corresponding to the dummy random-pattern waveform; and the skew analysis section that skews a random-pattern waveform or differential waveform in accordance with a preset skew width.
    Type: Application
    Filed: September 5, 2001
    Publication date: March 14, 2002
    Applicant: Fujitsu Limited
    Inventors: Makoto Suwada, Tatsuo Koizumi, Masaki Tosaka, Kazuhiko Tokuda, Jiro Yoneda
  • Publication number: 20020032556
    Abstract: The high-frequency-corresponding simulation apparatus includes a control section that calculates a sum of the DC resistance value and skin resistance value of each of a plurality of elements corresponding to wiring patterns in accordance with circuit deign information, sorts resistance values corresponding to the elements by using a high-frequency element delay as a key when the total resistance value is equal to or larger than a first threshold value, integrates resistance values starting with a resistance value having the smallest high-frequency element delay, and which determines whether the result of the integration reaches a value immediately before a second threshold value whenever the integration is executed and a RLC-model analysis section.
    Type: Application
    Filed: August 15, 2001
    Publication date: March 14, 2002
    Applicant: Fujitsu Limited
    Inventors: Makoto Suwada, Tatsuo Koizumi, Masaki Tosaka, Kazuhiko Tokuda, Jiro Yoneda