Abstract: In a semiconductor device capable of radio communication, a stable clock signal is generated even if a reference clock signal for generating a clock signal has varied frequencies in each cycle. A clock signal generation circuit includes an edge detection circuit that detects an edge of an input signal and generates a synchronization signal, a reference clock signal generation circuit that generates a clock signal which functions as reference, a counter circuit that counts the number of edges of rise of the reference clock signal in accordance with the synchronization signal, a duty ratio selection circuit that selects a duty ratio of a clock signal from a count value, and a frequency division circuit that generates the clock signal having the selected duty ratio.

Abstract: A low-power-consumption semiconductor device and a driving method thereof where a clock signal generation is controlled. A transmission and reception control circuit to control signal communication with an outside; a ring oscillator control circuit to detect an edge in a receiving signal and control a ring oscillator; a clock generation circuit to generate a clock signal based on the ring oscillator; and a logic circuit to operate based on a clock signal are included. During signal communication between the transmission and reception control circuit and the outside, the ring oscillator operates and a clock signal is output from the clock generation circuit when the ring oscillator control circuit detects an edge in a receiving signal, and the ring oscillator stops and output of the clock signal from the clock generation circuit stops when transmission of a reply signal from the transmission and reception control circuit to the outside is terminated.

Abstract: A muffler hanger including: a rubber annular portion; a rubber arm constituting an elastic support portion for the muffler; an upper space and a lower space for permitting deformation of the rubber arm; a first mounting hole disposed in a center of the rubber arm in a vehicle left-right direction to extend in a vehicle front-back direction when installed on the vehicle, and attached in a mated condition to a support pin provided on one of a muffler side and a vehicle body side; and a pair of second mounting holes disposed at locations away to right and left sides from the first mounting hole to extend in the front-back direction, and attached in a mated condition to support pins on the other side. The first and second mounting holes are arranged to form a row in the left-right direction, with positional relationships such that when installed on the vehicle the holes overlaps one another as viewed in the left-right direction.

Abstract: The semiconductor device is provided with a clock signal generation circuit that includes a reference clock signal generation circuit which generates a first reference clock signal, a first counter circuit which counts the number of rising edges of the first reference clock signal by using the first reference clock signal and a synchronizing signal, a second counter circuit which counts the number of rising edges of the first reference clock signal by using an enumerated value of the first counter circuit, a first divider circuit which divides a frequency of the first reference clock signal by using the enumerated value of the first counter circuit and generates a second reference clock signal, and a second divider circuit which divides a frequency of the second reference clock signal and generates a clock signal.

Abstract: In a semiconductor device capable of radio communication, a stable clock signal is generated even if a reference clock signal for generating a clock signal has varied frequencies in each cycle. A clock signal generation circuit includes an edge detection circuit that detects an edge of an input signal and generates a synchronization signal, a reference clock signal generation circuit that generates a clock signal which functions as reference, a counter circuit that counts the number of edges of rise of the reference clock signal in accordance with the synchronization signal, a duty ratio selection circuit that selects a duty ratio of a clock signal from a count value, and a frequency division circuit that generates the clock signal having the selected duty ratio.

Abstract: A fluid filled type cylindrical vibration damping device, wherein a circumferential end of a stopper member is formed as a mating element smaller in diameter than a circumferentially center section of the stopper member, and is juxtaposed against and supported on a bottom face of a mating groove in a communication passage, to form the communication passage along an entire area between diametrically opposed faces of the mating element and an outer tubular member. A cutout portion is formed extending in a circumferential direction from a circumferential end in a widthwise medial section of the mating element, with the communication passage opening into and communicating with a first fluid chamber at a distal end section of the cutout portion, and at two widthwise side sections of the mating element, respectively, thereby defining an orifice passage connecting the first fluid chamber with a second fluid chamber.

Abstract: An object of the present invention is to provide a display device in which a frame frequency does not decrease even in the case of employing a method for driving having little difference between reading time of a memory and writing time of a memory. According to the present invention, a reading device and a writing device are synchronized by determining allotment of two memories every cycle of a writing signal and by determining a start of reading through a start signal for writing and horizontal synchronizing signals.

Abstract: According to the invention, a compact and inexpensive with low power consumption memory and low access speed can be used for a panel controller and a deterioration compensation circuit of a display device. In a display device of a digital gray scale method, a plurality of pixels of a display panel are divided into first to n-th pixel regions (n is 2 or more) and a format converter portion of a panel controller converts the format of only video data corresponding to one of first to n-th pixel regions and writes the data to one of first and second video memories in each frame period. A display control portion reads out video data that is converted in format and corresponds to one of first to n-th pixel regions in which video data is written to the other of the first and second video memories in the preceding frame period, and transmits the data to the display panel.

Abstract: A muffler hanger including: a rubber annular portion; a rubber arm constituting an elastic support portion for the muffler; an upper space and a lower space for permitting deformation of the rubber arm; a first mounting hole disposed in a center of the rubber arm in a vehicle left-right direction to extend in a vehicle front-back direction when installed on the vehicle, and attached in a mated condition to a support pin provided on one of a muffler side and a vehicle body side; and a pair of second mounting holes disposed at locations away to right and left sides from the first mounting hole to extend in the front-back direction, and attached in a mated condition to support pins on the other side. The first and second mounting holes are arranged to form a row in the left-right direction, with positional relationships such that when installed on the vehicle the holes overlaps one another as viewed in the left-right direction.

Abstract: The invention is made in view of solving problems in reduction in yield and an aperture ratio in accordance with an increase in the number of transistors which form a pixel, increase in power consumption for holding predetermined luminance to provide a light emitting device having a noble pixel configuration. A light emitting device of the invention includes a unit for applying a forward bias voltage to a first light emitting element so that a first pixel emits light and applying a reverse bias voltage to a second light emitting element, and a unit for applying a reverse bias voltage to the first light emitting element so that the first pixel emits no light and applying a forward bias voltage to the second light emitting element.

Abstract: An engine mount including: an inner fitting having a first flange at a first axial end thereof; a cylindrical outer fitting having at a first axial end a second flange extending outwardly in the axis-perpendicular direction and positioned in opposition to but spaced apart from the first flange portion in an axial direction; a side rubber elastic body elastically connecting the first and second flanges; a main rubber elastic body elastically connecting the inner fitting and the outer fitting in a direction of axial elongation of the side portion rubber elastic body; and a hollow portion extending from a second axial end toward a first axial end of the main rubber elastic body with a distal and thereof reaching an interior of the side rubber elastic body, thereby bifurcating the main rubber elastic body at an inside circumferential face of the outer fitting. The engine mount is positioned with the axial direction facing a left-right direction of the vehicle.

Abstract: A low-power-consumption semiconductor device and a driving method thereof where a clock signal generation is controlled. A transmission and reception control circuit to control signal communication with an outside; a ring oscillator control circuit to detect an edge in a receiving signal and control a ring oscillator; a clock generation circuit to generate a clock signal based on the ring oscillator; and a logic circuit to operate based on a clock signal are included. During signal communication between the transmission and reception control circuit and the outside, the ring oscillator operates and a clock signal is output from the clock generation circuit when the ring oscillator control circuit detects an edge in a receiving signal, and the ring oscillator stops and output of the clock signal from the clock generation circuit stops when transmission of a reply signal from the transmission and reception control circuit to the outside is terminated.

Abstract: In a semiconductor device capable of radio communication, a stable clock signal is generated even if a reference clock signal for generating a clock signal has varied frequencies in each cycle. A clock signal generation circuit includes an edge detection circuit that detects an edge of an input signal and generates a synchronization signal, a reference clock signal generation circuit that generates a clock signal which functions as reference, a counter circuit that counts the number of edges of rise of the reference clock signal in accordance with the synchronization signal, a duty ratio selection circuit that selects a duty ratio of a clock signal from a count value, and a frequency division circuit that generates the clock signal having the selected duty ratio.

Abstract: An object is to provide a clock generating circuit that can suppress variation of an oscillation frequency from the clock generating circuit, which is due to a change in the output voltage according to a discharging characteristic of the battery, and effectively utilize the remaining power of the battery. A structure includes an output voltage detecting circuit for detecting an output voltage from a battery; a frequency-division number determining circuit for determining the number of frequency-division by a value of the output voltage detected by the output voltage detecting circuit; an oscillation circuit for outputting a reference clock signal depending on the output voltage; a counter circuit for counting a number of waves of the reference clock signal that depends on the number of frequency-division; and a frequency-dividing circuit that frequency-divides the reference clock signal depending on the number of waves counted by the counter circuit.

Abstract: The semiconductor device is provided with a clock signal generation circuit that includes a reference clock signal generation circuit which generates a first reference clock signal, a first counter circuit which counts the number of rising edges of the first reference clock signal by using the first reference clock signal and a synchronizing signal, a second counter circuit which counts the number of rising edges of the first reference clock signal by using an enumerated value of the first counter circuit, a first divider circuit which divides a frequency of the first reference clock signal by using the enumerated value of the first counter circuit and generates a second reference clock signal, and a second divider circuit which divides a frequency of the second reference clock signal and generates a clock signal.

Abstract: Regarding the time gradation method as the digital gradation expression method, it is an object of the invention to provide a display device which prevents a reduction of frame frequency and implements a low-power-consumption SRAM. The invention overcomes the aforementioned disadvantages of conventional technique by synchronizing a writing and reading by utilizing read and write signals of which states read at a certain timing to select which of two memories is efficient to be written.

Abstract: A semiconductor device is provided with a power supply circuit having a function to generate a power supply voltage from a wireless signal and an A/D converter circuit having a function to detect the strength of the wireless signal by an A/D conversion of a voltage generated from the wireless signal. This enables to provide a semiconductor device which does not require replacement of batteries, has few limitations on its physical shape and mass, and has a function to detect a physical position. By formation of the semiconductor device with use of a thin film transistor formed over a plastic substrate, a lightweight semiconductor device, which has flexibility in physical shape and a function to detect a physical location, can be provided at low cost.

Abstract: A torque rod comprising: a first and second bushing disposed at both ends of the resin torque rod, each bushing having a resin outer casing and a rigid inner casing and a rubber elastic body interposed between the outer and inner casings, and a connecting component for connecting the first and second bushings, The connecting component has a predetermined breaking location adapted to be broken upon input of a substantial load during collisions, the predetermined breaking location includes a thin-walled portion provided at a location where the thin-walled portion undergoes compression break upon input of the substantial load, and a thick-walled portion provided at a location apart from a central axis of the connecting component in a perpendicular direction to the central axis of the connecting component.

Abstract: Objects of the invention are to provide a clock generation circuit, in which, even when different clock signals are used among a plurality of circuits such as a transmitting circuit and a receiving circuit, stabilized communication is possible; and to provide a semiconductor device including the clock generation circuit. The clock generation circuit includes an edge detection circuit, a reference clock generation circuit, a reference clock counter circuit, and a frequency-divider circuit. The reference clock counter circuit is a circuit which outputs a counter value, which is obtained by counting the number of waves of a reference clock signal outputted from the reference clock generation circuit, in a period of time from when the edge detection circuit detects an edge of a signal which is externally inputted to the edge detection circuit to when the edge detection circuit detects the next edge, to the frequency-divider circuit.

Abstract: Regarding the time gradation method as the digital gradation expression method, it is an object of the invention to provide a display device which prevents a reduction of frame frequency and implements a low-power-consumption SRAM. The invention overcomes the aforementioned disadvantages of conventional technique by synchronizing a writing and reading by utilizing read and write signals of which states read at a certain timing to select which of two memories is efficient to be written.