Patents by Inventor Masami Hayashi

Masami Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12166019
    Abstract: The present disclosure has an object to hinder reduction of a yield due to a failure in an LED element or a mounting failure in a self light emitting apparatus. In a self light emitting apparatus, each pixel includes one basic cell and at least one redundant cell as a subpixel. The redundant cell includes an LED element that emits light of a color the same as at least one LED element out of LED elements included in the basic cell. A plurality of subpixels included in each pixel are configured as a subpixel group being an assembly that includes a plurality of LED elements being integrated. An array pitch of the subpixels in the subpixel group is smaller than an array pitch of the subpixels in adjacent ones of a plurality of subpixel groups.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: December 10, 2024
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Manabu Iwakawa, Kazumasa Katayama, Hidetada Tokioka, Takanori Okumura, Masami Hayashi, Shinsaku Yamaguchi
  • Patent number: 11719974
    Abstract: A time required to manufacture a self-luminous body for a display apparatus is shortened. A self-luminous body for a display apparatus includes a backplane and a plurality of stacks. The plurality of stacks are arranged on a backplane. Each stack includes a plurality of integrated self-luminous elements. The plurality of self-luminous elements in each stack include at least two self-luminous elements that are arranged at a first pitch and emit light of the same color. The plurality of stacks include a first stack and a second stack adjacent to each other. The self-luminous element of the first stack and the self-luminous element of the second stack that emits light of the same color as a color of light emitted by the self-luminous element of the first stack are arranged at a second pitch larger than the first pitch.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: August 8, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takanori Okumura, Kazumasa Katayama, Hidetada Tokioka, Masami Hayashi, Manabu Iwakawa, Shinsaku Yamaguchi
  • Publication number: 20230246005
    Abstract: The present disclosure has an object to hinder reduction of a yield due to a failure in an LED element or a mounting failure in a self light emitting apparatus. In a self light emitting apparatus, each pixel includes one basic cell and at least one redundant cell as a subpixel. The redundant cell includes an LED element that emits light of a color the same as at least one LED element out of LED elements included in the basic cell. A plurality of subpixels included in each pixel are configured as a subpixel group being an assembly that includes a plurality of LED elements being integrated. An array pitch of the subpixels in the subpixel group is smaller than an array pitch of the subpixels in adjacent ones of a plurality of subpixel groups.
    Type: Application
    Filed: June 23, 2020
    Publication date: August 3, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Manabu IWAKAWA, Kazumasa KATAYAMA, Hidetada TOKIOKA, Takanori OKUMURA, Masami HAYASHI, Shinsaku YAMAGUCHI
  • Publication number: 20230033925
    Abstract: A time required to manufacture a self-luminous body for a display apparatus is shortened. A self-luminous body for a display apparatus includes a backplane and a plurality of stacks. The plurality of stacks are arranged on a backplane. Each stack includes a plurality of integrated self-luminous elements. The plurality of selfluminous elements in each stack include at least two self-luminous elements that are arranged at a first pitch and emit light of the same color. The plurality of stacks include a first stack and a second stack adjacent to each other. The self-luminous element of the first stack and the self-luminous element of the second stack that emits light of the same color as a color of light emitted by the self-luminous element of the first stack are arranged at a second pitch larger than the first pitch.
    Type: Application
    Filed: February 3, 2020
    Publication date: February 2, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takanori OKUMURA, Kazumasa KATAYAMA, Hidetada TOKIOKA, Masami HAYASHI, Manabu IWAKAWA, Shinsaku YAMAGUCHI
  • Publication number: 20230010984
    Abstract: Regarding a tactile presentation panel, a tactile presentation panel that has a tactile presentation knob having a conductive member placed on an operation surface and presents a tactile sense to a user via the tactile presentation knob includes a movement amount calculation circuit that calculates a movement amount of the tactile presentation knob from current coordinates on the tactile presentation panel of the tactile presentation knob and past coordinates of the tactile presentation knob, a tactile strength calculation circuit that calculates a tactile strength to be applied to the user based on the movement amount, and a tactile presentation circuit that sets a voltage signal waveform based on the tactile strength. The movement amount is at least one of a rotation angle and a rotation speed of the tactile presentation knob.
    Type: Application
    Filed: December 26, 2019
    Publication date: January 12, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Masami HAYASHI, Tae ORITA, Yoshinori UENO, Mitsuru SAKAI, Naoki NUMATA, Yuki FURUMOTO, Tsuyoshi SEMPUKU, Yuichi SASAKI
  • Patent number: 10716218
    Abstract: A display device is provided with a laminated wiring including a low-resistance conductive film, a low-reflection film mainly containing Al and functioning as a reflection preventing film, and a cap film which are sequentially laminated on a transparent substrate, and an insulting film formed so as to cover the laminated wiring.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: July 14, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masami Hayashi, Kenichi Miyamoto, Nobuaki Ishiga, Kensuke Nagayama, Naoki Tsumura
  • Patent number: 10566437
    Abstract: A first oxide semiconductor region serving as a channel region of a TFT is formed on a first insulating region of a gate insulating film whose hydrogen content is comparatively low, and a second oxide semiconductor region that contacts with a source electrode and a drain electrode is formed on a second insulating region of a gate insulating film whose hydrogen content is comparatively high. For this reason, sheet resistance R1 of the first oxide semiconductor region is comparatively high, and sheet resistance R3 of the second oxide semiconductor region is comparatively low so that R1>R3.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: February 18, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventor: Masami Hayashi
  • Patent number: 10324323
    Abstract: A display apparatus according to the present invention includes a first polarizing film, a first insulating substrate, a second insulating substrate, and a second polarizing film that are located in the stated order in a light path from a light source toward a display surface. The second polarizing film has a polarization axis parallel or perpendicular to a polarization axis of the first polarizing film. The first insulating substrate and the second insulating substrate each include a transparent substrate having insulating properties. At least the first insulating substrate or the second insulating substrate includes lower wiring that is located on the transparent substrate and is opaque and a fine pattern that is located in a preceding stage or a subsequent stage of the lower wiring in the light path and is opposed to the lower wiring with a transparent insulating film therebetween.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: June 18, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventor: Masami Hayashi
  • Patent number: 10120228
    Abstract: Provided is a display device that is thin in its entirety and has a high contrast. The display device according to the present invention includes an array substrate provided with multiple pixels in array, and a counter substrate oppositely disposed above the array substrate with a liquid crystal layer interposed between the counter substrate and the array substrate. The counter substrate includes a touch sensor wiring pattern disposed in such a manner that at least part of the touch sensor wiring pattern is not parallel or orthogonal to a first polarization axis of polarization light incident on the liquid crystal layer from close to the array substrate. The counter substrate also includes a polarization layer closer to the liquid crystal layer than to the touch sensor wiring pattern, having a second polarization axis with an angle of 0 degrees or 90 degrees with respect to the first polarization axis.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: November 6, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventor: Masami Hayashi
  • Patent number: 9910199
    Abstract: A display includes: a laminated wiring with a conductive film arranged on a foundation layer, and a transparent film and a translucent film arranged on the conductive film; a wiring terminal part arranged at an edge portion of the laminated wiring and having the same laminated structure as that of the laminated wiring; and an insulating film that covers the laminated wiring and the wiring terminal part.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: March 6, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masami Hayashi, Kenichi Miyamoto, Nobuaki Ishiga, Naoki Tsumura, Kensuke Nagayama
  • Patent number: 9864474
    Abstract: A contact hole that penetrates a protective insulating film, an interlayer insulating film, and a transparent cap film and has a surface of a low-reflection film uncovered as a bottom surface is formed in a lead-out wiring region. A lower-layer terminal portion is formed by the low-reflection film and a low-resistance conductive film below the bottom surface of the contact hole. A contact hole that penetrates the protective insulating film and a transparent cap film and has a surface of a low-reflection film uncovered as a bottom surface is formed in the lead-out wiring region. An upper-layer terminal portion is formed by the low-reflection film and a low-resistance conductive film below the bottom surface of the contact hole.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: January 9, 2018
    Assignee: Mitsuibishi Electric Corporation
    Inventors: Masami Hayashi, Masaru Aoki
  • Patent number: 9759969
    Abstract: A pixel electrode of an array substrate is connected with a drain electrode of a TFT via a first aperture formed on a second interlayer insulating film, a second aperture that includes a bottom portion of the first aperture and is formed on a common electrode, a third aperture that includes at least a part of the bottom portion of the first aperture, is included in a second aperture and is formed on a third interlayer insulating film, and a fourth aperture that is formed on the first interlayer insulating film in a region where the third aperture overlaps with the bottom portion of the first aperture.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: September 12, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masami Hayashi, Takafumi Hashiguchi
  • Patent number: 9727189
    Abstract: In a lead-out wiring area, a protective conductive film is formed on a bottom surface and a side surface of a first contact hole including a surface of a first low resistance conductive film, and a part of a surface of an upper interlayer insulating film, and a second protective conductive film is formed on a bottom surface and a side surface of a second contact hole including a surface of a second low resistance conductive film, and a part of the surface of the upper interlayer insulating film. Then, a lower layer terminal part for a lower layer wiring line is formed of a laminated structure of the first low resistance conductive film and the first protective conductive film, and an upper layer terminal part for an upper layer wiring line is formed of a laminated structure of the second low resistance conductive film and the second protective conductive film.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: August 8, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masami Hayashi, Masaru Aoki, Toru Takeguchi
  • Publication number: 20170068140
    Abstract: A pixel electrode of an array substrate is connected with a drain electrode of a TFT via a first aperture formed on a second interlayer insulating film, a second aperture that includes a bottom portion of the first aperture and is formed on a common electrode, a third aperture that includes at least a part of the bottom portion of the first aperture, is included in a second aperture and is formed on a third interlayer insulating film, and a fourth aperture that is formed on the first interlayer insulating film in a region where the third aperture overlaps with the bottom portion of the first aperture.
    Type: Application
    Filed: November 21, 2016
    Publication date: March 9, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Masami HAYASHI, Takafumi HASHIGUCHI
  • Publication number: 20170062580
    Abstract: A first oxide semiconductor region serving as a channel region of a TFT is formed on a first insulating region of a gate insulating film whose hydrogen content is comparatively low, and a second oxide semiconductor region that contacts with a source electrode and a drain electrode is formed on a second insulating region of a gate insulating film whose hydrogen content is comparatively high. For this reason, sheet resistance R1 of the first oxide semiconductor region is comparatively high, and sheet resistance R3 of the second oxide semiconductor region is comparatively low so that R1>R3.
    Type: Application
    Filed: August 19, 2016
    Publication date: March 2, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventor: Masami HAYASHI
  • Publication number: 20170023817
    Abstract: A display apparatus according to the present invention includes a first polarizing film, a first insulating substrate, a second insulating substrate, and a second polarizing film that are located in the stated order in a light path from a light source toward a display surface. The second polarizing film has a polarization axis parallel or perpendicular to a polarization axis of the first polarizing film. The first insulating substrate and the second insulating substrate each include a transparent substrate having insulating properties. At least the first insulating substrate or the second insulating substrate includes lower wiring that is located on the transparent substrate and is opaque and a fine pattern that is located in a preceding stage or a subsequent stage of the lower wiring in the light path and is opposed to the lower wiring with a transparent insulating film therebetween.
    Type: Application
    Filed: July 21, 2016
    Publication date: January 26, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventor: Masami HAYASHI
  • Patent number: 9553111
    Abstract: A pixel electrode of an array substrate is connected with a drain electrode of a TFT via a first aperture formed on a second interlayer insulating film, a second aperture that includes a bottom portion of the first aperture and is formed on a common electrode, a third aperture that includes at least a part of the bottom portion of the first aperture, is included in a second aperture and is formed on a third interlayer insulating film, and a fourth aperture that is formed on the first interlayer insulating film in a region where the third aperture overlaps with the bottom portion of the first aperture.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: January 24, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masami Hayashi, Takafumi Hashiguchi
  • Publication number: 20160356933
    Abstract: A display includes: a laminated wiring with a conductive film arranged on a foundation layer, and a transparent film and a translucent film arranged on the conductive film; a wiring terminal part arranged at an edge portion of the laminated wiring and having the same laminated structure as that of the laminated wiring; and an insulating film that covers the laminated wiring and the wiring terminal part.
    Type: Application
    Filed: August 19, 2016
    Publication date: December 8, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masami HAYASHI, Kenichi MIYAMOTO, Nobuaki ISHIGA, Naoki TSUMURA, Kensuke NAGAYAMA
  • Publication number: 20160306208
    Abstract: Provided is a display device that is thin in its entirety and has a high contrast. The display device according to the present invention includes an array substrate provided with multiple pixels in array, and a counter substrate oppositely disposed above the array substrate with a liquid crystal layer interposed between the counter substrate and the array substrate. The counter substrate includes a touch sensor wiring pattern disposed in such a manner that at least part of the touch sensor wiring pattern is not parallel or orthogonal to a first polarization axis of polarization light incident on the liquid crystal layer from close to the array substrate. The counter substrate also includes a polarization layer closer to the liquid crystal layer than to the touch sensor wiring pattern, having a second polarization axis with an angle of 0 degrees or 90 degrees with respect to the first polarization axis.
    Type: Application
    Filed: April 12, 2016
    Publication date: October 20, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventor: Masami HAYASHI
  • Patent number: 9459380
    Abstract: A display includes: a laminated wiring with a conductive film arranged on a foundation layer, and a transparent film and a translucent film arranged on the conductive film; a wiring terminal part arranged at an edge portion of the laminated wiring and having the same laminated structure as that of the laminated wiring; and an insulating film that covers the laminated wiring and the wiring terminal part.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: October 4, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masami Hayashi, Kenichi Miyamoto, Nobuaki Ishiga, Naoki Tsumura, Kensuke Nagayama