Abstract: A tool measuring apparatus for measuring a height of a punch body and a die includes a measurement device that measures a distance from a punch reference position that is set preliminarily to an end surface of the punch body, and a distance from a die reference position that is set preliminarily to an end surface of the die. The punch reference position and the die reference position are placed independently from each other. According to the tool measuring apparatus, it is possible to measure a punch body and a die easily even in a case where a size of the punch body and a size of the die are significantly different from each other.

Abstract: A tool measuring apparatus for measuring a height of a punch body and a die includes a measurement device that measures a distance from a punch reference position that is set preliminarily to an end surface of the punch body, and a distance from a die reference position that is set preliminarily to an end surface of the die. The punch reference position and the die reference position are placed independently from each other. According to the tool measuring apparatus, it is possible to measure a punch body and a die easily even in a case where a size of the punch body and a size of the die are significantly different from each other.

Abstract: An associated development-support apparatus for a semiconductor device enables highly accurate debugging and verification of operations. An emulator stub acquires event information by using a communication control unit, where the event is generated in a debugger, the event information is generated by a debugger stub according to an event, and transmitted by the debugger stub through a communication network. An emulator control unit analyzes the acquired event information, and controls an emulator according to the analyzed event so as to perform emulation processing which virtually emulates operations of the semiconductor device corresponding to the event based on hardware design information. The emulator stub acquires results of the event which is generated in association with the operations of the semiconductor device virtually emulated by the emulator, and notifies the debugger of the results of the event through the communication network and the debugger stub.

Abstract: A verification apparatus that efficiently performs hardware verification and software verification in the development of a system LSI with great accuracy. At the hardware verification, an equivalence verification section compares the result of the simulation of an HDL model by a logic simulator and an expected value generated from an expected value calculation model and verifies whether there is equivalence between them. At the software verification, the expected value calculation model is used via an interface section and a firmware is verified by a software debugger. The expected value calculation model is used as an expected value generation model at hardware verification time and is used as a C model of hardware at software verification time. By using the expected value calculation model both for the hardware verification and for the software verification in this way, verification can efficiently be performed with great accuracy.

Abstract: An illuminating device that is improved in heat radiation property and is suppressed in the occurrence of peeling and warping of a reflector. The reflector having a housing portion that houses a light emitting diode element is disposed on a substrate a visible light converting layer is formed on the housing portion and a lens is disposed on the reflector. A circuit pattern, the light emitting diode element, the reflector, the visible light converting layer, and the lens are disposed on the substrate, and the reflector and the lens are respectively adhered using a same type of adhesive agent. The heat radiation property can thus be improved, the peeling and warping of the reflector, etc., is suppressed, and accordingly, the optical characteristics of the device can be maintained.

Abstract: A light emitting device, with which the luminous efficiency is improved and the color non-uniformity of the emitted light is lessened. Specifically, a light emitting diode element is covered with a diffusing layer, with which a diffusing agent is added to a resin. A phosphor layer, with which a phosphor is added to a resin, is disposed on top of the diffusing layer. The light from the light emitting diode element is diffused by the diffusing layer. By exciting the phosphor layer with the light diffused by the diffusing layer and thereby making the phosphor layer emit light, the luminous efficiency is improved and the color non-uniformity is lessened.

Abstract: When a retainer collar 77 is rotated with respect to a punch guide 29 in a turnable manner, an upper punch driver 49 which pierces the retainer collar 77 so as to be movable up and down is rotated with respect to the punch guide 29. As a result, since the upper punch driver 49 is screwed into a lower punch driver 37 and is rotated with respect to the lower punch driver 37 provided on the punch guide 29 movablly up and down, an up-down positional relationship between the upper punch driver 49 and the lower punch driver 37 can be adjusted.

Abstract: When a retainer collar 77 is rotated with respect to a punch guide 29 in a turnable manner, an upper punch driver 49 which pierces the retainer collar 77 so as to be movable up and down is rotated with respect to the punch guide 29. As a result, since the upper punch driver 49 is screwed into a lower punch driver 37 and is rotated with respect to the lower punch driver 37 provided on the punch guide 29 movablly up and down, an up-down positional relationship between the upper punch driver 49 and the lower punch driver 37 can be adjusted.

Abstract: When a retainer collar 77 is rotated with respect to a punch guide 29 in a turnable manner, an upper punch driver 49 which pierces the retainer collar 77 so as to be movable up and down is rotated with respect to the punch guide 29. As a result, since the upper punch driver 49 is screwed into a lower punch driver 37 and is rotated with respect to the lower punch driver 37 provided on the punch guide 29 movably up and down, an up-down positional relationship between the upper punch driver 49 and the lower punch driver 37 can be adjusted.

Abstract: A method of verifying functionality of a logic circuit containing asynchronous interfaces with sufficient accuracy and efficiency. When an RTL code is given, the asynchronous point extraction program extracts therefrom all asynchronous points and creates an asynchronous point list that enumerates them. A control task inserter modifies the RTL code with additional control tasks, as well as producing a control card for a clock & delay controller. The modified RTL code is then directed to a logic simulator. Control tasks inserted in the RTL code permit the simulator to cooperate with the clock & delay controller, so that modulated clocks and delayed signals will act on the RTL model during a logic simulation. A wide range of possible delay situations are produced in the logic simulation phase prior to logic synthesis, which enables accurate and efficient verification of a logic circuit containing asynchronous interfaces.

Abstract: A verification apparatus that efficiently performs hardware verification and software verification in the development of a system LSI with great accuracy. At the hardware verification, an equivalence verification section compares the result of the simulation of an HDL model by a logic simulator and an expected value generated from an expected value calculation model and verifies whether there is equivalence between them. At the software verification, the expected value calculation model is used via an interface section and a firmware is verified by a software debugger. The expected value calculation model is used as an expected value generation model at hardware verification time and is used as a C model of hardware at software verification time. By using the expected value calculation model both for the hardware verification and for the software verification in this way, verification can efficiently be performed with great accuracy.

Abstract: A clock generation apparatus includes a first clock generation circuit which generates a clock signal by making state transition in synchronization with a master clock signal after exiting from a predetermined state in response to a timing signal supplied from an exterior of the apparatus, a counter which counts clock pulses of the master clock signal after exiting from a reset state in response to the timing signal, and a reset circuit which resets the counter and sets the first clock generation circuit in the predetermined state in response to the count of the counter reaching a first predetermined value.

Abstract: A leaf spring for urging a spool toward a flange part of a yoke is provided between a guide fixed to a housing and the spool. Owing to the urging force of the leaf spring, the spool is pressed against the flange part of the yoke, and the yoke can be pressed against the cover through the spool. Thus it is possible to prevent the spool and the yoke from loosening. Further because the leaf spring is provided for each magnet valve, the leaf spring can be commonly used for respective modes of a fluid control apparatus and thus the cost can be reduced.

Abstract: When a retainer collar 77 is rotated with respect to a punch guide 29 in a turnable manner, an upper punch driver 49 which pierces the retainer collar 77 so as to be movable up and down is rotated with respect to the punch guide 29. As a result, since the upper punch driver 49 is screwed into a lower punch driver 37 and is rotated with respect to the lower punch driver 37 provided on the punch guide 29 movably up and down, an up-down positional relationship between the upper punch driver 49 and the lower punch driver 37 can be adjusted.