Abstract: A printing element substrate, comprising a printing unit including a printing element and a transistor, a logic circuit unit configured to be supplied with a first power supply voltage and receive print data, a unit configured to be supplied with a second power supply voltage and output a signal from the logic circuit unit to a control terminal of the transistor, a voltage generation unit configured to be supplied with a third power supply voltage and generate the second power supply voltage using the third power supply voltage, and a controlling unit configured to control supply of the third power supply voltage to the voltage generation unit, wherein when the first power supply voltage is not supplied to the logic circuit unit, the controlling unit does not supply the third power supply voltage to the voltage generation unit.

Abstract: A substrate includes first and second power supply lines, and units. Each unit includes common transistor, discharge elements and individual transistors. One of source and drain of the common transistor is connected to the first power supply line, first nodes of the discharge elements are connected to other of the source and drain, one of source and drain of each individual transistor is connected to a second node of the discharge element, the other is connected to the second power supply line. Channel of the common transistor is wider than those of the individual transistors. Arrangement direction of the units and arrangement direction of the discharge elements are first direction, the first and second power supply lines extend in the first direction, and the second power supply line is wider than that of the first power supply line.

Abstract: A printhead substrate, comprising an electrothermal transducer configured to heat a printing material, a first DMOS transistor configured to drive the electrothermal transducer, a MOS structure forming an anti-fuse element, a second DMOS transistor configured to write information in the anti-fuse element by causing an insulation breakdown of an insulating film of the MOS structure, and a driving unit consisted of at least one MOS transistor and configured to drive the second DMOS transistor.

Abstract: A semiconductor device for a liquid discharge head is provided. The device includes first and second electrodes, discharge elements configured to give energy to a liquid, first switching elements configured to electrically connect first terminals of discharge elements to the first electrode, and including one or more first switching elements each connected to two or more discharge elements, and second switching elements configured to electrically connect second terminals of the plurality of discharge elements to the second electrode, and including one or more second switching element each connected to two or more discharge elements. Two or more discharge elements connected to a same second switching element are connected to different first switching elements.

Abstract: Provided is a chip including a plurality of unit cells; a scanning circuit adapted to scan the plurality of unit cells, thereby making each of the plurality of unit cells output a signal; a voltage-to-current conversion circuit; a current-to-voltage conversion circuit; an output terminal; and an input terminal. The current-to-voltage conversion circuit is adapted to convert a first current signal input into the input terminal, into a first voltage signal, the scanning circuit starts scanning in response to the first voltage signal output from the current-to-voltage conversion circuit, and the voltage-to-current conversion circuit is adapted to convert a second voltage signal output from the scanning circuit into a second current signal, and to output the second current signal from the output terminal.

Abstract: A liquid discharge substrate includes a plurality of discharge elements disposed on a substrate, a first transistor electrically connected to the plurality of discharge elements, and a plurality of second transistors. The first transistor is disposed between the plurality of discharge elements and the plurality of second transistors.

Abstract: A printhead substrate, comprising an electrothermal transducer configured to heat a printing material, a first DMOS transistor configured to drive the electrothermal transducer, a MOS structure forming an anti-fuse element, a second DMOS transistor configured to write information in the anti-fuse element by causing an insulation breakdown of an insulating film of the MOS structure, and a driving unit consisted of at least one MOS transistor and configured to drive the second DMOS transistor.

Abstract: A manufacturing method of a semiconductor device including a DMOS transistor, an NMOS transistor and a PMOS transistor arranged on a semiconductor substrate, the DMOS transistor including a first impurity region and a second impurity region formed to be adjacent to each other, the first impurity region being of the same conductivity type as a drain region and a source region of the DMOS transistor, forming to enclose the drain region, and the second impurity region being of a conductivity type opposite to the first impurity region, forming to enclose the source region, the manufacturing method of the semiconductor device comprising forming the first impurity region and one of the NMOS transistor and the PMOS transistor, and forming the second impurity region and the other of the NMOS transistor and the PMOS transistor.

Abstract: A method of manufacturing a semiconductor device having a twin well structure is provided. The method includes ion-implanting of a first conductivity type impurity in a first region and a second region of a semiconductor substrate, the first and second regions being located adjacent to each other; forming a first resist pattern to cover the first region of the semiconductor substrate and to expose the second region of the semiconductor substrate; ion-implanting of a second conductivity type impurity at a higher concentration compared to the first conductivity type impurity in the second region of the semiconductor substrate, with the first resist pattern being used as a mask; and thermal-diffusing the first conductivity type of impurity and the second conductivity type of impurity.

Abstract: A printhead substrate comprising a plurality of printing portions and a plurality of ink supply ports, wherein the plurality of printing portions are divided into a plurality of groups, and the plurality of ink supply ports are arranged so as to correspond to the plurality of groups respectively, the printhead substrate also comprises a plurality of first voltage wiring portions provided in correspondence with the plurality of groups, and each first voltage wiring portion includes a first wiring pattern configured to connect the first terminals of the respective printing portions in the corresponding group with each other, and a second wiring pattern connected to the first wiring pattern and arranged between an ink supply port in the corresponding group and its neighboring ink supply port.

Abstract: A printing element substrate, comprising a printing element, a MOS transistor having a drain terminal, a source terminal and a back gate terminal, the drain terminal being connected to a first power supply node for receiving a first voltage, and a source terminal and a back gate terminal being connected to the printing element, and a unit including a second power supply node different from the first power supply node, and configured to supply a second voltage to a gate terminal of the MOS transistor, wherein, when the first voltage is not supplied to the first power supply node, the unit controls a potential of at least one of the gate terminal and the drain terminal so that a potential difference between the gate terminal and the drain terminal becomes lower than the second voltage.

Abstract: A manufacturing method of a semiconductor device including a DMOS transistor, an NMOS transistor and a PMOS transistor arranged on a semiconductor substrate, the DMOS transistor including a first impurity region and a second impurity region formed to be adjacent to each other, the first impurity region being of the same conductivity type as a drain region and a source region of the DMOS transistor, forming to enclose the drain region, and the second impurity region being of a conductivity type opposite to the first impurity region, forming to enclose the source region, the manufacturing method of the semiconductor device comprising forming the first impurity region and one of the NMOS transistor and the PMOS transistor, and forming the second impurity region and the other of the NMOS transistor and the PMOS transistor.

Abstract: A printing element substrate, comprising a printing unit including a printing element and a transistor, a logic circuit unit configured to be supplied with a first power supply voltage and receive print data, a unit configured to be supplied with a second power supply voltage and output a signal from the logic circuit unit to a control terminal of the transistor, a voltage generation unit configured to be supplied with a third power supply voltage and generate the second power supply voltage using the third power supply voltage, and a controlling unit configured to control supply of the third power supply voltage to the voltage generation unit, wherein when the first power supply voltage is not supplied to the logic circuit unit, the controlling unit does not supply the third power supply voltage to the voltage generation unit.

Abstract: A printing element substrate, comprising a printing element, a MOS transistor having a drain terminal, a source terminal and a back gate terminal, the drain terminal being connected to a first power supply node for receiving a first voltage, and a source terminal and a back gate terminal being connected to the printing element, and a unit including a second power supply node different from the first power supply node, and configured to supply a second voltage to a gate terminal of the MOS transistor, wherein, when the first voltage is not supplied to the first power supply node, the unit controls a potential of at least one of the gate terminal and the drain terminal so that a potential difference between the gate terminal and the drain terminal becomes lower than the second voltage.

Abstract: A printing element substrate, comprising a plurality of units configured to print on a printing medium based on print data, each of the plurality of units, including a printing element configured to print on the printing medium, a first transistor configured to operate as a source follower upon receiving a voltage at a gate terminal of the first transistor, and supply a current to the printing element, and a second transistor configured to control supply of the current to the printing element in response to a control signal input to a gate terminal of the second transistor.

Abstract: A board for a printhead mountable on a printing apparatus includes three terminals used for connection to the printing apparatus, a printing element, a driving circuit connected to the first terminal, an inspection circuit connected between the first terminal and the second terminal, and a resistance element connected between the second terminal and the third terminal. When an inspection signal is supplied from the printing apparatus to the first terminal, the inspection circuit outputs an output signal according to the inspection signal. When a control signal for performing printing is supplied from the printing apparatus to the first terminal, the driving circuit drives the printing element according to the control signal, and the inspection circuit sets the inspection circuit and the second terminal in an open state with each other.

Abstract: A semiconductor device includes a first conductivity type well region formed by counter doping; a transistor having source and drain regions having a second conductivity type, at least one of the regions being arranged in the well region; a LOCOS region arranged around the at least one region in the well region; and a channel stop region having the first conductivity type arranged under the LOCOS region. The at least one region is arranged at a distance from a tip of a bird's beak of the LOCOS in a direction parallel to a channel width of the transistor. The channel stop region is arranged at a distance from the tip of the bird's beak at an opposite side to the at least one region.

Abstract: A printhead substrate, comprising an electrothermal transducer configured to heat a printing material, a first DMOS transistor configured to drive the electrothermal transducer, a MOS structure forming an anti-fuse element, a second DMOS transistor configured to write information in the anti-fuse element by causing an insulation breakdown of an insulating film of the MOS structure, and a driving unit consisted of at least one MOS transistor and configured to drive the second DMOS transistor.

Abstract: A semiconductor device includes a first conductivity type well region formed by counter doping; a transistor having source and drain regions having a second conductivity type, at least one of the regions being arranged in the well region; a LOCOS region arranged around the at least one region in the well region; and a channel stop region having the first conductivity type arranged under the LOCOS region. The at least one region is arranged at a distance from a tip of a bird's beak of the LOCOS in a direction parallel to a channel width of the transistor. The channel stop region is arranged at a distance from the tip of the bird's beak at an opposite side to the at least one region.

Abstract: A method of manufacturing a semiconductor device having a twin well structure is provided. The method includes ion-implanting of a first conductivity type impurity in a first region and a second region of a semiconductor substrate, the first and second regions being located adjacent to each other; forming a first resist pattern to cover the first region of the semiconductor substrate and to expose the second region of the semiconductor substrate; ion-implanting of a second conductivity type impurity at a higher concentration compared to the first conductivity type impurity in the second region of the semiconductor substrate, with the first resist pattern being used as a mask; and thermal-diffusing the first conductivity type of impurity and the second conductivity type of impurity.