Patents by Inventor Masanori Ogura
Masanori Ogura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080211952Abstract: To suppress an influence exerted on an output video signal due to a high frequency noise from a scanning circuit. In a solid state image pick-up device including horizontal scanning circuits, and a vertical scanning circuit having a lower driving frequency than those of the horizontal scanning circuits which are arranged so as to be adjacent to different side portions of a square chip, pads are arranged at side portions of the chip, except for the side portions on the sides where the horizontal scanning circuits are arranged. The pads include pads through which a voltage or a ground potential is applied to active elements of pixels of a pixel region, pads through which voltages are inputted to amplifiers, and pads through which output signals of the amplifiers are outputted to the outside of the chip.Type: ApplicationFiled: April 3, 2008Publication date: September 4, 2008Applicant: Canon Kabushiki KaishaInventors: Masanori Ogura, Fumihiro Inui, Tetsuya Itano
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Patent number: 7408210Abstract: An object of the present invention is to simultaneously realize the enlargement of a dynamic range and the downsizing of a pixel. An additional capacitor CS is composed by using: a first capacitor formed of a first diffusion layer, a second diffusion layer and a P well by layering the P well, the first diffusion layer, a first dielectric film, a first polysilicon layer, a second dielectric film and a second polysilicon layer; a second capacitor formed of the second diffusion layer, the first polysilicon layer and the first dielectric film; and a third capacitor formed of the first polysilicon layers, a second polysilicon layer, and a second dielectric film. Thereby, the additional capacitor CS for accumulating carriers overflown from a photodiode PD can secure a required capacitance value while making its size as small as possible.Type: GrantFiled: March 8, 2006Date of Patent: August 5, 2008Assignee: Canon Kabushiki KaishaInventors: Masanori Ogura, Toru Koizumi, Akira Okita, Tetsuya Itano, Shin Kikuchi
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Patent number: 7397736Abstract: Disclosed is an apparatus which includes a tracking error detection circuit, for detecting tracking error signal from outputs of a photodetector, a peak/bottom detection circuit for detecting peak and bottom values of the tracking error signal, a difference circuit for finding the difference between a peak value and a bottom value, and a comparator for comparing an output of the difference circuit with a preset reference voltage VR to output a tracking-off signal based on the result of comparison. The comparator outputs the tracking-off signal, indicating the tracking-off of the light beam spot with respect to a track.Type: GrantFiled: March 15, 2005Date of Patent: July 8, 2008Assignee: NEC Electronics CorporationInventor: Masanori Ogura
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Publication number: 20080068480Abstract: An solid state image pickup device including a plurality of photoelectric conversion regions (PD1, PD2) for generating carriers by photoelectric conversions to accumulate the generated carriers, an amplifying unit for amplifying the carriers, being commonly provided to at least two photoelectric conversion regions, a first and a second transfer units (Tx-MOS1, Tx-MOS2) for transferring the carriers accumulated in the first and the second photoelectric conversion regions, respectively, a first and a second carrier accumulating units (Cs1, Cs2) for accumulating the carriers flowing out from the first and the second photoelectric conversion regions through a first and a second fixed potential barriers, respectively, and a third and a fourth transfer units (Cs-MOS1, Cs-MOS2) for transferring the carriers accumulated in the first and the second carrier accumulating units to the amplifying unit, respectively.Type: ApplicationFiled: November 26, 2007Publication date: March 20, 2008Applicant: CANON KABUSHIKI KAISHAInventors: Akira Okita, Toru Koizumi, Masanori Ogura, Shin Kikuchi, Tetsuya Itano
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Publication number: 20080062295Abstract: To provide a configuration including a fully differential amplifier in which decrease in a reading speed can be suppressed. A photoelectric conversion apparatus according to the present invention includes a pixel area where a plurality of pixels are arranged; an amplifier configured to amplify a signal from the pixel area; a plurality of signal paths for transmitting the signals from the pixel area to the amplifier. The amplifier is a fully differential amplifier which includes a plurality of input terminals including a first input terminal and a second input terminal to which the signals from the plurality of signal paths are supplied and a plurality of output terminals including a first output terminal and a second output terminal and the input terminals and the output terminals have no feedback path provided therebetween.Type: ApplicationFiled: September 5, 2007Publication date: March 13, 2008Applicant: CANON KABUSHIKI KAISHAInventors: Masaru Fujimura, Masanori Ogura, Toru Koizumi
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Publication number: 20080062296Abstract: A photoelectric conversion device prevents a pseudo signal caused by the parasitic capacitance of a transfer switch from being input to an amplifier. A photoelectric conversion device (50) includes a pixel (10) which outputs a signal to a signal line (107), an amplifier which amplifies the signal supplied via the signal line (107), and an isolation switch (121) inserted between a signal line (108) and the input node of the amplifier. The pixel (10) includes a photodiode, a floating diffusion (FD), a transfer switch which transfers the charge of the photodiode to the FD, and an amplification transistor which outputs a signal to a signal line (109) in accordance with the potential of the FD. The isolation switch (121) is turned off at least in a period when a transfer pulse for controlling the transfer switch of the pixel (10) transits.Type: ApplicationFiled: September 5, 2007Publication date: March 13, 2008Applicant: CANON KABUSHIKI KAISHAInventors: Masanori Ogura, Toru Koizumi, Masaru Fujimura
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Publication number: 20080049130Abstract: A photoelectric conversion device includes a pixel array portion, signal processing portion, common readout circuit, and common signal line. The signal processing portion includes the first power line and the second power line which is formed on the opposite side to the first power line when viewed from the common signal line. The common signal line has a portion formed along the signal processing portion to transfer, to the common readout circuit, a signal supplied from the signal processing portion. A cross connection line which crosses the portion of the common signal line along the signal processing portion connects the first and second power lines.Type: ApplicationFiled: August 23, 2007Publication date: February 28, 2008Applicant: CANON KABUSHIKI KAISHAInventors: Toru Koizumi, Hideaki Takada, Masanori Ogura
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Publication number: 20080024630Abstract: A photoelectric conversion device includes a pixel output line, a pixel which outputs a signal to the pixel output line, an amplifier unit which amplifies the signal output to the pixel output line, and a holding capacitor which holds the signal output from the amplifier unit. The photoelectric conversion device outputs a pixel signal based on the signal held by the holding capacitor. The amplifier unit includes a variable amplifier stage which amplifies a signal output to the pixel output line at a gain selected from a plurality of gains, and a buffer stage which amplifies the signal output from the variable amplifier stage, the amplified signal being held by the holding capacitor to hold the signal.Type: ApplicationFiled: July 25, 2007Publication date: January 31, 2008Applicant: CANON KABUSHIKI KAISHAInventors: Hiroki Hiyama, Masanori Ogura
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Patent number: 7321110Abstract: An solid state image pickup device including a plurality of photoelectric conversion regions (PD1, PD2) for generating carriers by photoelectric conversions to accumulate the generated carriers, an amplifying unit for amplifying the carriers, being commonly provided to at least two photoelectric conversion regions, a first and a second transfer units (Tx-MOS1, Tx-MOS2) for transferring the carriers accumulated in the first and the second photoelectric conversion regions, respectively, a first and a second carrier accumulating units (Cs1, Cs2) for accumulating the carriers flowing out from the first and the second photoelectric conversion regions through a first and a second fixed potential barriers, respectively, and a third and a fourth transfer units (Cs-MOS1, Cs-MOS2) for transferring the carriers accumulated in the first and the second carrier accumulating units to the amplifying unit, respectively.Type: GrantFiled: March 13, 2006Date of Patent: January 22, 2008Assignee: Canon Kabushiki KaishaInventors: Akira Okita, Toru Koizumi, Masanori Ogura, Shin Kikuchi, Tetsuya Itano
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Patent number: 7298405Abstract: An image sensing apparatus which reduces noise generated by shift operation and power consumption is disclosed. The shift register of a horizontal scanning circuit is divided into a plurality of partial shift registers. Shift clock control circuits control supply of a shift clock to the partial shift registers individually for each partial shift register.Type: GrantFiled: February 7, 2003Date of Patent: November 20, 2007Assignee: Canon Kabushiki KaishaInventors: Fumihiro Inui, Tetsuya Itano, Masanori Ogura
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Patent number: 7286170Abstract: A solid-state image sensor has a sensor array that includes an array of pixel cells. The solid-state image sensor sequentially selects one line from plural lines of the sensor array and sequentially reads out signal charge and reset levels of pixel photosensor cells belonging to the selected line via first and second optical-signal common output lines and first and second noise-signal common output lines. Differential signals are amplified and output via signal less noise (S-N) read-out circuits. The optical-signal and the noise-signal common output lines are arranged parallel to one another in the sequence of the first optical-signal common output line, the first noise-signal common output line, the second noise-signal common output line, and the second optical-signal common output line. The solid stage image sensor may be used in a camera and in a camera control system.Type: GrantFiled: October 27, 2003Date of Patent: October 23, 2007Assignee: Canon Kabushiki KaishaInventors: Fumihiro Inui, Tetsuya Itano, Masanori Ogura
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Publication number: 20070126886Abstract: It is intended to obtain a high quality image which is not affected by the fluctuation of dark outputs, and pixels having a specifically large dark output, called defects, and has no lateral line etc. A solid-state image pickup apparatus including: an aperture pixel region which accumulates and outputs the electric charges generated depending on incident light; a light shielded optical black region; a black reference pixel region in which no impurity region for accumulating electric charges is formed; and level shifting means which shifts the reference level of the output signals of the black reference pixel region with respect to the reference levels of the output signals of the aperture pixel region and the optical black region, is provided.Type: ApplicationFiled: November 29, 2006Publication date: June 7, 2007Applicant: CANON KABUSHIKI KAISHAInventors: KATSUHITO SAKURAI, MASARU FUJIMURA, MASANORI OGURA
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Patent number: 7227208Abstract: The invention is to suppress a leak current in a photodiode and an unevenness in the leak currents. In a photoelectric converting device including a channel stop area of a higher concentration than in an element isolating insulation film formed between a photodiode, having an n-type semiconductor area formed in a p-type semiconductor, and an adjacent element, and in a p-type semiconductor layer formed under the element isolating insulation film, and a wiring layer formed in a part on the element isolating insulation film, the wiring layers on the element isolating insulation film adjacent to the photodiodes are unified in an effective area and a potential, and a p-type dark current reducing area of a higher concentration than in the channel stop area is provided in at least a part of an area opposed to the wiring layer across the element isolating insulation film.Type: GrantFiled: July 28, 2005Date of Patent: June 5, 2007Assignee: Canon Kabushiki KaishaInventors: Masanori Ogura, Fumihiro Inui, Toru Koizumi, Seiichiro Sakai
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Publication number: 20070052831Abstract: An image sensing apparatus includes a photoelectric converter having a plurality of pixels covered by a color filter composed of a plurality of colors, a plurality of common readout units adapted to sequentially output signals from the plurality of pixels, a time division multiplex (TDM) unit for time division multiplexing signals from the plurality of common readout units, and a readout control unit for reading the signals from the plurality of pixels to the common readout units in such a way that signals from pixels covered by color filters of the same color are continuously multiplexed.Type: ApplicationFiled: October 31, 2006Publication date: March 8, 2007Inventors: Masanori Ogura, Fumihiro Inui, Tetsuya Itano
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Patent number: 7148927Abstract: An image sensing apparatus includes a photoelectric converter having a plurality of pixels covered by a color filter composed of a plurality of colors, a plurality of common readout units adapted to sequentially output signals from the plurality of pixels, a time division multiplex (TDM) unit for time division multiplexing signals from the plurality of common readout units, and a readout control unit for reading the signals from the plurality of pixels to the common readout units in such a way that signals from pixels covered by color filters of the same color are continuously multiplexed.Type: GrantFiled: February 28, 2003Date of Patent: December 12, 2006Assignee: Canon Kabushiki KaishaInventors: Masanori Ogura, Fumihiro Inui, Tetsuya Itano
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Publication number: 20060221667Abstract: An object of the present invention is to simultaneously realize the enlargement of a dynamic range and the downsizing of a pixel. An additional capacitor CS is composed by using: a first capacitor formed of a first diffusion layer, a second diffusion layer and a P well by layering the P well, the first diffusion layer, a first dielectric film, a first polysilicon layer, a second dielectric film and a second polysilicon layer; a second capacitor formed of the second diffusion layer, the first polysilicon layer and the first dielectric film; and a third capacitor formed of the first polysilicon layers, a second polysilicon layer, and a second dielectric film. Thereby, the additional capacitor CS for accumulating carriers overflown from a photodiode PD can secure a required capacitance value while making its size as small as possible.Type: ApplicationFiled: March 8, 2006Publication date: October 5, 2006Applicant: CANON KABUSHIKI KAISHAInventors: Masanori Ogura, Toru Koizumi, Akira Okita, Tetsuya Itano, Shin Kikuchi
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Publication number: 20060208291Abstract: A solid state image pickup device which can prevent color mixture by using a layout of a capacitor region provided separately from a floating diffusion region and a camera using such a device are provided. A photodiode region is a rectangular region including a photodiode. A capacitor region includes a carrier holding unit and is arranged on one side of the rectangle of the photodiode region as a region having a side longer than the one side. In a MOS unit region, an output unit region including an output unit having a side longer than the other side which crosses the one side of the rectangle of the photodiode region is arranged on the other side. A gate region and the FD region are arranged between the photodiode region and the capacitor region.Type: ApplicationFiled: March 13, 2006Publication date: September 21, 2006Applicant: CANON KABUSHIKI KAISHAInventors: Toru Koizumi, Akira Okita, Masanori Ogura, Shin Kikuchi, Tetsuya Itano
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Publication number: 20060208292Abstract: The image pickup device of the invention has a path deeper in a semiconductor substrate, than a region wherein a channel is formed, upon turning on a first MOS transistor, under a gate thereof. The path is arranged by forming a P-type layer for forming a potential barrier, within a P-type well excluding a region below the gate of the first MOS transistor. Thus, even when the first transfer MOS transistor is securely turned off at accumulation, carriers overflowing from a photodiode can flow into the path, thereby enabling to accumulate the carriers, overflowing from the photodiode, in a carrier accumulation region. Such structure allows to suppress a dark current generation from an interface of a gate oxide film of the first transfer MOS transistor, and also to expand the dynamic range of the image pickup device by the carriers overflowing from the photodiode and flowing through the path into the carrier accumulation region.Type: ApplicationFiled: March 16, 2006Publication date: September 21, 2006Applicant: CANON KABUSHIKI KAISHAInventors: Tetsuya Itano, Toru Koizumi, Shin Kikuchi, Akira Okita, Masanori Ogura
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Publication number: 20060208161Abstract: An solid state image pickup device including a plurality of photoelectric conversion regions (PD1, PD2) for generating carriers by photoelectric conversions to accumulate the generated carriers, an amplifying unit for amplifying the carriers, being commonly provided to at least two photoelectric conversion regions, a first and a second transfer units (Tx-MOS1, Tx-MOS2) for transferring the carriers accumulated in the first and the second photoelectric conversion regions, respectively, a first and a second carrier accumulating units (Cs1, Cs2) for accumulating the carriers flowing out from the first and the second photoelectric conversion regions through a first and a second fixed potential barriers, respectively, and a third and a fourth transfer units (Cs-MOS1, Cs-MOS2) for transferring the carriers accumulated in the first and the second carrier accumulating units to the amplifying unit, respectively.Type: ApplicationFiled: March 13, 2006Publication date: September 21, 2006Applicant: CANON KABUSHIKI KAISHAInventors: Akira Okita, Toru Koizumi, Masanori Ogura, Shin Kikuchi, Tetsuya Itano
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Patent number: 7087983Abstract: A manufacturing method of manufacturing a semiconductor device having a plurality of wiring layers. The method includes the steps of forming a wiring by a first wiring layer as a pattern by dividing a desired pattern into a plurality of patterns, connecting the divided patterns, and exposing them, wherein a position of the connection is formed in parallel with the wiring which is formed by the first wiring layer, and forming a wiring by a second wiring layer having an area which intersects the connecting position by a batch processing of exposure.Type: GrantFiled: September 22, 2003Date of Patent: August 8, 2006Assignee: Canon Kabushiki KaishaInventors: Tetsuya Itano, Fumihiro Inui, Masanori Ogura