Abstract: A laminate capable of mounting semiconductor elements thereon; comprising an insulating layer which is constituted by a resin portion of sea-island structure and a woven reinforcement. The resin portion of sea-island structure is, for example, such that a resin as islands are dispersed in a resin as a matrix. Thus, the insulating layer exhibits a coefficient of thermal expansion of 3.0.about.10 (ppm/K) in a planar direction thereof and a glass transition temperature of 150.about.300 (.degree.C.). Owing to these physical properties, thermal stresses which the laminate undergoes in packaging the semiconductor elements thereon can be reduced, so that the connections of the laminate with the semiconductor elements can be made highly reliable.

Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Abstract: A resin composition having superior molding character, bonding character, moisture resistance, and heat resistance, for encapsulating of a semiconductor which contains:(a) An ether imide group compound represented by the general formula (I) ##STR1## wherein, each of R.sup.1 -R.sup.4, R.sup.8 and R.sup.8 is hydrogen, lower alkyl group, lower alkoxy group, lower fluoroalkyl group, chlorine or bromine, and R.sup.1 -R.sup.4, R.sup.7 and R.sup.8 may be same or different each other, and each of R.sup.5 and R.sup.6 is hydrogen, methyl group, ethyl group, trifluoromethyl group or trichloromethyl group, and R.sup.5 and R.sup.6 may be same or different each other, and D is a hydrocarbon group of a dicarboxylic acid having an ethylene type unsaturated double bond of an extract of the compound obtained by extraction with water in an amount 10 times by weight of the compound at 120.degree. C. for more than 100 hours has electric conductivity of at most 300 s/cm ph of 1.

Abstract: The phenol resin molding composition used in the present invention is obtained by subjecting a resol-type phenol resin to purification until, when the resin is extracted by heating with 10 times the amount of hot water at 120.degree. C. for 100 hours or more, the extract has an electric conductivity of 100 .mu.S/cm or less, a pH of 4-7 and a halogen ion content of 10 ppm or less, then preparing a composition comprising a resin component consisting of said resol-type phenol resin and a cure rate controlling agent incorporated therewith, optionally incorporating a filler into said composition, kneading the resulting mixture, and then grinding the kneaded mixture. The composition has a good moldability and, when used for resin-sealing of electronic devices or semiconductor devices and transfer-molding of electronic devices using resin, exhibits an excellent adhesive property, electric properties, moisture resistance and heat resistance.

Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.