Abstract: In a semiconductor test system, higher accuracy testing of semiconductor memories is achieved by providing test data from a modified pattern generator to identical addresses in both the memory under test and a buffer memory. This is achieved for various types of semiconductor memories by treating data generated by the modified pattern generator for the memory under tests in ways that would correspond to how the data is treated in various memories to be tested before storing the data in the buffer memory. This is accomplished using a variety of multiplexers and counters under control of a control signal generator. Data stored at locations with the same address in both memories is read out for comparison in a logic comparator. If the data is not identical, the semiconductor memory under test is rejected as defective.

Abstract: A vibration wave motor for driving a movable member by a travelling vibration wave generated by applying a periodic signal to an electro-mechanical energy transducer element such as an electrostrictive device or piezoelectric device is disclosed. A drive status of the vibration wave motor is detected, a phase difference between the detected signal and the periodic signal applied to the transducer element is detected, a frequency of the periodic signal is selected such that the phase difference is equal to a predetermined constant and the vibration wave motor is driven in a resonance state.

Abstract: A vibration wave motor generates a travelling vibration wave by applying periodic voltages of different phases to electro-mechanical energy transducers located at two different positions on a stator, and drives a movable member by the vibration wave. In order to adjust the speed of the vibration wave motor, the phase difference between the periodic voltages applied to the transducer is adjusted or the application of the periodic voltage to one or both of the transducers is selectively blocked.

Abstract: In a vibration wave motor, one of periodic signals of different phases to be applied to first and second electro-mechanical energy conversion elements is generated without frequency-dividing an output of an oscillator and a phase-shifted signal with respect to the output of the oscillator is generated by a phase locked loop and applied to the other conversion element.

Abstract: This specification discloses a vibration wave motor in which frequency signals of different phases are applied to electro-mechanical energy converting elements such as electrostrictive elements disposed at different positions to thereby form a travelling vibration wave in a member in which the converting elements are disposed and a moving member is driven by the vibration wave and particularly in which the phase difference between the frequency signals applied to the energy converting elements is held at a particular value.

Abstract: A semiconductor tester in which an address is generated by a test pattern generator in synchronism with an operating clock from a timing generator, the address is applied to a memory under test, and a check is made to determine if the power source current to the memory under test is larger than a predetermined value. A current value deciding circuit is provided, by which the power source current value is detected, and it is decided by a comparator whether the detected current value is greater than the predetermined value or not. The decision result is output at the timing of an output timing signal from the timing generator.

Abstract: A test pattern generator includes means for reading out a plurality of memories non-successively while outputting the test patterns stored identically in the addresses of the memories, such as for sequentially repeating the test patterns that are provided to a logic circuit being tested. The sequence of test patterns is determined by a series of instructions which are accessed by a program counter, and the instructions can cause a jump in the counting of the program counter, for instance to repeat addresses of the memories for repeating a desired sequence of test patterns a predetermined number of times. The timing of the addressing of the memories for the reading out of the test patterns can be faster than the timing for writing the test patterns into the memories for storage.

Abstract: A test pattern generator for providing test patterns to a logic circuit under test, wherein the logic circuit to be tested does not have a terminal for being set to an initial state before starting the test patterns. The initial state of the logic circuit is detected while supplying an increment pattern to increment the internal state, and the test patterns are supplied a predetermined number of clock pulses after the initial state is detected. The length of the period of the clock pulses for the test can be varied.

Abstract: A word of a test pattern is divided into blocks and stored in a storage device of a test pattern generator for testing a logic device. The test pattern blocks are sequentially provided to respective blocks of a pattern generator, which provides at respective outputs all of the blocks of a test pattern word at the same time. If a block of the pattern generator is faulty, or if another component of the test pattern generator corresponding to a block of the pattern generator is faulty, the respective block of each test pattern word can be provided to an unused block of the pattern generator, for providing the test patterns for testing the logic device without the need for reprogramming the test pattern blocks to be stored in the storage device. The data stored in the storage device identifies the position of each respective block of the test pattern words, for controlling the transferring of the test pattern blocks from the storage device to the pattern generator.

Abstract: A semiconductor memory test pattern generating apparatus in which an instruction memory is read out, assigning an address by a program counter, and instructions thus read out are decoded and executed to generate a test pattern. A start address and a stop address and index data indicating the number of times of executing an area defined by the start and stop addresses are stored in a loop memory. During the operation of the program counter the start and stop addresses and the index data are read out from the loop memory and loaded in a register group. When the program counter coincides with the loaded stop address, the setting of the program counter to the loaded start address is executed by the number of times indicated by the loaded index data, and in the last execution the next address of the loop memory is read out.

Abstract: A method for reducing the bacterial population of a blood powder having a moisture content of about 30% by weight or less, comprising heating the powder at a heating temperature of about 80 to about 160.degree. C. for a period of time to reduce the bacterial population of the blood powder so as to obtain blood products having a solubility of at least 50% without denaturing the blood protein. The blood product is useful for a foodstuff material and a rheological binding agent suitable for the improvement of the quality of a processed foodstuff.

Abstract: An address pattern generator for use in a test pattern generator for generating various patterns for testing semiconductor memories. A plurality of fixed registers for storing an initial value at the start of a test, a boundary value and an operand indicating the amount of change of an address are provided in common to at least two address operating circuits. The address operating circuits are each capable of taking therein the content of a desired one of the fixed registers. At least two output registers are provided, which are each capable of taking therein the operation result of a desired one of the address operating circuit. The contents of these output registers are supplied as addresses to a memory under test.

Abstract: A test pattern generating apparatus in which a microprogram describing a test pattern to be generated is read for interpretation and execution, address and data patterns are generated by arithmetic operations and a memory control signal is produced, the address and data patterns and the memory control signal being applied to a memory under test. The address pattern is provided to an area inversion control signal generation section to produce an inversion control signal corresponding to the address pattern, by which the data pattern may be inverted and then outputted.

Abstract: A flat type cable suspension structure comprises a horizontally disposed holder member having a first retaining means, a keeper member having a second retaining means and a flat type cable firmly held therebetween by clamping. The first retaining means and the second retaining means cooperate with each other to crook flat type cable so that the cable can be firmly retained in the present suspension structure. The present cable suspension structure can be constructed in a compact form, thereby facilitating installation of an elevator cable assembly within a limited spacing between the side wall structure of a hoistway and an elevator cage. Further, by the use of the present suspension structure, the cable assembly can be installed adjustably in horizontal and vertical directions.

Abstract: Reference logical data is spatially divided by a data dividing circuit for each time slot, and the divided data are converted into data, each having a continuous effective period. The divided and converted reference data and input logical data are compared by comparators to detect whether or not they are coincident with each other. A clock signal for determining the timing of comparison is also divided by a clock signal dividing circuit into n clock signals which are displaced one time slot apart in phase and occurring with a period of n time slots. By these divided clock signals those of the outputs from the comparators corresponding thereto are taken out from a comparison output circuit.

Abstract: An improvement in a flat type cable suspension structure which comprises a support structure comprising an upper support member and a lower support member vertically spaced from the upper support member and fixedly secured with respect to the ground, and a flat type jacketed cable extending crosswise with the support structure. The flat type cable extends downwardly through the spacing between the upper and lower support members toward said lower support member in such a manner that one face of the cable has a portion abutting against the rear side of the upper support member and the other face of the cable has a portion abutting against the front side of said lower support member. An exposed extension stemming outwardly from a tension member buried in the jacket of the cable is securely hooked over and held in a tightly suspended state on a hanger member provided on the front side of the upper support member.

Abstract: A flat type feeder cable comprising an even number of stranded conductors and an outer jacket made of a flexible material wholly covering the stranded conductors, each of said stranded conductors being composed of a plurality of insulated cores stranded together, and wherein an equal number of the stranded conductors are disposed in a symmetrical relationship, characterized in that the direction of lay of each of the stranded conductors of half the number is right-hand while the direction of lay of each of the remaining stranded conductors is left-hand, and each of the plurality of insulated cores constituting each stranded conductor has one twist by one pitch of the stranding of the stranded conductor, said twist having the same direction as the direction of the stranding of the stranded conductor.

Abstract: A false-twist spindle friction disc comprises an annular rotor member whose lateral surfaces are machined to form coupling means and which is made of a highly rigid, centrifugal-force-resistant, high melting point material, and a support base made of a thermoplastic synthetic resin surrounding the annular rotor member while leaving the outer peripheral portion of the latter exposed. With the annular rotor member used as a core, the synthetic resin support base is formed by injection molding so as to unit them together. The presence of the coupling means formed in the lateral surfaces of the annular rotor member adds to the firmness with which the annular rotor member and the support base are united together.

Abstract: A flexible tape, adapted to be rolled into a coil and to be cut into sections of any desired length, includes an elongate carrier of woven cloth impregnated with a flexible, carbon-containing resistance layer and a flexible heat shield, coextensive with the carrier, on one side of that layer, this assembly being enveloped in a flat sheath of synthetic resin. A surface of the sheath on the side of the heat shield may be coated with adhesive for detachably securing a backing strip of paper thereto. Two transversely spaced conductors, extending adjacent the longitudinal edges of the tape over the entire length thereof, are in conductive contact with the resistance layer for facilitating the passage of a heating current therethrough. The ends of the conductors in a section cut from the tape can be bared by removing parts of the sheath, the carrier and the heat shield. Several such sections can be laterally juxtaposed for the heating of a larger area.

Abstract: A trans isomer of 4-cyanoncyclohexane-1-carboxylic acid or its lower alkyl ester is reduced in a solvent in the presence of a hydrogenating catalyst, and hydrolyzing the produced ester in case the starting trans-isomer is a lower alkyl ester, then the trans-4-aminomethyl-cyclohexane-1-carboxylic acid is recovered from the reaction mixture.