Abstract: Provided herein is a molding material that attains little fluctuation in amount of short fibers and powdery resin among individual products and that allows continuous production without damaging a die. In the step of pouring, slurry is poured onto a slurry diffusion member 7 from above the slurry diffusion member 7. The slurry diffusion member 7 extends in an upward direction, and is shaped such that the area of a transverse section taken along a direction orthogonal to the upward direction becomes smaller as the slurry diffusion member 7 extends in the upward direction. In the step of cleaning, a dispersion medium that is the same as the dispersion medium used in the step of pouring or water is poured onto the slurry diffusion member 7 from above the slurry diffusion member 7 to cause the short fibers and the powdery resin adhering to a slurry diffusion portion 71 of the slurry diffusion member 7 to fall down.

Abstract: There is little fluctuation in amount of short fibers among individual products of fiber substrate. No damage is caused to a mold for the fiber substrate. Continuous production of the fiber substrates is possible. A method of manufacturing a fiber substrate includes the steps of: preparing slurry by dispersing short fibers in a dispersion medium; pouring the slurry into a cylindrical mold from above the cylindrical mold, the slurry being directed to a slurry diffusion member disposed in the center of the cylindrical mold and having an upward pointing conical or pyramidal shape; pouring the dispersion medium or water onto the slurry diffusion member from above the slurry diffusion member to cause the short fibers adhering to the slurry diffusion member to fall down, after the step of pouring the slurry; and discharging the dispersion medium from the cylindrical mold to accumulate the short fibers in the cylindrical mold to obtain a fiber aggregate.

Abstract: Provided herein is an apparatus of manufacturing a molding material for use in a method of manufacturing a molding material that can prevent a crack from occurring in the molding material. A cylindrical die (3) is slid downward along an upper hollow compression mold (4) and a lower hollow compression mold (2) with a molding material (35) held between the upper hollow compression mold (4) and the lower hollow compression mold (2). After that, the upper hollow compression mold (4) is moved upward to relatively move the upper hollow compression mold (4) and the lower hollow compression mold (2) away from each other. After a slurry diffusion member (7) is removed, the molding material (35) is taken out.

Abstract: Provided herein is an apparatus of manufacturing a molding material for use in a method of manufacturing a molding material that can prevent a crack from occurring in the molding material. A cylindrical die (3) is slid downward along an upper hollow compression mold (4) and a lower hollow compression mold (2) with a molding material (35) held between the upper hollow compression mold (4) and the lower hollow compression mold (2). After that, the upper hollow compression mold (4) is moved upward to relatively move the upper hollow compression mold (4) and the lower hollow compression mold (2) away from each other. After a slurry diffusion member (7) is removed, the molding material (35) is taken out.

Abstract: Provided herein is a molding material that attains little fluctuation in amount of short fibers and powdery resin among individual products and that allows continuous production without damaging a die. In the step of pouring, slurry is poured onto a slurry diffusion member 7 from above the slurry diffusion member 7. The slurry diffusion member 7 extends in an upward direction, and is shaped such that the area of a transverse section taken along a direction orthogonal to the upward direction becomes smaller as the slurry diffusion member 7 extends in the upward direction. In the step of cleaning, a dispersion medium that is the same as the dispersion medium used in the step of pouring or water is poured onto the slurry diffusion member 7 from above the slurry diffusion member 7 to cause the short fibers and the powdery resin adhering to a slurry diffusion portion 71 of the slurry diffusion member 7 to fall down.

Abstract: A method of producing a multi-petaled cyclamen plant having an increased number of petals, including at least inhibiting the function of a transcription factor involved in morphogenesis of a floral organ of cyclamen.

Abstract: There is little fluctuation in amount of short fibers among individual products of fiber substrate. No damage is caused to a mold for the fiber substrate. Continuous production of the fiber substrates is possible. A method of manufacturing a fiber substrate includes the steps of: preparing slurry by dispersing short fibers in a dispersion medium; pouring the slurry into a cylindrical mold from above the cylindrical mold, the slurry being directed to a slurry diffusion member disposed in the center of the cylindrical mold and having an upward pointing conical or pyramidal shape; pouring the dispersion medium or water onto the slurry diffusion member from above the slurry diffusion member to cause the short fibers adhering to the slurry diffusion member to fall down, after the step of pouring the slurry; and discharging the dispersion medium from the cylindrical mold to accumulate the short fibers in the cylindrical mold to obtain a fiber aggregate.

Abstract: A method of producing a multi-petaled cyclamen plant having an increased number of petals, including at least inhibiting the function of a transcription factor involved in morphogenesis of a floral organ of cyclamen.

Abstract: For constituting a pre-metal interlayer insulating film, such a method is considered as forming a CVD silicon oxide-based insulating film having good filling properties by ozone TEOS, reflowing the film to planarize it, stacking a silicon oxide film having good CMP scratch resistance by plasma TEOS, and further planarizing by CMP. However, in forming a contact hole, crack in the pre-metal interlayer insulating film is exposed in the contact hole, into which barrier metal intrudes to cause short-circuit defects. In the present invention, in the pre-metal process, after forming the ozone TEOS film over an etch stop film, the ozone TEOS film is once etched back so as to expose the etch stop film over a gate structure, a plasma TEOS film is formed over the remaining ozone TEOS film, and the plasma TEOS film is planarized by CMP.

Abstract: There is provided a technology which allows improvements in manufacturing yield and product reliability in a semiconductor device having a triple well structure. A shallow p-type well is formed in a region different from respective regions in a p-type substrate where a deep n-type well, a shallow p-type well, and a shallow n-type well are formed. A p-type diffusion tap formed in the shallow p-type well is wired to a p-type diffusion tap formed in a shallow n-type well in the deep n-type well using an interconnection in a second layer. The respective gate electrodes of an nMIS and a pMIS each formed in the deep n-type well are coupled to the respective drain electrodes of an nMIS and a pMIS each formed in the substrate using an interconnection in a second or higher order layer.

Abstract: There is provided a technology which allows improvements in manufacturing yield and product reliability in a semiconductor device having a triple well structure. A shallow p-type well is formed in a region different from respective regions in a p-type substrate where a deep n-type well, a shallow p-type well, and a shallow n-type well are formed. A p-type diffusion tap formed in the shallow p-type well is wired to a p-type diffusion tap formed in a shallow n-type well in the deep n-type well using an interconnection in a second layer. The respective gate electrodes of an nMIS and a pMIS each formed in the deep n-type well are coupled to the respective drain electrodes of an nMIS and a pMIS each formed in the substrate using an interconnection in a second or higher order layer.

Abstract: As a method for constituting a pre-metal interlayer insulating film, such method is considered as forming a CVD silicon oxide-based insulating film having good filling properties of a silicon oxide film by ozone TEOS, reflowing the film at high temperatures to planarize it, then stacking a silicon oxide film having good CMP scratch resistance by plasma TEOS, and, further, planarizing it by CMP. However, it was made clear that, in a process for forming a contact hole, crack in the pre-metal interlayer insulating film is exposed in the contact hole, into which barrier metal intrudes to cause short-circuit defects. In the present invention, in the pre-metal process, after forming the ozone TEOS film over an etch stop film, the ozone TEOS film is once etched back so as to expose the etch stop film over a gate structure, and, after that, a plasma TEOS film is formed over the remaining ozone TEOS film, and then the plasma TEOS film is planarized by CMP.

Abstract: There is provided a technology which allows improvements in manufacturing yield and product reliability in a semiconductor device having a triple well structure. A shallow p-type well is formed in a region different from respective regions in a p-type substrate where a deep n-type well, a shallow p-type well, and a shallow n-type well are formed. A p-type diffusion tap formed in the shallow p-type well is wired to a p-type diffusion tap formed in a shallow n-type well in the deep n-type well using an interconnection in a second layer. The respective gate electrodes of an nMIS and a pMIS each formed in the deep n-type well are coupled to the respective drain electrodes of an nMIS and a pMIS each formed in the substrate using an interconnection in a second or higher order layer.

Abstract: There is provided a technology which allows improvements in manufacturing yield and product reliability in a semiconductor device having a triple well structure. A shallow p-type well is formed in a region different from respective regions in a p-type substrate where a deep n-type well, a shallow p-type well, and a shallow n-type well are formed. A p-type diffusion tap formed in the shallow p-type well is wired to a p-type diffusion tap formed in a shallow n-type well in the deep n-type well using an interconnection in a second layer. The respective gate electrodes of an nMIS and a pMIS each formed in the deep n-type well are coupled to the respective drain electrodes of an nMIS and a pMIS each formed in the substrate using an interconnection in a second or higher order layer.

Abstract: There is provided a technology which allows improvements in manufacturing yield and product reliability in a semiconductor device having a triple well structure. A shallow p-type well is formed in a region different from respective regions in a p-type substrate where a deep n-type well, a shallow p-type well, and a shallow n-type well are formed. A p-type diffusion tap formed in the shallow p-type well is wired to a p-type diffusion tap formed in a shallow n-type well in the deep n-type well using an interconnection in a second layer. The respective gate electrodes of an nMIS and a pMIS each formed in the deep n-type well are coupled to the respective drain electrodes of an nMIS and a pMIS each formed in the substrate using an interconnection in a second or higher order layer.

Abstract: As a method for constituting a pre-metal interlayer insulating film, such method is considered as forming a CVD silicon oxide-based insulating film having good filling properties of a silicon oxide film by ozone TEOS, reflowing the film at high temperatures to planarize it, then stacking a silicon oxide film having good CMP scratch resistance by plasma TEOS, and, further, planarizing it by CMP. However, it was made clear that, in a process for forming a contact hole, crack in the pre-metal interlayer insulating film is exposed in the contact hole, into which barrier metal intrudes to cause short-circuit defects. In the present invention, in the pre-metal process, after forming the ozone TEOS film over an etch stop film, the ozone TEOS film is once etched back so as to expose the etch stop film over a gate structure, and, after that, a plasma TEOS film is formed over the remaining ozone TEOS film, and then the plasma TEOS film is planarized by CMP.

Abstract: There is provided a technology which allows improvements in manufacturing yield and product reliability in a semiconductor device having a triple well structure. A shallow p-type well is formed in a region different from respective regions in a p-type substrate where a deep n-type well, a shallow p-type well, and a shallow n-type well are formed. A p-type diffusion tap formed in the shallow p-type well is wired to a p-type diffusion tap formed in a shallow n-type well in the deep n-type well using an interconnection in a second layer. The respective gate electrodes of an nMIS and a pMIS each formed in the deep n-type well are coupled to the respective drain electrodes of an nMIS and a pMIS each formed in the substrate using an interconnection in a second or higher order layer.

Abstract: A technique which can improve manufacturing yield and product reliability is provided in a semiconductor device having a triple well structure. An inverter circuit which includes an n-channel type field effect transistor formed in a shallow p-type well and a p-channel type field effect transistor formed in a shallow n-type well, and does not contribute to circuit operations is provided in a deep n-type well formed in a p-type substrate; the shallow p-type well is connected to the substrate using a wiring of a first layer; and the gate electrode of the p-channel type field effect transistor and the gate electrode of the n-channel type field effect transistor are connected to the shallow n-type well using a wiring of an uppermost layer.

Abstract: A method of generating an exposure pattern for lithography to create a plurality of patterns arranged in a predetermined direction, comprises a step of counting the plurality of patterns along this predetermined direction, and generating a first enlarged pattern by moving the edges to a first direction along the predetermined direction for a pattern with an odd number, and by moving the edges to a second direction, which is opposite to the first direction, for a pattern with an even number, and a step of generating a second enlarged pattern by moving the edges to the second direction for the pattern with an odd number, and by moving the edges to the first direction for the pattern with an even number. And the first and second patterns are used for creating the plurality of original patterns in a lithography step using the respective enlarged patterns.

Abstract: A semiconductor device that permits effective use of a region positioned under a positional detection mark or an external electrode, i.e., the region that has not been conventionally utilized may be provided. In a semiconductor device including a lower layer, a shielding film and an upper layer, the lower layer includes at least one selected from the group consisting of a positional detection mark, a quality testing element, and a circuit element. The shielding film is formed on the lower layer and shields an energy beam used for detecting a positional detection mark. The upper layer includes a positional detection mark formed on the shielding film.