Patents by Inventor Masaro Tamatsuka
Masaro Tamatsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6626994Abstract: There are provided a silicon wafer for epitaxial growth wherein a void type defect is not exposed on the surface where an epitaxial layer is grown, and a method for producing an epitaxial wafer comprising measuring the number of the void type defects exposed on the surface of a silicon wafer and/or the number of the void type defects which exist in the part to the depth of at least 10 nm from the surface of the silicon wafer, choosing the silicon wafer wherein the number of these void type defects is smaller than the predetermined value, and growing an epitaxial layer on the surface of the chosen silicon wafer. Thereby, there can be provided a silicon wafer for epitaxial growth wherein generation of SF is reduced and epitaxial wafer, and a method for producing it.Type: GrantFiled: July 24, 2001Date of Patent: September 30, 2003Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Akihiro Kimura, Hideki Sato, Ryuji Kono, Masahiro Kato, Masaro Tamatsuka
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Publication number: 20030164139Abstract: According to the present invention, there are provided a method for producing a silicon single crystal wafer which contains oxygen induced defects by subjecting a silicon single crystal wafer containing interstitial oxygen to a heat treatment wherein the heat treatment includes at least a step of performing a heat treatment using a resistance-heating type heat treatment furnace and a step of performing a heat treatment using a rapid heating and rapid cooling apparatus, and a silicon single crystal wafer produced by the method. There can be provided a method for producing a silicon single crystal wafer which has a DZ layer of higher quality compared with a conventional wafer in a wafer surface layer part and has oxygen induced defects at a sufficient density in a bulk part and the silicon single crystal wafer.Type: ApplicationFiled: January 24, 2003Publication date: September 4, 2003Inventors: Norihiro Kobayashi, Masaro Tamatsuka, Takatoshi Nagoya
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Publication number: 20030157814Abstract: The present invention provides a method for producing a nitrogen-doped annealed wafer, wherein before a wafer sliced from a silicon single crystal doped with at least nitrogen and polished is subjected to a high temperature heat treatment at 1100° C. to 1350° C. in an atmosphere of argon, hydrogen or a mixed gas thereof, a step of maintaining the wafer at a temperature lower than the treatment temperature of the high temperature heat treatment is conducted to allow growth of oxygen precipitation nuclei having such a size that the nuclei should be annihilated by the high temperature heat treatment to such a size that the nuclei should not be annihilated by the high temperature heat treatment, and then the high temperature heat treatment is performed.Type: ApplicationFiled: January 22, 2003Publication date: August 21, 2003Inventors: Makoto Iida, Masaro Tamatsuka
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Patent number: 6599603Abstract: The present invention provides a CZ silicon wafer, wherein the wafer includes rod-like void defects and/or plate-like void defects inside thereof, and a CZ silicon wafer, wherein the silicon wafer includes void defects inside the wafer, a maximum value of a ratio between long side length L1 and short side length L2 (L1/L2) in an optional rectangle circumscribed the void defect image projected on an optional {110} plane is 2.5 or more, and the silicon wafer including rod-like void defects and/or plate-like void defects inside the wafer, wherein a void defect density of the silicon wafer at a depth of from the wafer surface to at least 0.5 &mgr;m after the heat treatment is ½ or less than that of inside the wafer. According to this, the silicon wafer, which is suitable for expanding reducing effect of void defects by heat treatment up to a deeper region, can be obtained.Type: GrantFiled: October 24, 2000Date of Patent: July 29, 2003Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masahiro Kato, Masaro Tamatsuka, Osamu Imai, Akihiro Kimura, Tomosuke Yoshida
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Publication number: 20030104709Abstract: According to the present invention, there are provided a method for heat treatment of silicon wafers wherein a silicon wafer is subjected to a heat treatment at a temperature of from 1000° C. to the melting point of silicon in an inert gas atmosphere, and temperature decreasing in the heat treatment is performed in an atmosphere containing 1-60% by volume of hydrogen, a method for heat treatment of silicon wafers under a reducing atmosphere containing hydrogen by using a rapid heating and rapid cooling apparatus, wherein temperature decreasing rate from the maximum temperature in the heat treatment to 700° C. is controlled to be 20° C./sec or less, and a silicon wafer which has a crystal defect density of 1.0×104 defects/cm3 or more in a wafer bulk portion, a crystal defect density of 1.0×104 defects/cm3 or less in a wafer surface layer of a depth of 0.5 &mgr;m from the surface, a crystal defect density of 0.15 defects/cm2 or less on a wafer surface and surface roughness of 1.Type: ApplicationFiled: January 9, 2003Publication date: June 5, 2003Applicant: Shin-Etsu Handotai Co., Ltd.Inventors: Norihiro Kobayashi, Shoji Akiyama, Yuuichi Matsumoto, Masaro Tamatsuka
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Patent number: 6573159Abstract: According to the present invention, there are provided a method for heat treatment of silicon wafers wherein a silicon wafer is subjected to a heat treatment at a temperature of from 1000° C. to the melting point of silicon in an inert gas atmosphere, and temperature decreasing in the heat treatment is performed in an atmosphere containing 1-60% by volume of hydrogen, a method for heat treatment of silicon wafers under a reducing atmosphere containing hydrogen by using a rapid heating and rapid cooling apparatus, wherein temperature decreasing rate from the maximum temperature in the heat treatment to 700° C. is controlled to be 20° C./sec or less, and a silicon wafer which has a crystal defect density of 1.0×104 defects/cm3 or more in a wafer bulk portion, a crystal defect density of 1.0×104 defects/cm3 or less in a wafer surface layer of a depth of 0.5 &mgr;m from the surface, a crystal defect density of 0.15 defects/cm2 or less on a wafer surface and surface roughness of 1.Type: GrantFiled: August 14, 2000Date of Patent: June 3, 2003Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Norihiro Kobayashi, Shoji Akiyama, Yuuichi Matsumoto, Masaro Tamatsuka
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Publication number: 20030020096Abstract: There is provided a method of producing a bonded SOI wafer wherein a silicon single crystal ingot is grown according to Czochralski method, the single crystal ingot is then sliced to produce a silicon single crystal wafer, the silicon single crystal wafer is subjected to heat treatment in a non-oxidizing atmosphere at a temperature of 1100° C. to 1300° C. for one minute or more and continuously to a heat treatment in an oxidizing atmosphere at a temperature of 700° C. to 1300° C. for one minute or more without cooling the wafer to a temperature less than 700° C. to provide a silicon single crystal wafer wherein a silicon oxide film is formed on the surface, and the resultant wafer is used as the bond wafer, and a bonded SOI wafer produced by the method. There can be provided a SOI wafer that has a SOI layer having few crystal defects, good surface roughness and high quality in high productivity, in high yield and with low cost.Type: ApplicationFiled: September 17, 2002Publication date: January 30, 2003Applicant: Shin-Etsu Handotai Co., Ltd.Inventors: Shoji Akiyama, Masaro Tamatsuka
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Patent number: 6492682Abstract: There is provided a method of producing a bonded SOI wafer wherein a silicon single crystal ingot is grown according to Czochralski method, the single crystal ingot is then sliced to produce a silicon single crystal wafer, the silicon single crystal wafer is subjected to heat treatment in a non-oxidizing atmosphere at a temperature of 1100° C. to 1300° C. for one minute or more and continuously to a heat treatment in an oxidizing atmosphere at a temperature of 700° C. to 1300° C. for one minute or more without cooling the wafer to a temperature less than 700° C. to provide a silicon single crystal wafer wherein a silicon oxide film is formed on the surface, and the resultant wafer is used as the bond wafer, and a bonded SOI wafer produced by the method. There can be provided a SOI wafer that has a SOI layer having few crystal defects, good surface roughness and high quality in high productivity, in high yield and with low cost.Type: GrantFiled: April 26, 2001Date of Patent: December 10, 2002Assignee: Shin-Etsu Handotal Co., Ltd.Inventors: Shoji Akiyama, Masaro Tamatsuka
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Publication number: 20020173173Abstract: The present invention provides an annealed wafer manufacturing method using a heat treatment method causing no change in resistivity of a wafer surface even when a silicon wafer having boron deposited on a surface thereof from an environment is subjected to heat treatment in an insert gas atmosphere and enabling the heat treatment in an ordinary diffusion furnace not requiring a sealed structure for increasing airtightness nor any specific facility such as explosion-proof facility. The present invention also provides an annealed wafer in which a boron concentration in the vicinity of a surface thereof is constant and crystal defects are annihilated.Type: ApplicationFiled: May 17, 2002Publication date: November 21, 2002Inventors: Norihiro Kobayashi, Masaro Tamatsuka, Takatoshi Nagoya, Wei Feig Qu, Makoto Iida
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Patent number: 6478883Abstract: A silicon wafer for epitaxial growth consisting of a highly boron-doped silicon single crystal wafer, an antimony-doped silicon single crystal wafer or a phosphorus-doped silicon single crystal wafer, which allows easy oxygen precipitation and exhibits high gettering ability in spite of its suppressed oxygen concentration, and an epitaxial silicon wafer in which an epitaxial layer grown by using the aforementioned wafer as a substrate wafer has an extremely low heavy metal impurity concentration are produced with high productivity and supplied. The present invention relates to a boron-doped silicon single crystal wafer having a resistivity of from 10 m&OHgr;·cm to 100 m&OHgr;·cm, an antimony-doped silicon single crystal wafer, or a phosphorus-doped silicon single crystal wafer, which are produced by slicing a silicon single crystal ingot grown by the Czochralski method with nitrogen doping.Type: GrantFiled: April 18, 2000Date of Patent: November 12, 2002Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masaro Tamatsuka, Ken Aihara, Katsuhiko Miki, Hiroshi Takeno, Yoshinori Hayamizu
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Publication number: 20020160591Abstract: There is provided a manufacturing process for an annealed wafer capable of reducing boron contamination occurring while annealing is performed in a state where a wafer surface after cleaning is exposed to a gas in Ar atmosphere to suppress a change in resistivity due to an increase in a boron concentration in the vicinity of the wafer surface after annealing and manufacture an annealed wafer in which a difference in a boron concentration between a surface layer portion thereof and a bulk portion thereof is essentially not a problem even if a silicon wafer having a comparative low boron concentration (1×1016 atoms/cm3 or less) is used as the annealed wafer. The manufacturing process for an annealed wafer comprises: cleaning a silicon wafer; and loading the silicon wafer into a heat treatment furnace to heat-treat the silicon wafer in an Ar atmosphere, wherein an aqueous solution including hydrofluoric acid is used as a final cleaning liquid in the cleaning.Type: ApplicationFiled: November 28, 2001Publication date: October 31, 2002Inventors: Shoji Akiyama, Norihiro Kobayashi, Masaro Tamatsuka, Takatoshi Nagoya
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Patent number: 6413310Abstract: Silicon single crystal wafers for semiconductor devices of high quality are obtained with high productivity by effectively reducing or eliminating grown-in defects in surface layers of silicon single crystal wafers produced by the CZ method. The present invention provides a method for producing a silicon single crystal wafer, which comprises growing a silicon single crystal ingot by the Czochralski method, slicing the single crystal ingot into a wafer, subjecting the wafer to a heat treatment at a temperature of 1100-1300° C. for 1 minute or more under a non-oxidative atmosphere, and successively subjecting the wafer to a heat treatment at a temperature of 700-1300° C. for 1 minute or more under an oxidative atmosphere without cooling the wafer to a temperature lower than 700° C. The present invention also provides a CZ silicon single crystal wafer, wherein density of COPs having a size of 0.09 &mgr;m or more in a surface layer having a thickness of up to 5 &mgr;m from a surface is 1.Type: GrantFiled: April 20, 2000Date of Patent: July 2, 2002Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masaro Tamatsuka, Norihiro Kobayashi, Shoji Akiyama, Masaru Shinomiya
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Patent number: 6299982Abstract: There is disclosed a silicon single crystal wafer produced by processing a silicon single crystal ingot grown by Czochralski method with doping nitrogen, wherein a size of grown-in defects in the silicon single crystal wafer is 70 nm or less, a silicon single crystal wafer produced by processing a silicon single crystal ingot grown by Czochralski method with doping nitrogen, the silicon single crystal ingot is grown with controlling a rate of cooling from 1150 to 1080° C. to be 2.3° C./min or more, and a method for producing a silicon single crystal wafer wherein a silicon single crystal ingot is grown with doping nitrogen and controlling a rate of cooling from 1150 to 1080° C. to be 2.3° C./min or more, and is then processed to provide a silicon single crystal wafer. The silicon single crystal wafer for device wherein growth of the crystal defects is suppressed can be produced by CZ method in high productivity.Type: GrantFiled: May 18, 1999Date of Patent: October 9, 2001Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masaro Tamatsuka, Akihiro Kimura, Katsuhiko Miki, Makoto Iida
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Patent number: 6291874Abstract: There are disclosed a method for producing a silicon single crystal wafer for particle monitoring, which comprises growing a silicon single crystal ingot doped with nitrogen by the Czochralski method, and processing the single crystal ingot into wafers to produce the silicon single crystal wafer for particle monitoring; and a silicon single crystal wafer for particle monitoring, which is a silicon single crystal wafer for particle monitoring obtained by processing a silicon single crystal ingot into wafers, which ingot has been produced by the Czochralski method while doped with nitrogen. The method of the present invention can produce silicon single crystal wafers for particle monitoring having few pits on wafer surfaces with high productivity.Type: GrantFiled: May 18, 1999Date of Patent: September 18, 2001Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masaro Tamatsuka, Katsuhiko Miki
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Patent number: 6261361Abstract: There is disclosed a method for producing a silicon single crystal wafer wherein a silicon single crystal is grown in accordance with the CZ method with doping nitrogen in an N-region in a defect distribution chart which shows a defect distribution in which the horizontal axis represents a radial distance D (mm) from the center of the crystal and the vertical axis represent a value of F/G (mm2/° C.·min), where F is a pulling rate (mm/min) of the single crystal, and G is an average intra-crystal temperature gradient(° C./mm) along the pulling direction within a temperature range of the melting point of silicon to 1400° C. There can be provided a method of producing a silicon single crystal wafer consisting of N-region where neither V-rich region nor I-rich region is present in the entire surface of the crystal by CZ method, under the condition that can be controlled easily in a wide range, in high yield, and in high productivity.Type: GrantFiled: May 19, 2000Date of Patent: July 17, 2001Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Makoto Iida, Masaro Tamatsuka, Masanori Kimura, Shozo Muraoka
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Patent number: 6224668Abstract: There are disclosed a method for producing an SOI substrate comprising forming an oxide layer on a surface of at least one silicon wafer among two silicon wafers, closely contacting one wafer with the other wafer so that the oxide layer should be interposed between them, subjecting the wafers to a heat treatment to firmly bond the wafers, and making a device processing side wafer thinner to a desired thickness, wherein a silicon single crystal wafer obtained by growing a silicon single crystal ingot doped with nitrogen by the Czochralski method, and slicing the single crystal ingot into a silicon single crystal wafer is used as the device processing side wafer, and an SOI substrate produced by the method. The present invention provides a method for producing SOI substrates, in particular thin film SOI substrates having an SOI layer thickness of 1 &mgr;m or less, exhibiting a small crystal defect size in the SOI layer, and SOI substrates with low cost and high productivity.Type: GrantFiled: May 18, 1999Date of Patent: May 1, 2001Assignee: Shin-Etsu Handotai Co., Ltd.Inventor: Masaro Tamatsuka
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Patent number: 6197109Abstract: There is disclosed a method for producing a silicon single crystal by growing the silicon single crystal by the Czochralski method, characterized in that the crystal is pulled at a pulling rate [mm/min] within a range of from V1 to V1+0.062×G while the crystal is doped with nitrogen during the growing, where G [K/mm] represents an average temperature gradient along the crystal growing direction, which is for a temperature range of from the melting point of silicon to 1400° C., and provided in an apparatus used for the crystal growing, and V1 [mm/min] represents a pulling rate at which an OSF ring disappears at the center of the crystal when the crystal is pulled by gradually decreasing the pulling rate.Type: GrantFiled: June 10, 1999Date of Patent: March 6, 2001Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Makoto Iida, Masaro Tamatsuka, Wataru Kusaki, Masanori Kimura, Shozo Muraoka
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Patent number: 6191009Abstract: In a method for producing a silicon single crystal wafer, a silicon single crystal ingot in which nitrogen is doped is grown by a Czochralski method, sliced to provide a silicon single crystal wafer, and then subjected to heat treatment to out-diffuse nitrogen on the surface of the wafer. According to a further method, a silicon single crystal ingot is grown in which nitrogen is doped by a Czochralski method, with controlling nitrogen concentration, oxygen concentration and cooling rate, and then the silicon single crystal ingot is sliced to provide a wafer. A silicon single crystal wafer is obtained by slicing a silicon single crystal ingot grown by a Czochralski method with doping nitrogen, wherein the depth of a denuded zone after gettering heat treatment or device fabricating heat treatment is 2 to 12 &mgr;m, and the bulk micro-defect density after gettering heat treatment or device fabricating heat treatment is 1×108 to 2×1010 number/cm3.Type: GrantFiled: March 8, 1999Date of Patent: February 20, 2001Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masaro Tamatsuka, Makoto Iida, Norihiro Kobayashi
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Patent number: 6162708Abstract: There is disclosed a method for producing an epitaxial silicon single crystal wafer comprising the steps of growing a silicon single crystal ingot wherein nitrogen is doped by Czochralski method, slicing the silicon single crystal ingot to provide a silicon single crystal wafer, and forming an epitaxial layer in the surface layer portion of the silicon single crystal wafer. There can be manufactured easily and in high productivity an epitaxial silicon monocrystal wafer which has high gettering capability when a substrate having a low boron concentration is used, a low concentration of heavy metal impurity, and an excellent crystallinity.Type: GrantFiled: May 11, 1999Date of Patent: December 19, 2000Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masaro Tamatsuka, Ken Aihara, Tomosuke Yoshida
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Patent number: 6139625Abstract: There is disclosed a method of producing a silicon single crystal wafer wherein a silicon single crystal ingot in which nitrogen is doped is grown by Czochralski method, the single crystal ingot is sliced to yield a silicon single crystal wafer, and then the silicon single crystal wafer is subjected to heat treatment with a rapid heating/rapid cooling apparatus, and the silicon single crystal wafer produced by the method. There can be provided a method for producing a silicon single crystal wherein growth of crystal defects (grown-in defects) in silicon single crystal produced by CZ method are suppressed, particularly growth of crystal defects are prevented in the surface layer of the wafer, and crystal defect can be surely removed by a short time heat treatment even if small crystal defects are generated.Type: GrantFiled: March 8, 1999Date of Patent: October 31, 2000Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masaro Tamatsuka, Norihiro Kobayashi, Satoshi Oka