Patents by Inventor Masaru Hashimoto
Masaru Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20020038816Abstract: It is an object of the present invention to provide a method of calculating a development plan of a paper container of deep bottom integrally formed from a single-sheet blank.Type: ApplicationFiled: April 17, 2001Publication date: April 4, 2002Applicant: KURAMAE SANGYO CO., LTD.Inventors: Masaru Hashimoto, Yasuhiro Ohara
-
Publication number: 20020030585Abstract: A data transmission system using a human body as a signal transmission path includes a transmitter and a receiver. The transmitter uses a pair of electrodes which are held in close proximity to the skin of the human body. The transmitter transmits data to the receiver through the signal transmission path partly extending through the human body when a user carrying the transmitter touches a touch electrode of the receiver. The electrodes are integrated into a garment worn by the user in such a manner that the electrodes are kept in a closely facing relation to the skin of the user, thereby establishing the electrical path extending through the human body. With the integration of the two electrodes into the garment, the user wearing the garment as an everyday clothes or uniform can be easy and convenient to carry the transmitter for successful transmission of the data.Type: ApplicationFiled: September 10, 2001Publication date: March 14, 2002Applicant: Matsushita Electric Works, Ltd.Inventors: Kenji Doi, Masaru Hashimoto, Masaki Koyama, Yoshiko Suzuki, Tokuhisa Nishimura
-
Patent number: 6344778Abstract: A delay-time variable filter delays an input signal by a desired time according to a control signal from a control input node and outputs the delayed input signal, and a positive feedback loop circuit changes the output signal (sinusoidal wave signal) from this filter, and provides a positive feedback of the binary pulse signal to the input side of the filter at a desired level for carrying out an oscillation. This positive feedback loop circuit includes a circuit for changing the signal into a binary signal and providing a positive feedback of the binary signal to the input of the filter by limiting the signal at a desired amplitude. As the delay-time variable filter, a quartic Butterworth low-pass filter is used, for example. As the positive feedback loop circuit, there is used a voltage comparator circuit that changes an input signal into a binary signal and outputs a pulse signal of a desired amplitude.Type: GrantFiled: June 16, 2000Date of Patent: February 5, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Norio Nakamura, Katsuyuki Omi, Toshio Shiramatsu, Nobuyasu Goto, Masaru Hashimoto
-
Patent number: 6237845Abstract: An improved paper container having a deep bottom which is formed from a single sheet of paper blank, and a method of making the same, is provided, which may be used as a drink container, food container or for any application requiring a container having strong, waterproof capabilities. Such a paper container is formed from a paper blank prepared by cutting a sheet of original paper in a predetermined shape, forming numerous ruled lines on the blank, folding along the ruled lines in various detailed steps, and finally curling back an upper face opening edge (serving as the mouth of the container).Type: GrantFiled: September 23, 1999Date of Patent: May 29, 2001Assignee: Kuramae Sangyo Co., Ltd.Inventors: Masaru Hashimoto, Akira Nagashima, Jun Maekawa, Tomoko Fuse
-
Patent number: 5638026Abstract: A high input impedance circuit includes an amplifier such as an operational amplifier comprising transistors of a first polarity which serve as a differential pair and input of the amplifier, base of one transistor being caused to serve as a positive input terminal, base of the other transistor being caused to serve as a negative input terminal. The high input impedance circuit further includes a transistor having base connected to the positive input terminal, and a second polarity opposite to the first polarity, wherein collector of the transistor of the second polarity is connected through d.c. path to a first power supply, e.g., ground, and emitter of the transistor of the second polarity is connected through d.c. path to a second power supply, e.g., power supply voltage terminal through a resistor to apply a signal in phase with an input signal delivered to the positive input terminal to the emitter of the transistor of second polarity to thereby allow input impedance to be higher.Type: GrantFiled: July 28, 1995Date of Patent: June 10, 1997Assignee: Kabushiki Kaisha ToshibaInventor: Masaru Hashimoto
-
Patent number: 5222016Abstract: According to this invention, a frequency converter comprises a frequency mixer (11) formed in a semiconductor integrated circuit (10), an impedance conversion/signal amplitude limit differential amplifier (12) formed in the semiconductor integrated circuit and connected to the output of the frequency mixer, a first frequency mixing output terminal (14) connected to an output terminal of the frequency mixer and serving as an external terminal of the semiconductor integrated circuit, and a second frequency mixing output terminal (15) connected to an output terminal of the differential amplifier and serving as an external terminal of the semiconductor integrated circuit.Type: GrantFiled: July 29, 1991Date of Patent: June 22, 1993Assignee: Kabushiki Kaisha ToshibaInventors: Susumu Matsumoto, Masaru Hashimoto
-
Patent number: 5149199Abstract: A temperature detection circuit includes first and second current sources and a comparing circuit. A first current source generates a current having a positive temperature coefficient and flowing in a band gap type voltage source. A second current source generates a current having a zero or negative temperature coefficient. The comparing circuit compares the amounts of currents flowing in the first and second current sources to detect the relation between the magnitudes of the compared currents.Type: GrantFiled: May 21, 1991Date of Patent: September 22, 1992Assignee: Kabushiki Kaisha ToshibaInventors: Hitoshi Kinoshita, Masaru Hashimoto
-
Patent number: 4652900Abstract: A semiconductor device capable of suppressing the influence of a parasitic pnp transistor caused when an npn transistor operates in saturation range in such a way that a p-type impurity region is formed in the outer layer of an n-type collector region and electrically short-circuited with the n-type collector region isolated by a p-type isolation diffusion layer in the npn bi-polar transistor.Type: GrantFiled: July 9, 1985Date of Patent: March 24, 1987Assignee: Tokyo Shibaura Denki Kabushiki KaishaInventor: Masaru Hashimoto
-
Patent number: 4621206Abstract: Disclosed is a level detector in use with a differential amplifier circuit in an amplitude-limiting amplifying system for angle-modulation signal amplification. The differential amplifier circuit is made up of differentially paired transistors. The level detector contains first and second transistors which form a differential pair. In the first transistor, the base is connected to an interjunction of the emitters of the differentially paired transistors. A second transistor is connected at the emitter to the emitter of the first transistor. A current source is connected to the emitter interjunction of the first and second transistors. A bias circuit applies a predetermined bias potential to the base of the second transistor. An output signal containing the detected level information of the input signal is derived from the collector of the first or second transistor.Type: GrantFiled: May 16, 1984Date of Patent: November 4, 1986Assignee: Kabushiki Kaisha ToshibaInventor: Masaru Hashimoto
-
Patent number: 4538198Abstract: A protection circuit for an output transistor which produces a protecting signal representing the power consumption of the output transistor, namely the product of collector current and collector to emitter voltage of the output transistor, thereby protecting the output transistor over a broad operating range.Type: GrantFiled: July 21, 1984Date of Patent: August 27, 1985Assignee: Tokyo Shibaura Denki Kabushiki KaishaInventors: Kazuo Imanishi, Masaru Hashimoto, Makoto Mori
-
Patent number: 4498054Abstract: A differential amplifier circuit includes first and second differential amplifiers, with respective first input terminals thereof connected to each other and first and second current sources for supplying first and second drive currents to drive the first and second amplifiers respectively. The first and second drive currents are set such that their sum is constant. The differential amplifier circuit further includes first and second transistors with the bases thereof connected to second input terminals of the first and second amplifiers respectively and third and fourth current sources respectively connected to the current paths of the first and second transistors and supplying third and fourth drive currents equal to one half the respective second and first drive currents.Type: GrantFiled: August 26, 1983Date of Patent: February 5, 1985Assignee: Tokyo Shibaura Denki Kabushiki KaishaInventors: Hirokazu Fukuda, Masaru Hashimoto
-
Patent number: 4466115Abstract: An FM stereo signal demodulator for separating a composite stereo signal into left and right signals is disclosed wherein the amplitude of the 38 kHz signal necessary to separate the composite signal is varied in accordance with the field strength of a received signal.Type: GrantFiled: November 19, 1979Date of Patent: August 14, 1984Assignee: Tokyo Shibaura Denki Kabushiki KaishaInventor: Masaru Hashimoto
-
Patent number: 4374356Abstract: A constant voltage circuit having an input voltage applied to input terminals, and which generates a constant voltage at its output terminals, wherein a first transistor is connected between one input terminal and one output terminal with the base of the first transistor connected through a second transistor to the other input terminal. A current related to the input voltage is applied to a connecting point between the first and second transistors. A first current path is constituted between the input terminal and the output terminal, and a second current path is connected to the connecting point and passes a current in response to the current in the first current path.Type: GrantFiled: August 31, 1981Date of Patent: February 15, 1983Assignee: Tokyo Shibaura Denki Kabushiki KaishaInventor: Masaru Hashimoto
-
Patent number: 4339674Abstract: A trigger circuit comprises first, second and third transistors whose emitters are connected in common to a constant current source, a current mirror having input and output terminals connected respectively to the collectors of the second and third transistors, a diode connected between the collector of the first transistor and the input terminal of the current mirror, and a switching transistor whose base and collector are connected respectively to the output terminal of the current mirror and the collector of the first transistor. The bases of the first and second transistors are connected in common to a first input terminal, while the base of the third transistor is connected to a second input terminal. A trigger signal is applied between the first and second input terminals. The diode and switching transistor are on and off respectively in one of two stable states of the trigger circuit, and are off and on respectively in the other.Type: GrantFiled: September 12, 1980Date of Patent: July 13, 1982Assignee: Tokyo Shibaura Denki Kabushiki KaishaInventor: Masaru Hashimoto
-
Patent number: 4240041Abstract: Disclosed is a high-frequency amplifier circuit which comprises a first transistor with its base coupled to a high-frequency input terminal and grounded through a first diode and emitter grounded, a second transistor with its emitter coupled to the collector of the first transistor, base grounded through second and third diodes and coupled to a reference power supply terminal through a resistor, and collector directly coupled to the reference power supply terminal, and a third transistor with its base coupled to the emitter of the second transistor, emitter grounded, and collector coupled to an output terminal.Type: GrantFiled: June 5, 1979Date of Patent: December 16, 1980Assignee: Tokyo Shibaura Denki Kabushiki KaishaInventors: Masaru Hashimoto, Motoaki Yoshinaga
-
Patent number: 4119869Abstract: A constant current circuit including an emitter follower stage consisting of a transistor and a resistance connected in series thereto, an output stage connected in cascade with the emitter follower stage, and two diodes connected in series between the base of the transistor and an external power source, whereby a desired output current which flows through said output stage is obtained by supplying predetermined currents to the diodes and the emitter follower stage respectively.Type: GrantFiled: January 28, 1977Date of Patent: October 10, 1978Assignee: Tokyo Shibaura Electric Company, Ltd.Inventor: Masaru Hashimoto
-
Patent number: 4115748Abstract: A MOS IC oscillation circuit comprising a circuit including a MOS FET and a resistor connected in series between a power source and ground, a capacitor one end of which is connected to the junction between both said components and the other end is connected to said power source or the ground, and a Schmitt trigger circuit receiving an input signal from the junction and produces an output signal which controls "on-off" operation of the MOS FET.Type: GrantFiled: March 17, 1977Date of Patent: September 19, 1978Assignee: Tokyo Shibaura Electric Co., Ltd.Inventors: Daijiro Kubo, Masaru Hashimoto
-
Patent number: 4083223Abstract: The quality of joints formed by spot welding, particularly the diameters of the individual nuggets, can accurately and nondestructively be inspected by heating or cooling one of the welded members and measuring the distribution of the surface temperature of the other member because of a maximal heat conduction at each nugget. The surface temperature distribution may be measured merely linearly since the width of a peak on the temperature-distance curve depends on the diameter of a nugget.Type: GrantFiled: November 10, 1976Date of Patent: April 11, 1978Assignee: Nissan Motor Company, LimitedInventors: Masaru Hashimoto, Masaya Ogata
-
Patent number: 3967903Abstract: A non-storage type image pick-up tube line scans a sample for picking up the fringes. A circuit responds to the maximum and minimum values of the output from the image pick-up tube generating a signal corresponding to the brightness of the fringes, signals corresponding to the positions of the bright and/or dark spots of the fringes, and signals corresponding to the spacings between a reference point and the positions of the bright and/or dark spots of the fringes.Type: GrantFiled: November 18, 1974Date of Patent: July 6, 1976Assignee: Nissan Motor Co., Ltd.Inventors: Toyoichiro Enami, Kazuo Kurasawa, Masaktaka Ii, Masaru Hashimoto