Patents by Inventor Masaru Izawa

Masaru Izawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070023143
    Abstract: A diameter of a mounting unit of the stage of an ashing processing apparatus is less than a diameter of a mounting unit of the stage of an etching processing apparatus, and the diameter of the mounting unit of the stage of the etching processing apparatus is less than a diameter of an objective item.
    Type: Application
    Filed: February 16, 2006
    Publication date: February 1, 2007
    Inventors: Hiroyuki Kobayashi, Masaru Izawa
  • Patent number: 7145146
    Abstract: A micro-spectroscopic measuring device having a structure in which a spectroscopic element made of an array of photonic crystals with defects, flow paths for introducing a sample, and light detecting elements with sensitivity to a band from near infrared to infrared are stacked.
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: December 5, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Taro Ogawa, Toshiki Sugawara, Kazuhiko Hosomi, Masataka Shirai, Toshio Katsuyama, Kaoru Umemura, Masaru Izawa, Kazuhiko Sagara, Hiroshi Kakibayashi
  • Publication number: 20060254717
    Abstract: A plasma processing apparatus includes a vacuum processing chamber, supplying means for introducing a processing gas into the vacuum processing chamber, a mounting electrode in the vacuum processing chamber for mounting a specimen on the mounting electrode, and a pusher pin for raising the specimen placed on the mounting electrode and holding the specimen over the mounting electrode, wherein the mounting electrode includes an inner area for mounting the specimen, an outer area for mounting a focus ring, and a high-frequency power source for supplying electric power to the inner area and the outer area, and wherein high-frequency electric power is applied to the outer area to generate plasma at the outer edge of the backside of the specimen while the specimen is raised with the pusher pin.
    Type: Application
    Filed: August 30, 2005
    Publication date: November 16, 2006
    Inventors: Hiroyuki Kobayashi, Masaru Izawa, Kenetsu Yokogawa, Tomoyuki Tamura, Kenji Maeda
  • Publication number: 20060236932
    Abstract: The invention provides a plasma processing apparatus capable of preventing the production of particle and preventing the influence of particle on the sample. The plasma processing apparatus comprises a vacuum chamber; process gas introducing means for introducing process gas into the vacuum chamber; means, coupled to a first RF power supply, for applying RF energy to the process gas introduced into the vacuum chamber to turn the process gas into plasma; a sample mounting electrode for mounting a sample on an upper surface thereof and holding the sample in the vacuum chamber; evacuation means for evacuating the process gas in the vacuum chamber; and plasma confining means, provided on a peripheral side of the mounting electrode in the vacuum chamber, for inflecting flow of the process gas caused by the evacuation means on a downstream side of a sample mounting surface of the mounting electrode to prevent plasma from diffusing downstream of the sample mounting surface.
    Type: Application
    Filed: August 11, 2005
    Publication date: October 26, 2006
    Inventors: Kenetsu Yokogawa, Kenji Maeda, Hiroyuki Kobayashi, Masaru Izawa, Tadamitsu Kanekiyo
  • Publication number: 20060169207
    Abstract: A semiconductor manufacturing apparatus includes a vacuum processing chamber and a transportation chamber each including a gas supply unit and a gas exhaust unit, a sample placing electrode for placing a sample thereon and holding the sample in the processing chamber, a gate valve for opening/closing a passage between the processing chamber and the transportation chamber, a transportation device including a transportation arm disposed in the transportation chamber and a sample holding portion disposed at a tip of the arm to hold the sample on the sample holding portion, transport the sample from the transportation chamber to the processing chamber, and transport the processed sample from the processing chamber to the transportation chamber, and a gas blowing unit for blowing gas against the sample so as to be interlocked with a transportation position of the sample being transported to prevent adhesion of floating particles to a surface of the sample.
    Type: Application
    Filed: March 2, 2005
    Publication date: August 3, 2006
    Inventors: Hiroyuki Kobayashi, Kenetsu Yokogawa, Masaru Izawa, Kenji Maeda, Tomoyuki Tamura
  • Publication number: 20060141795
    Abstract: The object of this invention is to provide a method for fabricating a semiconductor device in which the yield and productivity are improved. In the method for fabricating a semiconductor device according to the invention, a plasma etching system is prepared which includes a vacuum chamber 1, a susceptor 7 arranged in the vacuum chamber 1 to place a wafer 8, a gas introducing means 2 to introduce the material gas into the vacuum chamber and a high-frequency power introducing means 6. The gas introduced into the vacuum chamber by the gas introducing means 2 is converted into a plasma by the high-frequency power, and a plurality of holes are selectively formed in the oxide film 23 of a main wafer surface in a plasma atmosphere. In the hole forming step, light 15 having a continuous spectrum is irradiated on a flat portion and a hole portion of the main surface of the semiconductor wafer thereby to measure the reflectivity change in the flat portion and the hole portion.
    Type: Application
    Filed: October 18, 2002
    Publication date: June 29, 2006
    Inventors: Nobuyuki Negishi, Kenetsu Yokogawa, Masaru Izawa
  • Patent number: 7049243
    Abstract: A plasma processing method for etching a sample having a gate oxide film which generates a plasma in a vacuum chamber using electromagnetic waves, applies an rf bias power to the sample, turns off the rf bias power before a charged voltage of the sample reaches a breakdown voltage of the gate oxide film, turns on the rf bias power after the charged voltage of the sample has substantially dropped and repeats the turning on and off of the rf bias power to process the sample. The off-time is set at least longer than the on-time, and the plasma is generated by continuously supplying power to enable generation of the plasma during the repeated turning on and off of the rf bias power.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: May 23, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuo Ono, Yasuhiro Nishimori, Takashi Sato, Naoyuki Kofuji, Masaru Izawa, Yasushi Goto, Ken Yoshioka, Hideyuki Kazumi, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takafumi Tokunaga, Motohiko Yoshigai
  • Publication number: 20060016560
    Abstract: The invention provides a plasma processing apparatus which is based upon a dry etching apparatus and which can inhibit the contamination of a work piece caused by sputtering onto a wall of a vacuum chamber, the occurrence of a foreign matter, the increase of a running cost for replacing the walls of the vacuum chamber and the deterioration of a rate of operation.
    Type: Application
    Filed: July 18, 2005
    Publication date: January 26, 2006
    Inventors: Kenetsu Yokogawa, Kenji Maeda, Masaru Izawa
  • Publication number: 20060016559
    Abstract: The object of the invention is to provide a plasma processing apparatus having enhanced plasma processing uniformity. The plasma processing apparatus comprises a processing chamber 1, means 13 and 14 for supplying processing gas into the processing chamber, evacuation means 25 and 26 for decompressing the processing chamber 1, an electrode 4 on which an object 2 to be processed such as a wafer is placed, and an electromagnetic radiation power supply 5A, wherein at least two kinds of processing gases having different composition ratios of O2 or N2 are introduced into the processing chamber through different gas inlets so as to control the in-plane uniformity of the critical dimension while maintaining the in-plane uniformity of the process depth.
    Type: Application
    Filed: August 5, 2004
    Publication date: January 26, 2006
    Applicant: Hitachi, Ltd.
    Inventors: Hiroyuki Kobayashi, Kenji Maeda, Kenetsu Yokogawa, Masaru Izawa, Tadamitsu Kanekiyo
  • Publication number: 20050284571
    Abstract: A resist damage free dry-etching process is proposed. A time duration defined until bias electric power is applied is controlled according to a plasma ignition detection signal. Wafer back-side gas pressure for a certain constant time after starting of an etching process operation is set to be lower than that as to a main etching condition. Within the time duration defined after starting of the etching process operation up to a certain constant time, CxFy gas having a lower C/F ratio than that of the main etching condition is employed, or a flow rate of the CxFy gas is lowered. The above-described parameter values are controlled every wafer according to an amount of radicals contained in the plasma being monitored. A unit for preheating a wafer is installed in a water transporting system.
    Type: Application
    Filed: March 1, 2005
    Publication date: December 29, 2005
    Inventors: Nobuyuki Negishi, Masaru Izawa, Masatsugu Arai
  • Patent number: 6977229
    Abstract: The present invention is provided to prevent yield reduction of semiconductor device in dry cleaning of semiconductor device manufacturing process. The electric action and chemical action due to plasma of a first gas generated by means of a plasma generating means and the physical action due to viscous friction force of high speed gas flow generated by means of a planar pad that is brought close to the main surface of a wafer are applied together for cleaning the main surface of the wafer. After cleaning, the wafer is exposed to plasma of a second gas in the same vacuum chamber and then transferred to the atmosphere.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: December 20, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Kenetsu Yokogawa, Yoshinori Momonoi, Masaru Izawa
  • Publication number: 20050048787
    Abstract: A condition without using Ar as plasma gas is applied to processing of an organic anti-reflection-coating, which suppresses a spatter effect and decreases the cleavage of C—H and OC—O bonds in a resist. As a result, roughness of the resist after processing the anti-reflection-coating can be suppressed, and pitting and striations after processing a next film to be processed, that is an insulating film, can be prevented. For a rare gas to be used at the time of processing the insulating film, any one of Xe, Kr, a mixed gas of Ar and Xe, and a mixed gas of Ar and Kr is applied in place of Ar, giving rise to reduction in pitting and striations after etching. In addition, a dry etching method with less critical-dimension shift and excellence in both apparatus cost and throughput can be provided by performing resist modification and etching by turns.
    Type: Application
    Filed: August 25, 2004
    Publication date: March 3, 2005
    Inventors: Nobuyuki Negishi, Masaru Izawa, Kenetsu Yokogawa
  • Publication number: 20050017178
    Abstract: A micro-spectroscopic measuring device having a structure in which a spectroscopic element made of an array of photonic crystals with defects, flow paths for introducing a sample, and light detecting elements with sensitivity to a band from near infrared to infrared are stacked.
    Type: Application
    Filed: March 1, 2004
    Publication date: January 27, 2005
    Inventors: Taro Ogawa, Toshiki Sugawara, Kazuhiko Hosomi, Masataka Shirai, Toshio Katsuyama, Kaoru Umemura, Masaru Izawa, Kazuhiko Sagara, Hiroshi Kakibayashi
  • Patent number: 6842658
    Abstract: Automatic generation of processing conditions will be provided, based on a database and process modeling by a computer equipped in semiconductor device fabrication equipment, by using input of wafer processing history including the thickness and quality. The computer equipped in semiconductor device fabrication equipment obtains the wafer processing and inspection results from a production line management computer in order to assist input of the process history. The computer in the fabrication equipment can be connected to computers in a fabrication equipment manufacturer on a communication network to automatically provide process conditions and maintenance schedule.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: January 11, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Masaru Izawa, Masahito Mori, Nobuyuki Negishi, Shinichi Tachi
  • Publication number: 20040259361
    Abstract: A plasma processing method for etching a sample having a gate oxide film which generates a plasma in a vacuum chamber using electromagnetic waves, applies an rf bias power to the sample, turns off the rf bias power before a charged voltage of the sample reaches a breakdown voltage of the gate oxide film, turns on the rf bias power after the charged voltage of the sample has substantially dropped and repeats the turning on and off of the rf bias power to process the sample. The off-time is set at least longer than the on-time, and the plasma is generated by continuously supplying power to enable generation of the plasma during the repeated turning on and off of the rf bias power.
    Type: Application
    Filed: January 12, 2004
    Publication date: December 23, 2004
    Inventors: Tetsuo Ono, Yasuhiro Nishimori, Takashi Sato, Naoyuki Kofuji, Masaru Izawa, Yasushi Goto, Ken Yoshioka, Hideyuki Kazumi, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takafumi Tokunaga, Motohiko Yoshigai
  • Publication number: 20040228774
    Abstract: Disclosed is a technology associated with a microreactor, which realizes convenient introduction of a sample biological cell such as an animal culture cell in the microcell, and enables further reduction in the size as well as higher integration of the microcells, thereby realizing a highly improved efficiency in the drug efficacy screening experiments. In the present invention, interior of the of the microreactor has been treated to impart higher affinity such as hydrophilicity for the sample such as cell while the surface near the microreactor has been treated to impart non-affinity such as water repellency. A mechanical vibration, oscillation, or shaking in either a defined pattern or in a random motion may be applied to the microreactor and the surface near the microreactor cavity by a motion generator or oscillator or the like.
    Type: Application
    Filed: December 11, 2003
    Publication date: November 18, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Taro Ogawa, Masaru Izawa, Nobuyuki Negishi, Kaoru Umemura, Hiroshi Kakibayashi
  • Patent number: 6784109
    Abstract: Semiconductor devices having a wiring construction consisting of a conductive layer (a copper layer) and an insulating layer (a porous insulator layer with low dielectric constant) are fabricated. A method for forming wiring of semiconductor devices includes a first step for forming a first insulating material layer on a sample; a second step for forming a second insulating material layer with a dielectric constant less than 2.5; a third step for patterning the second insulating material layer by a plasma etching method; a fourth step for depositing a metal film on the second insulating material layer by a sputtering method; a fifth step for forming a copper layer on the metal film; and a sixth step for removing an unnecessary portion of the copper layer by Chemical Mechanical Polishing, wherein all the processes from the third to the fourth step are performed under process conditions.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: August 31, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Naoyuki Kofuji, Masaru Izawa
  • Publication number: 20040154700
    Abstract: A chemical conversion treatment liquid which can stably form a phosphate-type chemical conversion film on a steel material for a joint portion of an oil well steel pipe containing 0.5-13% Cr is developed.
    Type: Application
    Filed: February 5, 2004
    Publication date: August 12, 2004
    Inventors: Masaru Izawa, Kunio Goto
  • Patent number: 6756092
    Abstract: A chemical conversion treatment liquid which can stably form a phosphate-type chemical conversion film on a steel material for a joint portion of an oil well steel pipe containing 0.5-13% Cr is developed. Using a chemical conversion treatment liquid to which a prescribed amount of potassium is added, a chemical conversion film containing a prescribed amount of potassium compounds and having a prescribed thickness can be formed on the threaded surface of a joint portion of an oil well steel pipe.
    Type: Grant
    Filed: October 23, 2002
    Date of Patent: June 29, 2004
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Masaru Izawa, Kunio Goto
  • Publication number: 20040058554
    Abstract: In order to provide an etching method for silicone oxide film by fluorocarbon plasma in semiconductor production, which is superior in precise manufacturing and highly selective to resist and silicone nitride film, two kinds of electronic temperature regions are generated in plasma, and a generation ratio of CF2/F is controlled independently from a generation amount of ions by making areas of these two electronic temperature regions variable with a magnetic field gradient and a distance between a wafer and a wafer facing plane.
    Type: Application
    Filed: October 2, 2003
    Publication date: March 25, 2004
    Inventors: Masaru Izawa, Shinichi Tachi, Ken?apos;etsu Yokogawa, Nobuyuki Negishi, Naoyuki Kofuji, Naoshi Itabashi, Seiji Yamamoto, Kazue Takahashi