Patents by Inventor Masaru Moriwaki

Masaru Moriwaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9438686
    Abstract: A content control device is provided with a receiving content accumulation unit which accumulates contents received from a terminal device connected via a network, an operation history information managing unit which manages operation history information indicative of a history on operations with respect to a first content accumulated in the receiving content accumulation unit, and a content control unit which generates control information for controlling a second content based on the operation history information, the second content corresponding to the first content and accumulated in the terminal device.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: September 6, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kento Ogawa, Yasuhiro Yuki, Shunji Harada, Masaru Moriwaki
  • Publication number: 20140222922
    Abstract: A content control device is provided with a receiving content accumulation unit which accumulates contents received from a terminal device connected via a network, an operation history information managing unit which manages operation history information indicative of a history on operations with respect to a first content accumulated in the receiving content accumulation unit, and a content control unit which generates control information for controlling a second content based on the operation history information, the second content corresponding to the first content and accumulated in the terminal device.
    Type: Application
    Filed: June 24, 2013
    Publication date: August 7, 2014
    Inventors: Kento Ogawa, Yasuhiro Yuki, Shunji Harada, Masaru Moriwaki
  • Publication number: 20050102363
    Abstract: An E-mail transmission control device comprises: a mail information storage unit; a destination information storage unit; an E-mail transmission unit; an error information reception unit for receiving error information; an error information decision unit for deciding whether or not the error information satisfies a predetermined condition; a destination excluding unit for executing the destination indicated by the destination information owned by the error information, from the candidates of the destination, in case the error information decision unit decides the satisfaction of the predetermined condition. The electronic transmission control device further comprises a re-transmission decision unit for deciding whether or not a predetermined condition is satisfied, after the destination excluding unit performed the exclusion. The E-mail transmission unit transmits the E-mail to the excluded destination in case the re-transmission decision unit decides the satisfaction of the predetermined condition.
    Type: Application
    Filed: November 9, 2004
    Publication date: May 12, 2005
    Applicant: Matsushita Elec. Ind. Co. Ltd.
    Inventors: Makoto Yokomura, Takashi Hayashi, Takashi Satomura, Toshiro Mitamura, Rika Aizawa, Masaru Moriwaki, Soichiro Fujioka, Minoru Hirano, Yuichiro Hara
  • Patent number: 6812101
    Abstract: A zirconium silicate layer 103 is formed on a silicon substrate 100, a zirconium oxide layer 102 is also formed on the zirconium silicate layer 103, and the zirconium oxide layer 102 is then removed, thereby forming a gate insulating film 104 made of the zirconium silicate layer 103.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: November 2, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaru Moriwaki, Masaaki Niwa, Masafumi Kubota
  • Patent number: 6740941
    Abstract: A metal target, at least the surface region of which has been oxidized, is prepared in a chamber. Then, a sputtering process is performed on the metal target with an inert gas ambient created in the chamber, thereby depositing a first metal oxide film as a lower part of a gate insulating film over a semiconductor substrate. Next, a reactive sputtering process is performed on the metal target with a mixed gas ambient, containing the inert gas and an oxygen gas, created in the chamber, thereby depositing a second metal oxide film as a middle or upper part of the gate insulating film over the first metal oxide film.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: May 25, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaru Moriwaki, Takayuki Yamada
  • Patent number: 6682424
    Abstract: A video game device in which a game screen displayed on a monitor is controlled by operating an operation unit, the video game device comprises a character display control unit for displaying a player character in such a manner as to be rotatable together with a throwing object character and making such a display that the throwing object character is thrown in a specified direction by the player character when the operation unit is operated at a specified timing, and a guide display control unit for setting a guide display area in a partial area of the game screens, displaying a throwing mark in the guide display area which mark moves in response to a rotation of the throwing object character, and displaying an area mark specifying a throwing area of the throwing object character in association with the guide display area.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: January 27, 2004
    Assignee: Konami Corporation
    Inventors: Madoka Yamauchi, Masaru Moriwaki
  • Publication number: 20030173586
    Abstract: A zirconium silicate layer 103 is formed on a silicon substrate 100, a zirconium oxide layer 102 is also formed on the zirconium silicate layer 103, and the zirconium oxide layer 102 is then removed, thereby forming a gate insulating film 104 made of the zirconium silicate layer 103.
    Type: Application
    Filed: January 10, 2003
    Publication date: September 18, 2003
    Inventors: Masaru Moriwaki, Masaaki Niwa, Masafumi Kubota
  • Publication number: 20030155621
    Abstract: After an insulating film serving as a gate insulating film is formed on a semiconductor substrate, a titanium nitride film is deposited by chemical vapor deposition on the insulating film. Then, a tungsten film is deposited by sputtering on the titanium nitride film. Subsequently, a multilayer film composed of the tungsten film and the titanium nitride film is patterned to form a gate electrode composed of the multilayer film.
    Type: Application
    Filed: February 24, 2003
    Publication date: August 21, 2003
    Applicant: MATSUSHITA ELECTRONICS CORPORATION
    Inventors: Masaru Moriwaki, Takayuki Yamada, Kazuhiko Yamamoto
  • Patent number: 6563178
    Abstract: A first gate electrode for an n-channel MOSFET includes first and second metal films and a low-resistivity metal film. The first metal film has been deposited on a first gate insulating film and is made of a first metal having a work function located closer to the conduction band of silicon with reference to an intermediate level of silicon bandgap. The second metal film has been deposited on the first metal film and is made of a second metal having a work function located closer to the valence band of silicon with reference to the intermediate level of silicon bandgap. The low-resistivity metal film has been deposited on the second metal film. A second gate electrode for a p-channel MOSFET includes: the second metal film, which has been deposited on a second gate insulating film and is made of the second metal; and the low-resistivity metal film deposited on the second metal film.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: May 13, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaru Moriwaki, Takayuki Yamada
  • Publication number: 20030087494
    Abstract: A metal target, at least the surface region of which has been oxidized, is prepared in a chamber. Then, a sputtering process is performed on the metal target with an inert gas ambient created in the chamber, thereby depositing a first metal oxide film as a lower part of a gate insulating film over a semiconductor substrate. Next, a reactive sputtering process is performed on the metal target with a mixed gas ambient, containing the inert gas and an oxygen gas, created in the chamber, thereby depositing a second metal oxide film as a middle or upper part of the gate insulating film over the first metal oxide film.
    Type: Application
    Filed: December 20, 2002
    Publication date: May 8, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaru Moriwaki, Takayuki Yamada
  • Patent number: 6548389
    Abstract: After an insulating film serving as a gate insulating film is formed on a semiconductor substrate, a titanium nitride film is deposited by chemical vapor deposition on the insulating film. Then, a tungsten film is deposited by sputtering on the titanium nitride film. Subsequently, a multilayer film composed of the tungsten film and the titanium nitride film is patterned to form a gate electrode composed of the multilayer film.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: April 15, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaru Moriwaki, Takayuki Yamada, Kazuhiko Yamamoto
  • Patent number: 6514883
    Abstract: A metal target, at least the surface region of which has been oxidized, is prepared in a chamber. Then, a sputtering process is performed on the metal target with an inert gas ambient created in the chamber, thereby depositing a first metal oxide film as a lower part of a gate insulating film over a semiconductor substrate. Next, a reactive sputtering process is performed on the metal target with a mixed gas ambient, containing the inert gas and an oxygen gas, created in the chamber, thereby depositing a second metal oxide film as a middle or upper part of the gate insulating film over the first metal oxide film.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: February 4, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaru Moriwaki, Takayuki Yamada
  • Patent number: 6509225
    Abstract: A semiconductor device comprises a first MOSFET and a second MOSFET. The first MOSFET includes a first gate insulating film formed on a semiconductor substrate and having a relatively large thickness and a first gate electrode composed of a polysilicon film formed on the first gate insulating film. The second MOSFET includes a second gate insulating film formed on the semiconductor substrate and having a relatively small thickness and a second gate electrode composed of a metal film made of a refractory metal or a compound of a refractory metal and formed on the second gate insulating film.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: January 21, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaru Moriwaki, Takayuki Yamada
  • Patent number: 6462386
    Abstract: A semiconductor device comprises a first MOSFET and a second MOSFET. The first MOSFET includes a first gate insulating film formed on a semiconductor substrate and having a relatively large thickness and a first gate electrode composed of a polysilicon film formed on the first gate insulating film. The second MOSFET includes a second gate insulating film formed on the semiconductor substrate and having a relatively small thickness and a second gate electrode composed of a metal film made of a refractory metal or a compound of a refractory metal and formed on the second gate insulating film.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: October 8, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaru Moriwaki, Takayuki Yamada
  • Patent number: 6445047
    Abstract: A semiconductor device includes: a first-surface-channel-type MOSFET having a first threshold voltage; and a second-surface-channel-type MOSFET with a second threshold voltage having an absolute value greater than an absolute value of said first threshold voltage. The first-surface-channel-type MOSFET includes: a first gate insulating film formed on a semiconductor substrate; and a first gate electrode, which has been formed out of a poly-silicon film over the first gate insulating film. The second-surface-channel-type MOSFET includes: a second gate insulating film formed on the semiconductor substrate; and a second gate electrode, which has been formed out of a refractory metal film over the second gate insulating film. The refractory metal film is made of a refractory metal or a compound thereof.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: September 3, 2002
    Assignee: Matsushita Electronics Corporation
    Inventors: Takayuki Yamada, Masaru Moriwaki
  • Patent number: 6432803
    Abstract: After an insulating film, serving as a gate insulating film, is formed on a semiconductor layer formed on a substrate, a target made of tungsten is sputtered in an ambient of a gas mixture of an argon gas and a nitrogen gas. In the sputtering process, a surface region of the insulating film serving as the gate insulating film is nitrided, while a crystal mixture film composed of a mixture of a tungsten crystal and a tungsten nitride crystal is deposited on the insulating film. The crystal mixture film serves to compose at least a part of a gate electrode.
    Type: Grant
    Filed: December 2, 1999
    Date of Patent: August 13, 2002
    Assignee: Matsushita Electric Industrial Co., Inc.
    Inventors: Takayuki Yamada, Masaru Moriwaki
  • Publication number: 20020040999
    Abstract: A metal target, at least the surface region of which has been oxidized, is prepared in a chamber. Then, a sputtering process is performed on the metal target with an inert gas ambient created in the chamber, thereby depositing a first metal oxide film as a lower part of a gate insulating film over a semiconductor substrate. Next, a reactive sputtering process is performed on the metal target with a mixed gas ambient, containing the inert gas and an oxygen gas, created in the chamber, thereby depositing a second metal oxide film as a middle or upper part of the gate insulating film over the first metal oxide film.
    Type: Application
    Filed: September 20, 2001
    Publication date: April 11, 2002
    Inventors: Masaru Moriwaki, Takayuki Yamada
  • Publication number: 20020004270
    Abstract: A semiconductor device comprises a first MOSFET and a second MOSFET. The first MOSFET includes a first gate insulating film formed on a semiconductor substrate and having a relatively large thickness and a first gate electrode composed of a polysilicon film formed on the first gate insulating film The second MOSFET includes a second gate insulating film formed on the semiconductor substrate and having a relatively small thickness and a second gate electrode composed of a metal film made of a refractory metal or a compound of a refractory metal and formed on the second gate insulating film.
    Type: Application
    Filed: August 20, 2001
    Publication date: January 10, 2002
    Inventors: Masaru Moriwaki, Takayuki Yamada
  • Patent number: 6333223
    Abstract: A semiconductor device comprises a first MOSFET and a second MOSFET. The first MOSFET includes a first gate insulating film formed on a semiconductor substrate and having a relatively large thickness and a first gate electrode composed of a polysilicon film formed on the first gate insulating film. The second MOSFET includes a second gate insulating film formed on the semiconductor substrate and having a relatively small thickness and a second gate electrode composed of a metal film made of a refractory metal or a compound of a refractory metal and formed on the second gate insulating film.
    Type: Grant
    Filed: November 4, 1999
    Date of Patent: December 25, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaru Moriwaki, Takayuki Yamada
  • Publication number: 20010027005
    Abstract: A first gate electrode for an n-channel MOSFET includes first and second metal films and a low-resistivity metal film. The first metal film has been deposited on a first gate insulating film and is made of a first metal having a work function located closer to the conduction band of silicon with reference to an intermediate level of silicon bandgap. The second metal film has been deposited on the first metal film and is made of a second metal having a work function located closer to the valence band of silicon with reference to the intermediate level of silicon bandgap. The low-resistivity metal film has been deposited on the second metal film. A second gate electrode for a p-channel MOSFET includes: the second metal film, which has been deposited on a second gate insulating film and is made of the second metal; and the low-resistivity metal film deposited on the second metal film.
    Type: Application
    Filed: March 28, 2001
    Publication date: October 4, 2001
    Inventors: Masaru Moriwaki, Takayuki Yamada