Patents by Inventor Masaru Sakamoto

Masaru Sakamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5476799
    Abstract: A process for preparing a semiconductor device forms an insulating thin film capable of tunnelling phenomenon of carriers on a semiconductor substrate and forms a polycrystalline semiconductor layer on the thin film. An impurity is injected to the surface of the polycrystalline semiconductor layer, the diffusion coefficient to the thin film being smaller than that to the polycrystalline semiconductor layer. The process effects a first heat treatment at a temperature of 800.degree. C. or less to diffuse the impurity injected into the polycrystalline semiconductor layer in the polycrystalline semiconductor layer, thereby forming a uniform or substantially uniform impurity containing region at least at the thin film side of the polycrystalline semiconductor layer, and, effects a second heat treatment the temperature of which is 950.degree. C.
    Type: Grant
    Filed: May 27, 1993
    Date of Patent: December 19, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masaru Sakamoto, Masakazu Morishita, Shigeru Nishimura
  • Patent number: 5466631
    Abstract: A method for producing a semiconductor article comprises the steps of preparing a first substrate having a non-porous semiconductor layer on a porous semiconductor region, forming unevenness on the surface at the side of said semiconductor layer of said first substrate; bonding the surface of said first substrate having said unevenness formed thereon to the surface of said second substrate so as to be in contact with each other, and removing said porous semiconductor under the state that said semiconductor layer is bonded to said second substrate to thereby transfer said semiconductor layer from said first substrate onto said second substrate.
    Type: Grant
    Filed: February 23, 1995
    Date of Patent: November 14, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takeshi Ichikawa, Takao Yonehara, Masaru Sakamoto, Yasuhiro Naruse, Jun Nakayama, Kenji Yamagata, Kiyofumi Sakaguchi
  • Patent number: 5302855
    Abstract: A semiconductor device and a manufacture method for the semiconductor device, the method comprising the steps of forming an insulating film on the surface of a semiconductor substrate, forming contact holes in the insulating layer to expose the surface of the semiconductor substrate, selectively depositing a metal film, which contains aluminum as a main ingredient, on the exposed surface to form an electrodes in each the contact hole, and forming a wiring made of a second metal, which contains as a principal ingredient an element other than aluminum, on both the insulating layer and the electrode. Preferably, the upper surface of each electrode is substantially flat in a connecting portion between the electrode and the wiring, and a relationship of A.gtoreq.C is established where A is a length of one side of the electrode's upper surface and C is a width of the wiring in the connecting portion therebetween.
    Type: Grant
    Filed: September 10, 1991
    Date of Patent: April 12, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shigeyuki Matsumoto, Masaru Sakamoto, Yoshio Nakamura
  • Patent number: 5242858
    Abstract: A process for preparing a semiconductor device comprises exposing at least a part of the main surface of a semiconductor substrate, forming a layer comprising the same main component as the above substrate, forming a flattening agent layer on the surface of said layer, removing the above layer and the flattening agent layer at the same time and injecting an impurity after said removing step.
    Type: Grant
    Filed: September 5, 1991
    Date of Patent: September 7, 1993
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masaru Sakamoto, Masakazu Morishita, Shigeru Nishimura
  • Patent number: 4656455
    Abstract: A process for fabricating a humidity-sensing element comprises forming an electrode layer on at least one side of a ceramic substrate, applying to the electrode layer a humidity-sensitive paste containing a zirconia, zirconia-yttria, or yttria ceramic as a humidity-sensitive material, drying the coat, and then firing it at a temperature of 750.degree. to 870.degree. C. to form a humidity-sensing part.
    Type: Grant
    Filed: July 16, 1985
    Date of Patent: April 7, 1987
    Assignees: Toyama Prefecture, Nippon Mining Co., Ltd.
    Inventors: Katsumi Tanino, Norihiro Kiuchi, Chikara Tominaga, Eiji Itoh, Kiyoshi Ogino, Masataka Yahagi, Masaru Sakamoto