Patents by Inventor Masaru Takizawa

Masaru Takizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210111538
    Abstract: Included is a semiconductor multilayer film in which a non-doped InAlN layer and a GaN layer formed on said InAlN layer and containing a dopant are stacked a plurality of times.
    Type: Application
    Filed: March 13, 2018
    Publication date: April 15, 2021
    Applicants: MEIJO UNIVERSITY, STANLEY ELECTRIC CO., LTD.
    Inventors: Tetsuya TAKEUCHI, Isamu AKASAKI, Kazuki KIYOHARA, Masaru TAKIZAWA, Ji-Hao LIANG
  • Publication number: 20200194560
    Abstract: A semiconductor device includes a semiconductor layer including a Ga2O3-based single crystal, and an electrode that is in contact with a surface of the semiconductor layer. The semiconductor layer is in Schottky-contact with the electrode and has an electron carrier concentration based on reverse withstand voltage and electric field-breakdown strength of the Ga2O3-based single crystal.
    Type: Application
    Filed: February 26, 2020
    Publication date: June 18, 2020
    Inventors: Masaru TAKIZAWA, Akito KURAMATA
  • Patent number: 10600874
    Abstract: A semiconductor device includes a semiconductor layer including a Ga2O3-based single crystal, and an electrode that is in contact with a surface of the semiconductor layer. The semiconductor layer is in Schottky-contact with the electrode and has an electron carrier concentration based on reverse withstand voltage and electric field-breakdown strength of the Ga2O3-based single crystal.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: March 24, 2020
    Assignee: TAMURA CORPORATION
    Inventors: Masaru Takizawa, Akito Kuramata
  • Patent number: 10196756
    Abstract: A ?-Ga2O3-based single-crystal substrate includes a ?-Ga2O3-based single crystal, and a principal surface being a plane parallel to a b-axis of the ?-Ga2O3-based single crystal. A maximum value of ?? on an arbitrary straight line on the principal surface that passes through a center of the principal surface is not more than 0.7264. The ?? is a difference between a maximum value and a minimum value of values obtained by subtracting ?a from ?s at each of measurement positions, where ?s represents an angle defined by an X-ray incident direction and the principal surface at a peak position of an X-ray rocking curve on the straight line and ?a represents an angle on an approximated straight line obtained by using least-squares method to linearly approximate a curve representing a relationship between the ?s and the measurement positions thereof.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: February 5, 2019
    Assignees: TAMURA CORPORATION, KOHA CO., LTD.
    Inventors: Shinya Watanabe, Kimiyoshi Koshi, Yu Yamaoka, Kazuyuki Iizuka, Masaru Takizawa, Takekazu Masui
  • Patent number: 9972972
    Abstract: A vertical cavity light emitting device includes: a first multilayer film reflector; a semiconductor structure layer that is formed on the first multilayer film reflector and includes a semiconductor layer of a first conductivity type, an active layer, and a semiconductor layer of a second conductivity type opposite to the first conductivity type; an insulating current confinement layer formed on the semiconductor layer of the second conductivity type; a through opening formed in the current confinement layer; a transparent electrode for covering the through opening and the current confinement layer, the transparent electrode being in contact with the semiconductor layer of the second conductivity type through the through opening; a second multilayer film reflector formed on the transparent electrode; and a mixed composition layer formed to be in contact with an edge of the through opening and in which the current confinement layer and the transparent electrode are mixed.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: May 15, 2018
    Assignee: STANLEY ELECTRIC CO., LTD.
    Inventors: Komei Tazawa, Ji-Hao Liang, Seiichiro Kobayashi, Masaru Takizawa, Keisuke Nakata
  • Patent number: 9915010
    Abstract: Provided is one embodiment which is a method for growing a ?-Ga2O3-based single crystal which uses the EFG method and includes raising a Ga2O3 melt inside a crucible up to a die opening via a die slit such that a seed crystal is contacted with the Ga2O3-based melt in the opening of the die with a horizontal position of the seed crystal shifted in a width direction (W) from a center in the width direction (W) of the die, and pulling up the seed crystal contacting the Ga2O3-based melt so as to grown a ?-Ga2O3 single crystal.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: March 13, 2018
    Assignees: TAMURA CORPORATION, KOHA CO., LTD.
    Inventors: Kimiyoshi Koshi, Takekazu Masui, Masaru Takizawa
  • Publication number: 20170162655
    Abstract: A semiconductor device includes a semiconductor layer including a Ga2O3-based single crystal, and an electrode that is in contact with a surface of the semiconductor layer. The semiconductor layer is in Schottky-contact with the electrode and has an electron carrier concentration based on reverse withstand voltage and electric field-breakdown strength of the Ga2O3-based single crystal.
    Type: Application
    Filed: February 17, 2017
    Publication date: June 8, 2017
    Inventors: Masaru TAKIZAWA, Akito KURAMATA
  • Publication number: 20170152610
    Abstract: A ?-Ga2O3-based single-crystal substrate includes a ?-Ga2O3-based single crystal, and a principal surface being a plane parallel to a b-axis of the ?-Ga2O3-based single crystal. A maximum value of ?? on an arbitrary straight line on the principal surface that passes through a center of the principal surface is not more than 0.7264. The ?? is a difference between a maximum value and a minimum value of values obtained by subtracting ?a from ?s at each of measurement positions, where ?s represents an angle defined by an X-ray incident direction and the principal surface at a peak position of an X-ray rocking curve on the straight line and ?a represents an angle on an approximated straight line obtained by using least-squares method to linearly approximate a curve representing a relationship between the ?s and the measurement positions thereof.
    Type: Application
    Filed: June 29, 2015
    Publication date: June 1, 2017
    Applicants: TAMURA CORPORATION, KOHA CO., LTD.
    Inventors: Shinya WATANABE, Kimiyoshi KOSHI, Yu YAMAOKA, Kazuyuki IIZUKA, Masaru TAKIZAWA, Takekazu MASUI
  • Publication number: 20170149213
    Abstract: A vertical cavity light emitting device includes: a first multilayer film reflector; a semiconductor structure layer that is formed on the first multilayer film reflector and includes a semiconductor layer of a first conductivity type, an active layer, and a semiconductor layer of a second conductivity type opposite to the first conductivity type; an insulating current confinement layer formed on the semiconductor layer of the second conductivity type; a through opening formed in the current confinement layer; a transparent electrode for covering the through opening and the current confinement layer, the transparent electrode being in contact with the semiconductor layer of the second conductivity type through the through opening; a second multilayer film reflector formed on the transparent electrode; and a mixed composition layer formed to be in contact with an edge of the through opening and in which the current confinement layer and the transparent electrode are mixed.
    Type: Application
    Filed: November 9, 2016
    Publication date: May 25, 2017
    Applicant: STANLEY ELECTRIC CO., LTD.
    Inventors: Komei TAZAWA, Ji-Hao LIANG, Seiichiro KOBAYASHI, Masaru TAKIZAWA, Keisuke NAKATA
  • Patent number: 9595586
    Abstract: A semiconductor device, includes an n-type semiconductor layer provided with a first semiconductor layer with a low electron carrier concentration and a second semiconductor layer with a high electron carrier concentration, an electrode that is in Schottky-contact with a surface of the first semiconductor layer, and an ohmic electrode formed on a surface of the second semiconductor layer. The n-type semiconductor layer is formed of a Ga2O3-based single crystal. The first semiconductor layer has an electron carrier concentration Nd based on reverse withstand voltage VRM and electric field-breakdown strength Em of the Ga2O3-based single crystal.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: March 14, 2017
    Assignee: TAMURA CORPORATION
    Inventors: Masaru Takizawa, Akito Kuramata
  • Publication number: 20160322467
    Abstract: A semiconductor device, includes an n-type semiconductor layer provided with a first semiconductor layer with a low electron carrier concentration and a second semiconductor layer with a high electron carrier concentration, an electrode that is in Schottky-contact with a surface of the first semiconductor layer, and an ohmic electrode formed on a surface of the second semiconductor layer. The n-type semiconductor layer is formed of a Ga2O3-based single crystal. The first semiconductor layer has an electron carrier concentration Nd based on reverse withstand voltage VRM and electric field-breakdown strength Em of the Ga2O3-based single crystal.
    Type: Application
    Filed: July 12, 2016
    Publication date: November 3, 2016
    Inventors: Masaru TAKIZAWA, Akito KURAMATA
  • Patent number: 9431489
    Abstract: A ?-Ga2O3-based single crystal substrate includes an average dislocation density of less than 7.31×104 cm?2. The average dislocation density may be not more than 6.14×104 cm?2. The substrate may further include a main surface including a plane orientation of (?201), (101) or (001). The substrate may be free from any twinned crystal.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: August 30, 2016
    Assignees: TAMURA CORPORATION, KOHA CO., LTD.
    Inventors: Kimiyoshi Koshi, Shinya Watanabe, Masaru Takizawa, Yu Yamaoka, Makoto Watanabe, Takekazu Masui
  • Patent number: 9412882
    Abstract: A Schottky barrier diode includes an n-type semiconductor layer including a Ga2O3-based compound semiconductor with n-type conductivity, and an electrode layer that is in Schottky-contact with the n-type semiconductor layer. A first semiconductor layer in Schottky-contact with the electrode layer and a second semiconductor layer having an electron carrier concentration higher than the first semiconductor layer are formed in the n-type semiconductor layer. The second semiconductor layer includes a ?-Ga2O3 substrate including a main plane rotated by an angle not less than 50° and not more than 90° with respect to a (100) plane thereof.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: August 9, 2016
    Assignee: TAMURA CORPORATION
    Inventors: Masaru Takizawa, Akito Kuramata
  • Patent number: 9349915
    Abstract: A ?-Ga2O3-based single crystal substrate includes a ?-Ga2O3-based single crystal. The ?-Ga2O3-based single crystal includes a full width at half maximum of an x-ray rocking curve of less than 75 seconds.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: May 24, 2016
    Assignees: TAMURA CORPORATION, KOHA CO., LTD.
    Inventors: Kimiyoshi Koshi, Shinya Watanabe, Masaru Takizawa, Yu Yamaoka, Daiki Wakimoto, Makoto Watanabe
  • Publication number: 20160115621
    Abstract: Provided is one embodiment which is a method for growing a ?-Ga2O3-based single crystal which uses the EFG method and includes raising a Ga2O3 melt inside a crucible up to a die opening via a die slit such that a seed crystal is contacted with the Ga2O3-based melt in the opening of the die with a horizontal position of the seed crystal shifted in a width direction (W) from a center in the width direction (W) of the die, and pulling up the seed crystal contacting the Ga2O3-based melt so as to grown a ?-Ga2O3 single crystal.
    Type: Application
    Filed: May 2, 2014
    Publication date: April 28, 2016
    Applicants: TAMURA CORPORATION, KOHA CO., LTD.
    Inventors: Kimiyoshi KOSHI, Takekazu MASUI, Masaru TAKIZAWA
  • Publication number: 20160043238
    Abstract: A Schottky barrier diode includes an n-type semiconductor layer including a Ga2O3-based compound semiconductor with n-type conductivity, and an electrode layer that is in Schottky-contact with the n-type semiconductor layer. A first semiconductor layer in Schottky-contact with the electrode layer and a second semiconductor layer having an electron carrier concentration higher than the first semiconductor layer are formed in the n-type semiconductor layer. The second semiconductor layer includes a ?-Ga2O3 substrate including a main plane rotated by an angle not less than 50° and not more than 90° with respect to a (100) plane thereof.
    Type: Application
    Filed: October 20, 2015
    Publication date: February 11, 2016
    Inventors: MASARU TAKIZAWA, Akito KURAMATA
  • Publication number: 20150380501
    Abstract: A ?-Ga2O3-based single crystal substrate includes an average dislocation density of less than 7.31×104 cm?2. The average dislocation density may be not more than 6.14×104 cm?2. The substrate may further include a main surface including a plane orientation of (?201), (101) or (001). The substrate may be free from any twinned crystal.
    Type: Application
    Filed: February 27, 2015
    Publication date: December 31, 2015
    Inventors: Kimiyoshi KOSHI, Shinya Watanabe, Masaru Takizawa, Yu Yamaoka, Makoto Watanabe, Takekazu Masui
  • Patent number: 9171967
    Abstract: A Schottky barrier diode is provided with: an n-type semiconductor layer including Ga2O3-based compound semiconductors with n-type conductivity; and a Schottky electrode layer which is in Schottky-contact with the n-type semiconductor layer. An n? -type semiconductor layer, which has a relatively low electron carrier concentration and is brought into Schottky-contact with the Schottky electrode layer, and an n+ semiconductor layer, which has a higher electron carrier concentration than the n semiconductor layer, are formed in the n-type semiconductor layer.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: October 27, 2015
    Assignee: TAMURA CORPORATION
    Inventors: Masaru Takizawa, Akito Kuramata
  • Publication number: 20150249185
    Abstract: A ?-Ga2O3-based single crystal substrate includes a ?-Ga2O3-based single crystal. The ?-Ga2O3-based single crystal includes a full width at half maximum of an x-ray rocking curve of less than 75 seconds.
    Type: Application
    Filed: February 26, 2015
    Publication date: September 3, 2015
    Inventors: Kimiyoshi KOSHI, Shinya Watanabe, Masaru Takizawa, Yu Yamaoka, Daiki Wakimoto, Makoto Watanabe
  • Publication number: 20140332823
    Abstract: A Schottky barrier diode is provided with: an n-type semiconductor layer including Ga2O3-based compound semiconductors with n-type conductivity; and a Schottky electrode layer which is in Schottky-contact with the n-type semiconductor layer. An n?-type semiconductor layer, which has a relatively low electron carrier concentration and is brought into Schottky-contact with the Schottky electrode layer, and an n+ semiconductor layer, which has a higher electron carrier concentration than the n semiconductor layer, are formed in the n-type semiconductor layer.
    Type: Application
    Filed: November 8, 2012
    Publication date: November 13, 2014
    Inventors: Masaru Takizawa, Akito Kuramata