Abstract: The device has an LCD panel 6, a digital circuit 1 and an analog circuit 2 which generate display signals to be supplied to the LCD panel 6, and has functions of normal mode and stand-by mode in a status where electric power is supplied from a power source 5. In the normal mode, a multivalued display signal which can represent gradation levels is generated and supplied to the LCD panel 6, while in the stand-by mode, a binary display signal which does not represent gradation levels is generated and supplied to the LCD panel 6.

Abstract: A video signal interpolation can adapt an image of input video signal to voluntary aspect ratios widely. The invention also allows a display device to uniformly line-sequential scan and uses at least two line-memories (LM1, LM2) which are applied with an input digital video signal and controls writing and reading for these line-memories to generate a video signal subjected to vertical interpolation from a reading output of the line-memories. In the control, any one of the line-memories are circularly selected, and a sample sequence of the input digital video signal is sequentially written into the selected line-memory at its sample rate while sequentially reading out samples of the written sequence at a constant rate which is higher than the sample rate and which is according to a desired ratio of interpolation (vertical expansion ratio), wherein, when one of the line-memories is in writing operation, the other one of the line-memories is repeatedly read out.

Abstract: The device has an LCD panel 6, a digital circuit 1 and an analog circuit 2 which generate display signals to be supplied to the LCD panel 6, and has functions of normal mode and stand-by mode in a status where electric power is supplied from a power source 5. In the normal mode, a multivalued display signal which can represent gradation levels is generated and supplied to the LCD panel 6, while in the stand-by mode, a binary display signal which does not represent gradation levels is generated and supplied to the LCD panel 6.

Abstract: A halogenating agent of the formula (1) and a method of halogenating hydroxyl group wherein R1 and R2 are the same or different and are each ethyl, propyl, isopropyl, butyl, isobutyl or allyl; X is chlorine atom or bromine atom; and Y is chlorine ion, bromine ion, dichlorophosphate ion, dibromophosphate ion, chlorosulfonate ion, bromosulfonate ion, chlorooxalate ion or bromooxalate ion.

Abstract: A halogenating agent of the formula (1) and a method of halogenating hydroxyl group wherein R1 and R2 are the same or different and are each ethyl, propyl, isopropyl, butyl, isobutyl or allyl; X is chlorine atom or bromine atom; and Y is chlorine ion, bromine ion, dichlorophosphate ion, dibromophosphate ion, chlorosulfonate ion, bromosulfonate ion, chlorooxalate ion or bromooxalate ion.

Abstract: In a common potential stabilizing active matrix liquid crystal display device, the common potential is detected via a common potential detecting terminal provided at the perimeter of the common electrode, the detected potential is compared with a reference potential and the difference is amplified by an amplifier and is negatively fed back to a common potential supply terminal provided at the perimeter of the common electrode.

Abstract: A gray-scale level signal V.sub.a, which is applied to each pixel on a selected gate bus, is added, with its polarity inverted every frame period, to the first and second source bias voltages V.sub.S+ and V.sub.S- which are generated alternately every frame period, and the resulting voltages are each provided as a source voltage V.sub.S to respective source buses. On the other hand, a gate voltage V.sub.G, which is applied to each gate bus, includes a period of a high-level gate pulse which turns ON a thin film transistor during about one horizontal scanning period H in each frame period, a gate bias period during which either one of first and second gate bias voltages, which alternate every frame period, immediately precedes the rise of the gate pulse, and a low-level period except these periods. The gate voltage is applied to the respective gate buses so that the gate pulses provided thereto are sequentially displaced one horizontal scanning period apart.

Abstract: The present invention provides a cephem compound having a high antimicrobial activity against various pathogenic bacteria.The cephem compound of the invention is represented by the formula ##STR1## wherein Q represents CH or N, R.sup.1 represents a carboxylate or the like, R.sup.2 represents a hydrogen atom, and R represents ##STR2## wherein R.sup.3 represents a group --(CH.sub.2).sub.m --Y (wherein m is an integer of 1 to 5, and Y represents a quaternary ammonium group) or the like, n is an integer of 0 to 4, B.sup.- represents an anion, f is 0 or 1 when R.sup.1 represents a carboxylate, and 2 when R.sup.1 represents a carboxyl group, and the ring C represents a 5-membered heterocyclic group of not more than 4 nitrogen atoms, which may be substituted by a lower alkyl group.

Abstract: The object of the present invention is to provide a cephem compound having high activity against various pathogenic microorganisms. The cephem compound of this invention is represented by the general formula ##STR1## wherein Q represents CH or N; R.sup.1 represents a carboxylate etc; and R represents ##STR2## or the group ##STR3## where R.sup.2 represents a lower alkyl group etc, n represents an integer of 0 or 1 through 3, B.sup.- represents an anion, f is equal to 0 when R.sup.1 represents a carboxylate and 1 where R.sup.1 represents a carboxyl group, and the ring C represents a 5-membered heterocyclic group of not more than 4 nitrogen atoms, which may be substituted by lower alkyls.

Abstract: In the case of erasing a display on an active matrix type liquid crystal display which has a source bus drive circuit (16) and a gate bus drive circuit (17), pixel signals for turning OFF pixels of one row are applied to the source bus drive circuit, and at the same time, a clear signal (CL) is provided to the gate bus drive circuit (17), from which a voltage for turning ON transistors (13) provided in association with the respective pixels is applied to gate buses (15.sub.l through 15.sub.m) all at once. A power holding circuit (22) is provided for holding power of an operating power supply (V.sub.1) for a predetermined period of time after the power supply of the display is turned OFF, and a voltage drop detector (24) is provided for detecting the turning OFF of said power supply, and its detection signal is used to produce the clear signal (CL), which is provided to the gate bus drive circuit (17).

Abstract: An input analog image signal is sampled by first and second A/D converters, using first and second sampling clocks of the same period, to obtain digital gradation data. In the case of a double definition display mode, the first and second sampling clocks are made 180.degree. out of phase with each other and the output of the first A/D converter is delayed for one-half period, by which its timing is brought into agreement with that of the output of the second A/D converter, thus obtaining a pair of digital gradation data. In the case of a standard definition display mode, the first and second sampling clocks of the same phase are used to obtain the outputs of the first and second A/D converters as a pair of digital gradation data. The pair of digital gradation data Da and Db is converted by a signal processing part into a pair of analog gradation data Aa and Ab, which is subjected to a serial-to-parallel conversion by a source driver to be supplied in parallel to data lines.

Abstract: One end portion of each pixel electrode is extended under a gate insulating film underlying the neighboring gate bus and defines an additional capacitance region. The extended portion of the pixel electrode is divided into a plurality of comb-tooth-like electrodes, each defining divided additional capacitors. One of the comb-tooth-like electrodes is separated by a gap from the pixel electrode, and first and second electrodes for laser welding use are formed on the comb-tooth-like electrode and the pixel electrode facing each other across the gap. The first and second electrodes form series-connected first and second capacitances for laser welding use between them and a third electrode for laser welding use formed above them with a gate insulating film interposed therebetween.

Abstract: A planar display device is disclosed, which comprises a plurality of display elements in rows and columns, row drive lines each commonly connected to two adjacent rows of display elements and column drive lines are provided in pairs each for each column of display elements, every other one of the display elements in a column being connected to one of the pair of column drive lines, and the other display elements in the column being connected to the other column drive lines in the pair. Each of the display elements is selectively activated by the row and column drive lines connected thereto.

Abstract: An amorphous silicon photoreceptor for electrophotography having a surface protective layer provided on top of an amorphous silicon photoreceptive layer and has a forbidden band width arranged to progressively increase as it goes from the surface of the photoreceptive layer toward the surface of the surface protective layer. A p type amorphous silicon layer may be provided between the amorphous silicon photoreceptive layer and the surface protective layer.

Abstract: In a multi-gradation display method and apparatus by which a display signal formed by a picture element signal of any one of the levels of N gradations (where N is an integer equal to or greater than 3) is displayed on a display panel in which each picture element produces a two-gradation display, one frame is composed of (N-1) fields, and accordingly each picture element is supplied with a binary signal (N-1) times for each frame, and the binary signal is given one of its values by a number of times corresponding to the level value of the input picture element signal and the other value by the remaining number of times.

Abstract: In a liquid crystal display device, display electrodes are arranged in a matrix form, gate and source buses are provided for each row and column of the display electrodes, and a pixel driving composite transistor is connected between each display electrode and the gate and source buses for driving the display electrode. Source-drain electrode pairs opposite in the direction of arrangement, which are equal in number, are provided for each transistor, and a common semiconductor layer and a common gate electrode are provided for all the source and drain electrodes to form an even number of thin film transistors connected in parallel to one another, thereby constituting the composite transistor for driving a pixel.

Abstract: A transmitting type display device is disclosed, which comprises a transmitting type display panel to provide a display on the front surface, a light source for producing light illuminating the back surface of the transmitting type display and a brightness controller for controlling the intensity of light from the light source. The device comprises an ambient light detector disposed near the transmitting type display panel for detecting the intensity of ambient light incident on the display surface of the transmitting type display panel, and the brightness controller for controlling the light source according to the detection output of the ambient light detector such that the intensity of light from the light source to the transmitting type display panel is increased with an increase of the detected light intensity.

Abstract: A substrate for an amorphous silicon photoreceptor prepared by first forming an amorphous silicon photoreceptive layer on an aluminum or aluminum alloy body by using a plasma CVD apparatus, and by arranging so that those crystal grains located in the surface of the substrate each has a diameter of 1 cm or smaller, to thereby make it possible to obtain a satisfactory image stably and repetitively.

Abstract: In a capacitance coupled type plasma CVD apparatus for depositing a thin film of reaction product of gas on a substrate by glow discharge at an elevated film-forming rate without lowering the function and ability of the formed film and to ensure the CVD operation to be carried out continuously or repetitively for an extended period of time, the electrode facing the substrate is provided as a net of a metal. The substrate is a cylindrical electrode, and the net-like electrode may be formed as a cylindrical net surrounding this cylindrical substrate, or as a pair of opposing flat sheets of net movably sandwiching rotating and movable plural cylindrical substrates therebetween.

Abstract: A photoreceptor of electrophotography having, on a substrate, an amorphous silicon (a-Si) layer formed by relying on plasma CVD technique, wherein the a-Si layer is formed in the presence of silane, diborane and nitrogen, and possibly phosphine as required. This a-Si layer may have a multiple layer structure comprising a thin a-Si layer formed in the presence of silane and diborane or nitrogen, and a principal a-Si layer formed in the presence of silane, diborane and nitrogen, and possibly phosphine as required, but in such instance the amount of phosphine which is added is less than three times that of diborane. Such photoreceptor has a good sensitivity to light rays, has long service life, and is not harmful to human body.