Patents by Inventor Masashi Naito
Masashi Naito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240339707Abstract: A battery having stacked batteries tied with holding members and mounted on a mounting object, wherein at least a battery bottom face is covered with an insulation member; the battery bottom face is opposite the mounting object's side; and the holding members have end members at both ends of the batteries in a stacking direction, and side members to surround, together with the end members, the batteries. Each of the end members has, on the mounting object's side, a first area having a main part, and a second area at first legs and protrudes towards the mounting object's side beyond the first area and the battery bottom face. The end member has a second area located on both sides of the first area. A spacer located between the plurality of stacked batteries protrudes towards the mounting object's side beyond the third area and the battery bottom.Type: ApplicationFiled: March 31, 2022Publication date: October 10, 2024Applicant: Vehicle Energy Japan Inc.Inventors: Masashi NAITO, Takayuki NAKAJIMA, Masayuki NAKAMOTO
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Publication number: 20240016364Abstract: The present technique relates to a surgery system, a surgery control device, a control method, and a program that allow a practitioner to easily operate a device during surgery. A surgery region is captured to acquire a surgery image that is an image of the surgery region, and a display image is output on the basis of the surgery image. With at least one of a surgical instrument and a hand reflected on the surgery image as an operation body, a predetermined instruction operation by the operation body is accepted on the basis of an image of the operation body in the surgery image. The present technique is applied to an endoscope system and a microscope surgery system.Type: ApplicationFiled: November 16, 2021Publication date: January 18, 2024Inventors: AKIHIKO NAKATANI, SHUNSUKE HAYASHI, MASASHI NAITO, YUKI OGAWA, KAZUTERU GENBA
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Publication number: 20220008161Abstract: The present disclosure relates to an information processing device, a presentation method, and a surgical system that make it possible to suppress the occurrence of medical accidents. A voice recognition unit counts, through voice recognition, the remaining number of surgical tools existing in the body of the patient and used for a surgical operation, an image recognition unit counts, through image recognition, the remaining number of the surgical tools existing in the body of the patient, and a presentation control unit presents a predetermined warning when a difference arises between a first remaining number counted through the voice recognition and a second remaining number counted through the image recognition. The present disclosure can be applied to surgical systems.Type: ApplicationFiled: November 25, 2019Publication date: January 13, 2022Inventors: KUNIHIKO AKIYOSHI, JUN OKAMURA, MASASHI NAITO, HIROSHIGE HAYAKAWA, AKIHIKO NAKATANI
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Patent number: 9007830Abstract: A nonvolatile memory apparatus includes a control unit, a main storage medium with an electrically reloadable nonvolatile memory adapted to be operable even when faulty memory cells exist therein, and a storage region storing registered address values of faulty regions of the main storage medium containing the faulty memory cells. Data which is stored in the electrically reloadable nonvolatile memory is divided into blocks, each block having a plurality of data to be administrated and which is assigned an access address by the control unit. An administrative information region is provided in each block. The control unit carries out access requests of the main storage medium and the administration of faulty regions and the number of occurrences of reloading of respective memory cells of the main storage medium.Type: GrantFiled: August 6, 2013Date of Patent: April 14, 2015Assignee: Solid State Storage Solutions, Inc.Inventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi Inoue, Shigemasa Shiota, Masashi Naito
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Publication number: 20140185380Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.Type: ApplicationFiled: August 6, 2013Publication date: July 3, 2014Applicant: Solid State Storage Solutions, Inc.Inventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi INOUE, Shigemasa SHIOTA, Masashi NAITO
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Patent number: 8503235Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.Type: GrantFiled: November 17, 2011Date of Patent: August 6, 2013Assignee: Solid State Storage Solutions, Inc.Inventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi Inoue, Shigemasa Shiota, Masashi Naito
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Patent number: 8467471Abstract: Disclosed herewith is a radio communication apparatus capable of selecting proper one of plural communication modes such as a MIMO communication system so as to obtain a higher communication rate within a range in which chain retransmission occurrence is prevented. The MIMO system deciding section of the transmitter unit decides a proper MIMO system with reference to the CQI value demultiplexed by a demultiplexer and the AMC table controlling section changes the MCS value step by step according to the transmission count and the result (success/failure) of the communication. Furthermore, the AMC table controlling section updates the mean rate in the measured rate table when the subject data is received successfully or when the transmission count reaches the maximum value.Type: GrantFiled: September 4, 2009Date of Patent: June 18, 2013Assignee: Hitachi Kokusai Electric, Inc.Inventors: Takashi Yano, Masashi Naito, Takehiko Kobayashi
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Patent number: 8451923Abstract: In a radio communication apparatus, a MIMO system deciding section of a transmitter unit decides an object MIMO communication system with reference to a CQI value and a measured rate table while an AMC table controlling section selects an object MCS value according to the decided MIMO communication system and CQI value. The AMC table controlling section changes the MCS value step by step according to a transmission count and a result (success/failure) of the communication. If the communication (receiving) is successful or if the transmission count reaches the maximum value, the controlling section updates the mean value of the measured rate table. At this time, based on a value estimated from the combination of the MIMO communication system, the encoding system, and the modulating system that are used currently, the controlling section changes the reference for selecting another combination that are not used currently.Type: GrantFiled: September 4, 2009Date of Patent: May 28, 2013Assignee: Hitachi Kokusai Electric Inc.Inventors: Takashi Yano, Masashi Naito, Takehiko Kobayashi
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Publication number: 20120213002Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.Type: ApplicationFiled: November 17, 2011Publication date: August 23, 2012Inventors: Kunihiro KATAYAMA, Takayuki TAMURA, Satoshi WATATANI, Kiyoshi INOUE, Shigemasa SHIOTA, Masashi NAITO
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Patent number: 8111778Abstract: To suppress the peak of the orthogonal multiplex transmission signal which is small in deterioration of the quality of the reception signal by generating the cancellation waveform in synchronization with the timing of the symbol of the transmission signal. There is provided a peak suppressing method that suppresses peaks of an orthogonally multiplexed signal whose orthogonality is ensured in given time units, the method comprising: a first step of detecting the peaks of the orthogonally multiplexed signal; a second step of generating a peak cancellation waveform based on the detected peaks of the orthogonally multiplexed signal; and a third step of removing the peak of the orthogonally multiplexed signal from the orthogonally multiplexed signal using the generated peak cancellation waveform. The second step comprises generating the peak cancellation waveform in said time units of the orthogonally multiplexed signal.Type: GrantFiled: August 27, 2008Date of Patent: February 7, 2012Assignee: Hitachi Kokusai Electric Inc.Inventors: Takashi Yano, Shigenori Hayase, Masashi Naito
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Patent number: 8064257Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.Type: GrantFiled: November 10, 2009Date of Patent: November 22, 2011Assignee: Solid State Storage Solutions, Inc.Inventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi Inoue, Shigemasa Shiota, Masashi Naito
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Patent number: 7953179Abstract: Communication equipment transmits signals of an OFDM system while effectively suppressing peaks in the transmission. OFDM signals are formed and peaks of the OFDM signals are suppressed. The OFDM signals of which the peaks are suppressed are converted into intermediate-frequency signals, and peaks of the intermediate-frequency signals are suppressed. Additionally, the intermediate-frequency signals of which the peaks are suppressed are synthesized and the signals having been synthesized are amplified. The peaks of the OFDM signals are suppressed with the synthesized value of the absolute values of the OFDM signals as an estimated peak value, and the peaks of the intermediate-frequency signals are suppressed with the absolute value of the result of synthesizing the intermediate-frequency signals as an estimated peak value.Type: GrantFiled: May 1, 2008Date of Patent: May 31, 2011Assignee: Hitachi Kokusai Electric Inc.Inventor: Masashi Naito
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Publication number: 20100177579Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.Type: ApplicationFiled: November 10, 2009Publication date: July 15, 2010Inventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi Inoue, Shigemasa Shiota, Masashi Naito
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Patent number: 7721165Abstract: A storage device, including: a non-volatile semiconductor memory which is electrically erasable; a system interface coupled with an external host system; and a controller reading data from the non-volatile semiconductor memory and transmitting data to the host system via the system interface in response to a read command received by the system interface from the host system; and wherein the controller starts reading (N+n)th sector data from the non-volatile semiconductor memory, while the controller transmits Nth sector data that has been read from the non-volatile semiconductor memory to the host system via the system interface, in response to the read command for successive sector data.Type: GrantFiled: November 15, 2006Date of Patent: May 18, 2010Assignee: Solid State Storage Solutions, Inc.Inventors: Takayuki Tamura, Shigemasa Shiota, Kunihiro Katayama, Masashi Naito
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Patent number: 7696761Abstract: The invention provides a spectrum analyzing method, a distortion detector and a distortion compensation amplifying device for performing time/frequency conversion processing at high speed, and reducing a convergent time of a compensation coefficient. The distortion detector for detecting distortion in a frequency area with respect to an input signal includes a time window processing section for multiplying the input signal by a time window; an averaging processing section for averaging an output of the time window processing section; an FFT processing section for converting an output of the averaging processing section from a time area to a frequency area; and a distortion extracting section for extracting a distortion component from an output of the FFT processing section.Type: GrantFiled: August 10, 2006Date of Patent: April 13, 2010Assignee: Hitachi Kokusai Electric, Inc.Inventors: Tetsuhiko Miyatani, Masashi Naito, Naoki Hongo, Takashi Okazaki
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Publication number: 20100080315Abstract: In a radio communication apparatus, a MIMO system deciding section of a transmitter unit decides an object MIMO communication system with reference to a CQI value and a measured rate table while an AMC table controlling section selects an object MCS value according to the decided MIMO communication system and CQI value. The AMC table controlling section changes the MCS value step by step according to a transmission count and a result (success/failure) of the communication. If the communication (receiving) is successful or if the transmission count reaches the maximum value, the controlling section updates the mean value of the measured rate table. At this time, based on a value estimated from the combination of the MIMO communication system, the encoding system, and the modulating system that are used currently, the controlling section changes the reference for selecting another combination that are not used currently.Type: ApplicationFiled: September 4, 2009Publication date: April 1, 2010Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Takashi YANO, Masashi NAITO, Takehiko KOBAYASHI
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Publication number: 20100080320Abstract: Disclosed herewith is a radio communication apparatus capable of selecting proper one of plural communication modes such as a MIMO communication system so as to obtain a higher communication rate within a range in which chain retransmission occurrence is prevented. The MIMO system deciding section of the transmitter unit decides a proper MIMO system with reference to the CQI value demultiplexed by a demultiplexer and the AMC table controlling section changes the MCS value step by step according to the transmission count and the result (success/failure) of the communication. Furthermore, the AMC table controlling section updates the mean rate in the measured rate table when the subject data is received successfully or when the transmission count reaches the maximum value.Type: ApplicationFiled: September 4, 2009Publication date: April 1, 2010Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Takashi YANO, Masashi NAITO, Takehiko KOBAYASHI
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Patent number: 7616485Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.Type: GrantFiled: October 31, 2007Date of Patent: November 10, 2009Assignee: Solid State Storage Solutions LLCInventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi Inoue, Shigemasa Shiota, Masashi Naito
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Patent number: 7529313Abstract: An apparatus includes: an affine transformer that subjects input complex IF signals I(t) and Q(t) to affine transformation according to affine transformation coefficients, and outputs compensated signals a(t) and b(t); a quadrature modulator that applies quadrature modulation on a local oscillation signal according to the compensated signals, and outputs a modulated signal (RF transmission signal); a quadrature wave detector that removes a carrier component from the modulated signal and outputs complex feedback signals I?(t) and Q?(t); and a control portion that extracts linear distortions remaining in the complex feedback signals I?(t) and Q?(t) as plural distortion coefficients (DC offsets of the I-phase and the Q-phase, an IQ gain ratio, and a deviation in orthogonality), and updates the current affine transformation coefficients in accordance with updating equations including the distortion coefficients to set updated affine transformation coefficients again in the affine transformation portion.Type: GrantFiled: September 9, 2005Date of Patent: May 5, 2009Assignee: Hitachi Kokusai Electric Inc.Inventors: Masashi Naito, Yasuhiro Takeuchi, Takashi Okada
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Patent number: RE45857Abstract: A storage device, including: a non-volatile semiconductor memory which is electrically erasable; a system interface coupled with an external host system; and a controller reading data from the non-volatile semiconductor memory and transmitting data to the host system via the system interface in response to a read command received by the system interface from the host system; and wherein the controller starts reading (N+n)th sector data from the non-volatile semiconductor memory, while the controller transmits Nth sector data that has been read from the non-volatile semiconductor memory to the host system via the system interface, in response to the read command for successive sector data.Type: GrantFiled: May 18, 2012Date of Patent: January 19, 2016Assignee: Solid State Storage Solutions, IncInventors: Takayuki Tamura, Shigemasa Shiota, Kunihiro Katayama, Masashi Naito