Patents by Inventor Masashi Nakata

Masashi Nakata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7928491
    Abstract: A semiconductor memory device has: a substrate; a memory cell transistor of a split-gate type formed on the substrate; and a reference transistor formed on the substrate and used for generating a reference current that is used in sensing data stored in the memory cell transistor. The memory cell transistor has a floating gate and a control gate, while the reference transistor is a MIS (Metal Insulator Semiconductor) transistor having a single gate electrode.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: April 19, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Masashi Nakata, Fumihiko Hayashi
  • Patent number: 7915913
    Abstract: A termination resistance adjusting circuit includes a first termination resistor circuit, a second termination resistor circuit connected in parallel with the first termination resistor circuit, a resistor circuit for adjustment that adjusts resistances of the first and second termination resistor circuits, a first amplifier circuit that receives a first voltage determined by the resistor circuit for adjustment and a second voltage determined by a reference resistor connected externally, equalizes the first and second voltages, and outputs a resistance adjusting signal to the first and second termination resistor circuits, first and second terminals connected to the first and second termination resistor circuits respectively, and a second amplifier circuit that receives a voltage based on a common voltage of a differential signal supplied to the first and second terminals, and the first or second voltage, and equalizes the voltage based on the common voltage and the first or second voltage.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: March 29, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Masashi Nakata
  • Patent number: 7902610
    Abstract: A semiconductor device including an N-channel insulated gate field effect transistor and a P-channel insulated gate field effect transistor, the device having: a first insulating layer and a second insulating layer; and gate electrode contact plugs. Each of the gate electrodes of the N-channel insulated gate field effect transistor and the P-channel insulated gate field effect transistor is buried in a gate electrode formation opening provided in the first insulating layer.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: March 8, 2011
    Assignee: Sony Corporation
    Inventors: Kaori Tai, Masanori Tsukamoto, Masashi Nakata, Itaru Oshiyama
  • Patent number: 7894678
    Abstract: A radio communication system according to the present invention includes a video/audio transmitter (1) and a video/audio receiver (2) for transmission/reception of data including video data and audio data at a predetermined bit rate. The video/audio receiver (2) has an error information generation section (18) for detecting a communication state according to a signal from the video/audio transmitter (1). The video/audio transmitter (1) has a transmission section (6) for transmitting data while controlling to change the bit rate according to the communication state detected by the video/audio receiver (2). Unless the communication state satisfies a predetermined criterion, the transmission section (6) temporarily lowers the bit rate for transmitting the data to the video/audio receiver (2). Thus, even when the communication state deteriorates, it is possible to minimize deterioration of the video and audio data and transmit data without lowering the quality of the entire video and audio transmitted.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: February 22, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masashi Nakata, Takafumi Chishiro
  • Publication number: 20100289521
    Abstract: A termination resistance adjusting circuit includes a first termination resistor circuit, a second termination resistor circuit connected in parallel with the first termination resistor circuit, a resistor circuit for adjustment that adjusts resistances of the first and second termination resistor circuits, a first amplifier circuit that receives a first voltage determined by the resistor circuit for adjustment and a second voltage determined by a reference resistor connected externally, equalizes the first and second voltages, and outputs a resistance adjusting signal to the first and second termination resistor circuits, first and second terminals connected to the first and second termination resistor circuits respectively, and a second amplifier circuit that receives a voltage based on a common voltage of a differential signal supplied to the first and second terminals, and the first or second voltage, and equalizes the voltage based on the common voltage and the first or second voltage.
    Type: Application
    Filed: May 5, 2010
    Publication date: November 18, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Masashi NAKATA
  • Publication number: 20100230583
    Abstract: A solid state image pickup device includes a pixel section defined by unit pixels arrayed in line and row directions of a semiconductor substrate. Each of the unit pixels includes a photoelectric transducer that is formed on the semiconductor substrate and converts incident light into a signal charge, a waveguide that is formed above the photoelectric transducer and guides the incident light to the photoelectric transducer, and a microlens that is formed above the waveguide and guides the incident light to an end of light incident side of the waveguide. The waveguide has a columnar body with a constant cross section from the end of light incident side to an end of light exit side, and is arranged such that a center of rays of the incident light incident from the microlens on the end of light incident side of the waveguide is aligned with a central axis of the waveguide.
    Type: Application
    Filed: March 23, 2010
    Publication date: September 16, 2010
    Applicant: SONY CORPORATION
    Inventors: Masashi Nakata, Shinichiro Izawa, Kazuyoshi Yamashita
  • Publication number: 20100148274
    Abstract: A semiconductor device including an N-channel insulated gate field effect transistor and a P-channel insulated gate field effect transistor, the device having: a first insulating layer and a second insulating layer; and gate electrode contact plugs. Each of the gate electrodes of the N-channel insulated gate field effect transistor and the P-channel insulated gate field effect transistor is buried in a gate electrode formation opening provided in the first insulating layer.
    Type: Application
    Filed: February 25, 2010
    Publication date: June 17, 2010
    Applicant: SONY CORPORATION
    Inventors: Kaori Tai, Masanori Tsukamoto, Masashi Nakata, Itaru Oshiyama
  • Publication number: 20100118170
    Abstract: A solid-state imaging device includes a photoelectric conversion section which is disposed on a semiconductor substrate and which photoelectrically converts incident light into signal charges, a pixel transistor section which is disposed on the semiconductor substrate and which converts signal charges read out from the photoelectric conversion section into a voltage, and an element isolation region which is disposed on the semiconductor substrate and which isolates the photoelectric conversion section from an active region in which the pixel transistor section is disposed. The pixel transistor section includes a plurality of transistors. Among the plurality of transistors, in at least one transistor in which the gate width direction of its gate electrode is oriented toward the photoelectric conversion section, at least a photoelectric conversion section side portion of the gate electrode is disposed within and on the active region with a gate insulating film therebetween.
    Type: Application
    Filed: November 9, 2009
    Publication date: May 13, 2010
    Applicant: SONY CORPORATION
    Inventors: Takuji Matsumoto, Keiji Tatani, Tetsuji Yamaguchi, Masashi Nakata
  • Patent number: 7714393
    Abstract: Disclosed herein is a semiconductor device including an N-channel insulated gate field effect transistor and a P-channel insulated gate field effect transistor, the device having: a first insulating layer and a second insulating layer; and gate electrode contact plugs. Each of the gate electrodes of the N-channel insulated gate field effect transistor and the P-channel insulated gate field effect transistor is buried in a gate electrode formation opening provided in the first insulating layer.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: May 11, 2010
    Assignee: Sony Corporation
    Inventors: Kaori Tai, Masanori Tsukamoto, Masashi Nakata, Itaru Oshiyama
  • Publication number: 20100007779
    Abstract: A solid-state imaging device includes a semiconductor substrate having a pixel region including a photoelectric conversion portion, a wiring portion including a conductor line and disposed on the semiconductor substrate with an insulating film therebetween, a metal pad connected to the conductor line, a pad-coating insulating film coating the metal pad, and a waveguide material layer. The wiring portion and the pad-coating insulating film each have an opening therein over the photoelectric conversion portion, and the openings continue from each other to define a waveguide opening having an open side and a closed side. The waveguide material layer is disposed in the waveguide opening and on the pad-coating insulating film with a passivation layer therebetween. The pad-coating insulating film has a thickness of 50 to 250 nm and a face defining the opening. The face is slanted so as to diverge toward the open side of the opening.
    Type: Application
    Filed: July 2, 2009
    Publication date: January 14, 2010
    Applicant: SONY CORPORATION
    Inventors: Masashi Nakata, Haruhiko Ajisawa, Naotsugu Yoshida, Yasuhiro Nakano, Junichi Furukawa, Yoshinori Toumiya, Junichiro Fujimagari
  • Publication number: 20080087966
    Abstract: Disclosed herein is a semiconductor device including an N-channel insulated gate field effect transistor and a P-channel insulated gate field effect transistor, the device having: a first insulating layer and a second insulating layer; and gate electrode contact plugs. Each of the gate electrodes of the N-channel insulated gate field effect transistor and the P-channel insulated gate field effect transistor is buried in a gate electrode formation opening provided in the first insulating layer.
    Type: Application
    Filed: October 10, 2007
    Publication date: April 17, 2008
    Applicant: SONY CORPORATION
    Inventors: Kaori Tai, Masanori Tsukamoto, Masashi Nakata, Itaru Oshiyama
  • Publication number: 20070228444
    Abstract: A semiconductor memory device has: a substrate; a memory cell transistor of a split-gate type formed on the substrate; and a reference transistor formed on the substrate and used for generating a reference current that is used in sensing data stored in the memory cell transistor. The memory cell transistor has a floating gate and a control gate, while the reference transistor is a MIS (Metal Insulator Semiconductor) transistor having a single gate electrode.
    Type: Application
    Filed: August 16, 2006
    Publication date: October 4, 2007
    Inventors: Masashi Nakata, Fumihiko Hayashi
  • Publication number: 20060258291
    Abstract: A radio communication system according to the present invention includes a video/audio transmitter (1) and a video/audio receiver (2) for transmission/reception of data including video data and audio data at a predetermined bit rate. The video/audio receiver (2) has an error information generation section (18) for detecting a communication state according to a signal from the video/audio transmitter (1). The video/audio transmitter (1) has a transmission section (6) for transmitting data while controlling to change the bit rate according to the communication state detected by the video/audio receiver (2). Unless the communication state satisfies a predetermined criterion, the transmission section (6) temporarily lowers the bit rate for transmitting the data to the video/audio receiver (2). Thus, even when the communication state deteriorates, it is possible to minimize deterioration of the video and audio data and transmit data without lowering the quality of the entire video and audio transmitted.
    Type: Application
    Filed: April 19, 2004
    Publication date: November 16, 2006
    Inventors: Masashi Nakata, Takafumi Chishiro, Kenzo Hara
  • Patent number: 6700291
    Abstract: Brush holding device includes a brush, a brush holder, a torsion spring and a support pin. The torsion spring applies side pressure to the brush by spring force exerted around the support pin and also temporarily hold the brush in the brush holder. When the temporarily held state of the brush holder is relieved, the spring force of the torsion spring urges the brush toward a commutator.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: March 2, 2004
    Assignee: Asmo Co., Ltd.
    Inventors: Yasuaki Uchida, Masashi Nakata
  • Publication number: 20030117036
    Abstract: Brush holding device includes a brush, a brush holder, a torsion spring and a support pin. The torsion spring applies side pressure to the brush by spring force exerted around the support pin and also temporarily hold the brush in the brush holder. When the temporarily held state of the brush holder is relieved, the spring force of the torsion spring urges the brush toward a commutator.
    Type: Application
    Filed: December 13, 2002
    Publication date: June 26, 2003
    Inventors: Yasuaki Uchida, Masashi Nakata
  • Patent number: 6249098
    Abstract: A wiper blade wipes over a predetermined range of a front windshield in response to rotation of a wiper motor in a forward and reverse directions. The wiper blade operates in a wiping range between a predetermined upper reversing position and a predetermined lower reversing position. An upper pre-reversing position is defined inside of the upper reversing position, and a lower pre-reversing position is defined inside of the lower reversing position. A rotation sensor produces pulse signals in response to the rotation of the wiper motor. A CPU counts the pulse signals produced from the rotation sensor when a position detection sensor detects an arrival of the wiper blade at the pre-reversing position. The CPU produces a control signal to a drive circuit and reverses the direction of the drive current of the wiper motor to reverse the rotation of the wiper motor, when the pulse count value reaches a predetermined value.
    Type: Grant
    Filed: October 18, 1999
    Date of Patent: June 19, 2001
    Assignee: ASMO Co., Ltd.
    Inventors: Naomi Miyazaki, Masashi Nakata, Yasuaki Uchida, Akio Oshiro
  • Patent number: 5983484
    Abstract: A method of making an electric motor where the motor has a reduction gear and a gear cover mounted thereon. An opening is formed through the gear cover at a location corresponding to a connection portion. A pressure member is inserted into the gear cover through the opening and is pressed against another pressure member to squeeze a choke coil and a connection plate. High current may flow through the pressure members for a short time to weld the choke coil and the connection plate together by way of resistive heating.
    Type: Grant
    Filed: March 17, 1997
    Date of Patent: November 16, 1999
    Assignee: ASMO Co., Ltd.
    Inventors: Yoshihiko Harada, Masashi Nakata, Akio Oshiro, Seiichi Murakami
  • Patent number: 5937506
    Abstract: A motor terminal device comprises a storage case having an engaging section and installed on the motor side and a storage cover having an engaged section which can be engaged with the engaging section. The storage case stores external connecting terminals and electrical components, while the storage cover has a projecting pressers located in a position corresponding to the electrical components to secure the electrical components by pressing. The external connecting terminals have a latch hole and the storage case has a latch projection. Detachment of external connecting terminals is prevented as the latch projection is engaged with the latch hole.
    Type: Grant
    Filed: January 24, 1997
    Date of Patent: August 17, 1999
    Assignee: Asmo Co., Ltd.
    Inventor: Masashi Nakata
  • Patent number: 5872411
    Abstract: A motor terminal device comprises a storage case having an engaging section and installed on the motor side and a storage cover having an engaging section which can be engaged with the engaging section of the storage case. The storage case stores external connecting terminals and electrical components including capacitors and choke coils, while the storage cover has elastic projecting pressers located in a position corresponding to the electrical components to secure the electrical components by pressing. The presser for the choke coil includes a pair of plate walls which sandwiches the choke coil therebetween and presses the same toward the storage case. The presser for the capacitor includes a butyl rubber or urethane foam pasted on the inside of the storage cover.
    Type: Grant
    Filed: January 21, 1997
    Date of Patent: February 16, 1999
    Assignee: Asmo Co., Ltd.
    Inventor: Masashi Nakata
  • Patent number: 5747901
    Abstract: An electric motor has a detachably mounted gear cover and a reduction gear located within the gear cover. One pressure member is inserted into the gear cover through an opening formed through the gear cover and urged against another pressure member to squeeze a choke coil and a connection plate. A high current is flowed through the pressure members for a short time to weld the choke coil and connection plate together through resistive heating.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: May 5, 1998
    Assignee: ASMO Co., Ltd.
    Inventors: Yoshihiko Harada, Masashi Nakata, Akio Oshiro, Seiichi Murakami