Patents by Inventor Masashi Nakata

Masashi Nakata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190214419
    Abstract: A solid state imaging device that includes a phase difference detection pixel which is a pixel for phase difference detection; a first imaging pixel which is a pixel for imaging and is adjacent to the phase difference detection pixel; and a second imaging pixel which is a pixel for imaging other than the first imaging pixel. An area of a color filter of the first imaging pixel is smaller than an area of a color filter of the second imaging pixel.
    Type: Application
    Filed: October 2, 2017
    Publication date: July 11, 2019
    Inventors: Hiroshi Tayanaka, Yuuji Inoue, Masashi Nakata
  • Publication number: 20190191117
    Abstract: There is provided an image sensor including a pixel unit, the pixel unit including a photodiode, a first color filter and a second color filter each disposed in a different position on a plane above the photodiode, and a first on-chip lens disposed over the first color filter and a second on-chip lens disposed over the second color filter.
    Type: Application
    Filed: February 25, 2019
    Publication date: June 20, 2019
    Applicant: Sony Corporation
    Inventor: Masashi Nakata
  • Patent number: 10305497
    Abstract: According to one embodiment, in a semiconductor integrated circuit of a DLL circuit, in a delay chain, a plurality of delay elements are connected. A first detection circuit detects a group corresponding to a certain delay amount among a plurality of groups obtained by dividing the delay chain. A second detection circuit detects a delay element corresponding to the certain delay amount among a plurality of delay elements included in the detected group. The semiconductor integrated circuit detects the number of delay elements corresponding to one cycle of a first clock. The control circuit includes a second delay chain. The second delay chain has a configuration equivalent to the delay chain in the semiconductor integrated circuit. The control circuit outputs a second clock obtained by delaying the first clock by using the second delay chain according to the number of delay elements detected by the semiconductor integrated circuit.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: May 28, 2019
    Assignee: Toshiba Memory Corporation
    Inventor: Masashi Nakata
  • Patent number: 10277847
    Abstract: There is provided a solid-state imaging device including: a pixel region that includes a plurality of pixels arranged in a two-dimensional matrix pattern. Some of the plurality of pixels are configured to be phase difference detection pixels that include a photoelectric conversion section disposed on a semiconductor substrate and a light blocking film disposed above a portion of the photoelectric conversion section. In particular a location of the light blocking film for the phase difference detection pixels varies according to a location of the phase difference detection pixel. For example, the location of the light blocking film for a phase difference detection pixel positioned at a periphery of the pixel region is different than a location of the light blocking film for a phase difference detection pixel positioned in a center portion of the pixel region.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: April 30, 2019
    Assignee: SONY CORPORATION
    Inventors: Masashi Nakata, Koji Takahashi, Yuuji Inoue, Kenji Ikeda, Osamu Oka, Yoshiro Hattori, Shinya Sato, Hideaki Kato, Yasuhiro Chouji, Emi Nishioka, Hiroshi Kawanobe
  • Publication number: 20190111338
    Abstract: Disclosed herein is an information processing system including an imaging section, an identification section, a setup section, and a display control section. The imaging section captures an image of a user-designated body and outputs multispectral data regarding a subject. The multispectral data indicates light intensity in four or more wavelength bands. The identification section identifies the type of the subject in accordance with the multispectral data regarding the subject. The setup section sets, based on the type of the subject, an object corresponding to the subject appearing in a game. The display control section causes the object to be displayed in the game in a manner based on the type of the subject.
    Type: Application
    Filed: October 2, 2018
    Publication date: April 18, 2019
    Applicant: Sony Interactive Entertainment Inc.
    Inventors: Masashi NAKATA, Takashi IMAMURA
  • Patent number: 10263024
    Abstract: The present technology relates to an imaging element, an electronic device, and a manufacturing method that make it possible to prevent color mixing in a pixel adjacent to a phase difference detection pixel and to make the light receiving sensitivity high or more. An anti-reflection film is formed only on the side wall of a light blocking unit that blocks part of the incident light on a photo diode of phase difference detection pixels for detecting the phase difference out of a plurality of pixels. Thereby, the light reflected at the side wall of the light blocking unit does not enter a photo diode of an adjacent pixel, and therefore color mixing is prevented. Furthermore, since the anti-reflection film is not formed on an interlayer layer, the light receiving sensitivity of the light that directly enters the photo diode is not reduced. The present technology can be applied to imaging elements.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: April 16, 2019
    Assignee: Sony Corporation
    Inventor: Masashi Nakata
  • Patent number: 10257453
    Abstract: There is provided an image sensor including a pixel unit, the pixel unit including a photodiode, a first color filter and a second color filter each disposed in a different position on a plane above the photodiode, and a first on-chip lens disposed over the first color filter and a second on-chip lens disposed over the second color filter.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: April 9, 2019
    Assignee: Sony Corporation
    Inventor: Masashi Nakata
  • Publication number: 20190103430
    Abstract: A solid state imaging device that includes a phase difference detection pixel which is a pixel for phase difference detection; a first imaging pixel which is a pixel for imaging and is adjacent to the phase difference detection pixel; and a second imaging pixel which is a pixel for imaging other than the first imaging pixel. An area of a color filter of the first imaging pixel is smaller than an area of a color filter of the second imaging pixel.
    Type: Application
    Filed: October 2, 2017
    Publication date: April 4, 2019
    Inventors: Hiroshi Tayanaka, Yuuji Inoue, Masashi Nakata
  • Publication number: 20190081631
    Abstract: According to one embodiment, in a semiconductor integrated circuit of a DLL circuit, in a delay chain, a plurality of delay elements are connected. A first detection circuit detects a group corresponding to a certain delay amount among a plurality of groups obtained by dividing the delay chain. A second detection circuit detects a delay element corresponding to the certain delay amount among a plurality of delay elements included in the detected group. The semiconductor integrated circuit detects the number of delay elements corresponding to one cycle of a first clock. The control circuit includes a second delay chain. The second delay chain has a configuration equivalent to the delay chain in the semiconductor integrated circuit. The control circuit outputs a second clock obtained by delaying the first clock by using the second delay chain according to the number of delay elements detected by the semiconductor integrated circuit.
    Type: Application
    Filed: March 9, 2018
    Publication date: March 14, 2019
    Applicant: Toshiba Memory Corporation
    Inventor: Masashi NAKATA
  • Publication number: 20190080734
    Abstract: A semiconductor integrated circuit includes a register, a detection circuit, and a generation circuit. The register stores a detection start timing of a reference delay amount based on a first clock during a first period. The first period is a period in which the first clock starts to be input. The detection circuit has a plurality of delay stages. The detection circuit detects the reference delay amount at the start timing during the first period and obtains the number of delay stages corresponding to the reference delay amount. The generation circuit adjusts a duty ratio of the first clock based on the number of delay stages obtained by the detection circuit and generates a second clock during a second period. The second period is a period continuing from the first period.
    Type: Application
    Filed: March 2, 2018
    Publication date: March 14, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Nobuhiro TSUJI, Hiroki OHKOUCHI, Shota NOTE, Masashi NAKATA, Yohei YASUDA
  • Publication number: 20190019823
    Abstract: The present disclosure relates to an imaging element, an electronic device, and an information processing device capable of more easily providing a wider variety of photoelectric conversion outputs. An imaging element of the present disclosure includes: a photoelectric conversion element layer containing a photoelectric conversion element that photoelectrically converts incident light; a wiring layer formed in the photoelectric conversion element layer on the side opposite to a light entering plane of the incident light, and containing a wire for reading charges from the photoelectric conversion element; and a support substrate laminated on the photoelectric conversion element layer and the wiring layer, and containing another photoelectric conversion element. The present disclosure is applicable to an imaging element, an electronic device, and an information processing device.
    Type: Application
    Filed: September 14, 2018
    Publication date: January 17, 2019
    Applicant: SONY CORPORATION
    Inventors: Susumu OOKI, Masashi NAKATA
  • Patent number: 10128285
    Abstract: The present disclosure relates to an imaging element, an electronic device, and an information processing device capable of more easily providing a wider variety of photoelectric conversion outputs.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: November 13, 2018
    Assignee: Sony Corporation
    Inventors: Susumu Ooki, Masashi Nakata
  • Publication number: 20180205900
    Abstract: There is provided an image sensor including a pixel unit, the pixel unit including a photodiode, a first color filter and a second color filter each disposed in a different position on a plane above the photodiode, and a first on-chip lens disposed over the first color filter and a second on-chip lens disposed over the second color filter.
    Type: Application
    Filed: March 14, 2018
    Publication date: July 19, 2018
    Inventor: Masashi Nakata
  • Publication number: 20180184036
    Abstract: The present disclosure relates to an image sensor and an electronic device that can reduce occurrence of a problem not only in a case of adding and using outputs of a plurality of PDs that share one of on-chip lenses but also in a case of using them individually. An image sensor according to a first aspect of the present disclosure includes: a light receiving element that generates charges by photoelectric conversion; an on-chip lens that is shared by a plurality of light receiving elements and condenses incident light onto the plurality of light receiving elements; and an AD convertor that converts charges generated by the light receiving element to a digital signal. Exposure timings of the plurality of light receiving elements sharing one of the on-chip lenses are the same. The present disclosure can be applied, for example, to image pickup devices having an image-plane phase-difference detection AF function.
    Type: Application
    Filed: June 2, 2016
    Publication date: June 28, 2018
    Inventors: GOTA SATO, MASASHI NAKATA
  • Patent number: 9998679
    Abstract: The present disclosure relates to a control device, a control method, and an electronic device that enable an adequate exposure amount to be set at high speed. A control unit controls an exposure amount of a pixel group that is a two-dimensional arrangement of a plurality of pixels. Specifically, in a first mode before recording of a photographed image is started, the control unit sets a plurality of types of exposure amounts to the pixel group, and in a second mode in which the photographed image is recorded, the control unit sets fewer types of exposure amounts than in the first mode to the pixel group. The present technology can be applied to, for example, a control device that controls a solid state imaging element.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: June 12, 2018
    Assignee: SONY CORPORATION
    Inventor: Masashi Nakata
  • Publication number: 20180160058
    Abstract: Image quality can be improved. In a case where light is focused on the center of an opening, sensitivity can be decreased by extending any side of a light-shielding film to the center. Namely, in the case of adjusting the sensitivity to be decreased, there is no need to simultaneously change all the sides, but the adjusting may be achieved by moving only a specific side. Further, since each side is regarded as individual adjusting parameter, a complicated inside-angle-of-view distribution can be corrected. The present disclosure can be applied to, for example, a CMOS solid-state imaging device to be used in an imaging device such as a camera.
    Type: Application
    Filed: September 5, 2016
    Publication date: June 7, 2018
    Applicant: Sony Semiconductor Solutions Corporation
    Inventor: Masashi NAKATA
  • Publication number: 20180139379
    Abstract: The present technology relates to an image sensor and an electronic apparatus which enable higher-quality images to be obtained. Provided is an image sensor including a plurality of pixels, each pixel including one on-chip lens, and a plurality of photoelectric conversion layers formed below the on-chip lens. Each of at least two of the plurality of photoelectric conversion layers is split, partially formed, or partially shielded from light with respect to a light-receiving surface. The pixels are phase difference detection pixels for performing AF by phase difference detection or imaging pixels for generating an image. The present technology can be applied to a CMOS image sensor, for example.
    Type: Application
    Filed: December 27, 2017
    Publication date: May 17, 2018
    Inventor: Masashi NAKATA
  • Patent number: 9973197
    Abstract: The phase-locked loop circuit according to one embodiment includes a low-pass filter including a first transistor, and a second transistor. The low-pass filter converts a first current into a first voltage, and a second current into a second voltage. The first current and the second current are generated in accordance with a pulse width of the same signal. The first transistor includes a gate input with the first voltage, a first terminal grounded, a second terminal electrically coupled to a gate of the second transistor, and a gate oxide film thicker than that of the second transistor. The second transistor includes the gate input with the second voltage.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: May 15, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Masashi Nakata
  • Patent number: 9967083
    Abstract: A communication device includes a timing generation circuit generates timing signals at several timing points within one period of a first clock signal. A clock sampling circuit receives the first clock signal and detects a logic level of the first clock signal at each of the timing points. A control circuit calculates a difference between the number of times a first or a second logic level is detected for the first clock signal and outputs a control signal indicating whether a duty ratio of the first clock signal is to be adjusted. A correction circuit that changes at a duty ratio of a second clock signal transmitted to the transmitting device, the duty ratio being set in accordance with the control signal. The duty ratio of the first clock signal is then adjusted by the transmitting device according to the duty ratio of the second clock signal.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: May 8, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Hiroo Yabe, Masayuki Usuda, Masashi Nakata
  • Patent number: 9955095
    Abstract: There is provided an image sensor including a pixel unit, the pixel unit including a photodiode, a first color filter and a second color filter each disposed in a different position on a plane above the photodiode, and a first on-chip lens disposed over the first color filter and a second on-chip lens disposed over the second color filter.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: April 24, 2018
    Assignee: Sony Corporation
    Inventor: Masashi Nakata