Patents by Inventor Masashige Moritoki

Masashige Moritoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090297986
    Abstract: A method of manufacturing a semiconductor device includes: forming a negative resist film having an annular pattern that masks an outer peripheral part of a wafer, on a film to be processed which is formed on the wafer; forming a positive resist film having a predetermined pattern on the negative resist film; and etching the film to be processed using the negative resist film and the positive resist film as a mask.
    Type: Application
    Filed: May 29, 2009
    Publication date: December 3, 2009
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Masashige MORITOKI
  • Publication number: 20090087957
    Abstract: Photoresist on a metal is removed with less oxidation of the metal surface by the invented ashing. During process, the matching of oxygen gas ratio and wafer temperature under downstream plasma which means no RF bias plasma is controlled for oxidation amount not to depend on ashing time with required photo resist rate in manufacturing.
    Type: Application
    Filed: September 25, 2008
    Publication date: April 2, 2009
    Applicant: NEC Electronics Corporation
    Inventors: Hiromi Sasaki, Masashige Moritoki
  • Publication number: 20080214008
    Abstract: In a method of manufacturing a semiconductor device, a plurality of structures are formed on a substrate, and a coating film is formed over a whole surface of the substrate to cover the plurality of structures. A photoresist layer is formed to have an opening portion above a target structure of the plurality of structures, and the coating film on a side of the opening is etched to expose a part of the target structure by using the photoresist layer as a mask while maintaining the substrate in a state covered with the coating film. Also, a target portion as at least a portion of the target structure is etched while leaving the coating film, and the photoresist layer and the coating film are removed.
    Type: Application
    Filed: December 26, 2007
    Publication date: September 4, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Masashige Moritoki, Masato Fujita
  • Publication number: 20060214300
    Abstract: An increase of the via resistance resulted due to the presence of the altered layer that has been formed and grown after the formation of the via hole can be effectively prevented, thereby providing an improved reliability of the semiconductor device. A method includes: forming a TiN film on the semiconductor substrate; forming an interlayer insulating film on a surface of the TiN film; forming a resist film on a surface of the interlayer insulating film; etching the semiconductor substrate having the resist film formed thereon to form an opening, thereby partially exposing the TiN film; plasma-processing the exposed portion of the TiN film to remove an altered layer formed in the exposed portion of the TiN film; and stripping the resist film via a high temperature-plasma processing.
    Type: Application
    Filed: March 8, 2006
    Publication date: September 28, 2006
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Kenichi Yamamoto, Masashige Moritoki, Takashi Shimane, Kazumi Saito, Hiroaki Tomimori, Takamasa Itou, Kousei Ushijima, Katsuro Tateyama
  • Publication number: 20060065979
    Abstract: A semiconductor device which is excellent in a contact property between an antireflection film on an Al contained metal film and a conductive plug is provided with good production stability. The semiconductor device includes a semiconductor substrate, an insulating interlayer 101, and a multi-layer structure. The insulating interlayer 101 is formed in the upper portion of the semiconductor substrate. The multi-layer structure is provided on the insulating interlayer 101. A Ti film 105, a TiN film 107, an AlCu film 109, a Ti film 111, a TiN film 113, and an etching adjustment film 115 are sequentially formed in the multi-layer structure. The semiconductor device includes an insulating interlayer 103 and a conductive plug. The insulating interlayer 103 is provided on the insulating interlayer 101 and the multi-layer structure. The conductive plug penetrates the insulating interlayer 103 and the etching adjustment film 115, and an end surface of the conductive plug is located in the TiN film 113.
    Type: Application
    Filed: September 27, 2005
    Publication date: March 30, 2006
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Masashige Moritoki, Kouichi Konishi
  • Patent number: 5759751
    Abstract: A semiconductor manufacturer peels a photo-resist mask off by using organic alkaline solvent, and the residual alkaline solvent is neutralized with acid before a rinse in pure water so as to prevent a metal wiring from erosion due to strong alkaline solution produced from the residual organic alkaline solvent.
    Type: Grant
    Filed: February 6, 1997
    Date of Patent: June 2, 1998
    Assignee: NEC Corporation
    Inventors: Yuji Shimizu, Kohiro Ito, Masashige Moritoki