Patents by Inventor Masataka Kondo
Masataka Kondo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6437231Abstract: An integrated thin-film solar battery having a plurality of unit elements connected in series includes a substrate, a plurality of spaced apart first electrode layers formed on the substrate; a plurality of semiconductor layers disposed on said plurality of first electrode layers in such a manner that each of the semiconductor layers is formed on two adjacent first electrodes and has a connection opening located on one of the two first electrodes, an electrically conductive layer formed on each of the semiconductor layers except on the region of the connection opening, and a second electrode layer disposed on each of the electrically conductive layers such that the second electrode layer is electrically connected to one of the two adjacent first electrode layers through the connection opening, to form a region interposed between the second electrode layer and the other first electrode layer as the unit element.Type: GrantFiled: May 24, 2001Date of Patent: August 20, 2002Assignee: Kanegafuchi Kagaku Kogyo Kabushiki KaishaInventors: Shinichiro Kurata, Katsuhiko Hayashi, Atsuo Ishikawa, Masataka Kondo
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Publication number: 20020075067Abstract: A semiconductor integrated circuit includes a functional circuit and a power source voltage generating circuit used for operating the functional circuit. In the power source voltage generating circuit, output stage transistors are driven by comparing a plurality of reference voltages produced by a plurality of resistors connected in series to one another with output voltages of a plurality of differential amplifiers connected in parallel to one another and varying gate voltages.Type: ApplicationFiled: November 16, 2001Publication date: June 20, 2002Applicant: Matsushita Electric Industiral Co. Ltd.Inventors: Masataka Kondo, Kiyoto Ohta, Yuji Yamasaki, Toshikazu Suzuki, Masanobu Hirose
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Patent number: 6384315Abstract: A thin film solar cell module which comprises a first electrode layer, a semiconductor layer and a second electrode layer, which are deposited on a substrate and at least part of which is worked to partition these layers into a plurality of cells which are electrically connected with each other and sealed with an encapsulant. At least part of at least one of the first electrode layer, the semiconductor layer and the second electrode layer, which is located at the periphery of the substrate, is removed by mechanical means or by means of laser beam. The periphery of the connected solar cells may be surrounded by a high adhesive strength region.Type: GrantFiled: August 10, 2001Date of Patent: May 7, 2002Assignee: Kaneka CorporationInventors: Hideo Yamagishi, Toshihide Ohkatsu, Masataka Kondo
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Patent number: 6380025Abstract: In the present invention, a diaphragm for pressurizing and heating an encapsulating material is pre-heated to a predetermined temperature before laminating a lamination unit comprising a photovoltaic module and the encapsulating material. As a result, one surface of the lamination unit is heated by a heater provided on a table and the other surface is heated by the diaphragm, so it is possible to prevent appearance of a temperature difference between the surfaces.Type: GrantFiled: March 20, 2000Date of Patent: April 30, 2002Assignee: Kaneka CorporationInventors: Takayuki Suzuki, Hideo Yamagishi, Masataka Kondo
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Patent number: 6369315Abstract: A photovoltaic module comprises a transparent substrate, a plurality of photovoltaic cells formed on the back surface of the substrate, busbars each including a busbar body connected electrically to the photovoltaic cells, an electrical insulating filler covering the photovoltaic cells and the busbar bodies, a spacer, and a cover film covering the filler. Each busbar integrally includes the busbar body and an extension long enough to project from one end of the transparent substrate. The busbar extensions, which serve as output fetching lines, are bent along the spacer, and their respective output end portions are drawn out through the cover film. The output end portions are connected individually to terminals of a terminal box.Type: GrantFiled: December 3, 1999Date of Patent: April 9, 2002Assignee: Kaneka CorporationInventors: Seishiro Mizukami, Hideo Yamagishi, Yuzuru Kondoh, Masataka Kondo
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Patent number: 6365823Abstract: A thin film based solar cell module having superior appearance without glittering, and method of manufacturing the same in a simple manner at a low cost are provided. The solar cell module includes a glass substrate 10 and a photo semiconductor element formed on a surface different from a light entering surface of glass substrate 10. The glass substrate 10 is formed of a figured glass having recesses and protrusions formed to provide antiglaring effect, on the light entering surface. The photo semiconductor element is formed by successively stacking a transparent electrode 2, a photo semiconductor layer 3 and a back electrode layer 5.Type: GrantFiled: November 1, 1999Date of Patent: April 2, 2002Assignee: Kaneka CorporationInventor: Masataka Kondo
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Patent number: 6357649Abstract: A plurality of solder bumps are arranged in a row at regular pitch in a lead wire soldering region of a solar battery. A soldering apparatus for soldering a lead wire to the lead wire soldering region via the solder bumps comprises a lead wire feeding section for feeding out the lead wire. An end of the lead wire in the lead wire feeding section is chucked and the lead wire is laid over all length of the row of solder bumps. The soldering apparatus further comprises a soldering unit for soldering the lead wire onto the solder bump. The soldering unit has a lead wire holding member for holding the lead wire on a solder bump and a soldering iron. The soldering apparatus repeats an operation for welding the lead wire to the solder bump by means of the soldering iron, while the lead wire is held by the lead wire holding member.Type: GrantFiled: March 22, 2000Date of Patent: March 19, 2002Assignee: Kaneka CorporationInventors: Toshihide Okatsu, Masataka Kondo, Akimine Hayashi, Eiji Kuribe
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Publication number: 20010045841Abstract: A semiconductor integrated circuit is provided in which a negative voltage generation circuit capable of supplying a memory cell transistor substrate with a stable negative voltage, independently of the fluctuation of a power source voltage or environmental conditions and the process conditions etc., is realized easily, and in which the data holding time of a memory can be secured sufficiently, and the power consumption is reduced.Type: ApplicationFiled: May 10, 2001Publication date: November 29, 2001Applicant: Matsushita Electric Industria Co., Ltd.Inventors: Masataka Kondo, Kiyoto Ohta, Tomonori Fujimoto
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Patent number: 6324195Abstract: Method and apparatus for processing a workpiece having a thin film layer using laser pulses generated by a plurality of lasers. The lasers are equipped with Q-switches and triggered by a Q-switch trigger device at controlled pulse frequencies and delays with respect to one another. The laser pulses from the plurality of lasers are directed to the same processing spot on the workpiece to generate a combined laser beam, and the workpiece is moved relative to the laser beam to process the thin film with the laser pulses. The method and apparatus increase the processing speed and accomplish multiple-step processing in a single pass. Application of the invention in the fabrication of thin film solar cells is described.Type: GrantFiled: June 4, 1999Date of Patent: November 27, 2001Assignee: Kaneka CorporationInventors: Takayuki Suzuki, Masataka Kondo
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Publication number: 20010035205Abstract: An integrated thin-film solar battery having a plurality of unit elements connected in series includes a substrate, a plurality of spaced apart first electrode layers formed on the substrate; a plurality of semiconductor layers disposed on said plurality of first electrode layers in such a manner that each of the semiconductor layers is formed on two adjacent first electrodes and has a connection opening located on one of the two first electrodes, an electrically conductive layer formed on each of the semiconductor layers except on the region of the connection opening, and a second electrode layer disposed on each of the electrically conductive layers such that the second electrode layer is electrically connected to one of the two adjacent first electrode layers through the connection opening, to form a region interposed between the second electrode layer and the other first electrode layer as the unit element.Type: ApplicationFiled: May 24, 2001Publication date: November 1, 2001Applicant: KANEGAFUCHI KAGAKU KOGYO KABUSHIKI KAISHAInventors: Shinichiro Kurata, Katsuhiko Hayashi, Atsuo Ishikawa, Masataka Kondo
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Patent number: 6300556Abstract: A thin film solar cell module which comprises a first electrode layer, a semiconductor layer and a second electrode layer, which are deposited on a substrate and at least part of which is worked to partition these layers into a plurality of cells which are electrically connected with each other and sealed with an encapsulant. At least part of at least one of the first electrode layer, the semiconductor layer and the second electrode layer, which is located at the periphery of the substrate, is removed by mechanical means or by means of laser beam. The periphery of the connected solar cells may be surrounded by a high adhesive strength region.Type: GrantFiled: September 8, 1999Date of Patent: October 9, 2001Assignee: Kaneka CorporationInventors: Hideo Yamagishi, Toshihide Ohkatsu, Masataka Kondo
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Patent number: 6300555Abstract: A solar cell (1) and a support member (21) supporting the solar cell (1) are provided, the support member (21) has a metal portion, and between the solar cell (1) and the metal portion of the support member (21), a spacer (31) is provided. The spacer (31) has coefficient of thermal conductivity of at most 10−3W/cm·° C. and functions as an heat insulator, and/or resistivity of at least 1012&OHgr;·cm and functions as an electrical insulator, and maintains its shape when the solar cell (1) is in a state of operation.Type: GrantFiled: November 5, 1999Date of Patent: October 9, 2001Assignee: Kaneka CorporationInventors: Masataka Kondo, Atsushi Takenaka
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Patent number: 6294722Abstract: A sputtering-deposition method usable in forming on an insulator substrate a film including a conductive layer includes the steps of: preparing a conductive substrate holder in the form of a frame having an opening at its central area and electrically grounded; positioning the insulator substrate to cover the opening of the holder; arranging a flexible spacer on a peripheral edge of the substrate and also superposing a back plate on the spacer to press the substrate against the holder via the spacer; pressing and fixing the back plate to the holder; and then sputtering a separately provided target to deposit a new layer on a region of the substrate exposed in the holder's opening.Type: GrantFiled: February 23, 2000Date of Patent: September 25, 2001Assignee: Kaneka CorporationInventors: Masataka Kondo, Takayuki Suzuki
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Publication number: 20010019511Abstract: To provide a boosting circuit that is included in a semiconductor integrated circuit in order for stabilizing a boosted potential with high efficiency. Therefore, the present invention is provided with a plurality of boosting circuits and a timing control circuit for distributing the operations of the boosting circuits. Boosting operations per operating cycle of a memory increase in number so as to suppress a reduction in boosted source potential, the reduction being caused by consumption. Moreover, it is possible to perform a boosting operation in a time period equal to that of consuming boosted source potential, resulting in an efficient boosting operation.Type: ApplicationFiled: February 28, 2001Publication date: September 6, 2001Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Masataka Kondo, Kiyoto Oota, Tomonori Fujimoto, Yoshihiko Sumimoto
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Publication number: 20010014542Abstract: A substrate is washed with a washing liquid. Compressed air is blown to the substrate to remove the washing liquid. A thin film is formed on the substrate from which the washing liquid has been removed.Type: ApplicationFiled: April 17, 2001Publication date: August 16, 2001Applicant: Kaneka CorporationInventors: Masataka Kondo, Katsuhiko Hayashi, Eiji Kuribe
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Patent number: 6271149Abstract: A method of manufacturing a semiconductor device having a substrate with a thin film formed thereon, the method including washing the substrate with a washing liquid, removing the washing liquid from the substrate by blowing a compressed air to the substrate washed, and forming a thin film on the substrate immediately after blowing the compressed air on the substrate without performed another step, wherein the compressed air to be blown on the substrate may be pre-heated or ionized and the substrate may be washed with an inert gas in the form of plasma before the thin film is formed.Type: GrantFiled: March 20, 2000Date of Patent: August 7, 2001Assignee: Kaneka CorporationInventors: Masataka Kondo, Katsuhiko Hayashi, Eiji Kuribe
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Patent number: 6271053Abstract: A method of manufacturing an integrated thin film solar battery module including a substrate, and a plurality of unit cells connected in series on the substrate, each of the unit cells having a first electrode layer, a semiconductor layer and a second electrode layer which are stacked one upon the other on the substrate. The method includes the steps of scribing the first electrode layer formed on the substrate, forming a semiconductor layer on the first electrode layer, scribing the semiconductor layer for each of the plurality of unit cells to form openings for connection to the first electrode layer, forming a second electrode layer on the semiconductor layer, scribing the second electrode layer and the semiconductor layer in the vicinity of the openings formed in the semiconductor layer, allowing an edge surface of the semiconductor layer to be exposed to the outside by removing residues of the second electrode layer and the semiconductor layer, and applying a heat treatment at 130° C.Type: GrantFiled: November 4, 1999Date of Patent: August 7, 2001Assignee: Kaneka CorporationInventor: Masataka Kondo
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Patent number: 6265652Abstract: An integrated thin-film solar battery having a plurality of unit elements connected in series includes a substrate, a plurality of spaced apart first electrode layers formed on the substrate; a plurality of semiconductor layers disposed on said plurality of first electrode layers in such a manner that each of the semiconductor layers is formed on two adjacent first electrodes and has a connection opening located on one of the two first electrodes, an electrically conductive layer formed on each of the semiconductor layers except on the region of the connection opening, and a second electrode layer disposed on each of the electrically conductive layers such that the second electrode layer is electrically connected to one of the two adjacent first electrode layers through the connection opening, to form a region interposed between the second electrode layer and the other first electrode layer as the unit element.Type: GrantFiled: March 3, 1998Date of Patent: July 24, 2001Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kabushiki KaishaInventors: Shinichiro Kurata, Katsuhiko Hayashi, Atsuo Ishikawa, Masataka Kondo
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Patent number: 6228662Abstract: A method for removing short circuits in thin film solar cell elements during manufacturing by applying a pseudo-alternating voltage between the substrate side and the back electrodes of the solar cell elements. The waveform of the pseudo-alternating voltage may be a sinusoidal wave, a half-wave sinusoidal wave, a sawtooth wave, a square wave or the like. The peak voltage in the reverse direction is up to the reverse breakdown voltage of the solar cell element, and the waveform may either contain a small forward component or no fond component The peak voltage in Se reverse direction may also momentarily exceed the reverse breakdown voltage. The period of the pseudo-alternating voltage matches the tine constant of the solar cell element determined by the capacity and reverse resistance of the solar cell element.Type: GrantFiled: June 10, 1999Date of Patent: May 8, 2001Assignee: Kaneka CorporationInventors: Katsuhiko Hayashi, Masataka Kondo
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Patent number: 6189485Abstract: A substrate is disposed in a reactor kept to be a vacuum state, a material gas is supplied into a space in front of the substrate, high-frequency electric power is supplied to the material gas to generate plasma based on electric discharge excitation in the front space of the substrate, and an amorphous silicon thin film is deposited on the substrate by chemical vapour deposition. Further, an electrode section comprising tubular electrodes supplying the material gas through a plurality of gas discharge openings, and tubular electrode sucking and evacuating gases to the outside through a plurality of gas suction openings. Thereby, a higher silane gas and the like generated during the film deposition can be removed from a reactive region immediately, and a thin film is deposited on the substrate surface with the same condition of the film deposition at any spot of the substrate surface. Consequently, the amorphous silicon thin film with film quality may be deposited on the large-area substrate.Type: GrantFiled: June 22, 1999Date of Patent: February 20, 2001Assignees: Anelva Corporation, Takeo Sato, Japan as represented by the Director General of Agency of Industrial Science and Technology, Sharp Kabushiki Kaisha, Kaneka CorporationInventors: Akihisa Matsuda, Yoshimi Watabe, Hideo Yamagishi, Masataka Kondo, Takashi Hayakawa