Patents by Inventor Masato Hamamoto

Masato Hamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4999520
    Abstract: A semiconductor integrated circuit wherein an input circuit is formed by a phase split circuit consisting of a bipolar transistor which outputs an inverted output from the collector and non-inverted output from the emitter, the emitter follower output circuit is driven by an inverted output of the phase split circuit, meanwhile, an emitter load of the emitter follower output circuit is formed by a transistor, and the emitter load transistor is temporarily driven conductively by a charging current of the capacitance to be charged by the rising edge of the non-inverted output of the phase split circuit.
    Type: Grant
    Filed: March 30, 1989
    Date of Patent: March 12, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Mitsuo Usami, Noboru Shiozawa, Toshio Yamada, Hiromasa Katoh, Kazuyoshi Satoh, Tohru Kobayashi, Tatsuya Kimura, Masato Hamamoto, Atsushi Shimizu, Kaoru Koyu
  • Patent number: 4940905
    Abstract: An ECL flip-flop circuit has a data holding differential transistor pair and a feedback circuit provided between the collectors and bases of this differential transistor pair. The feedback circuit includes a resistor connected between the bases of the data holding differential transistor pair, a pair of switching means for selectively terminating one end or the other of the resistor, and a pair of feedback transistors each adapted to receive at its base the collector potential of one transistor or the other of the differential transistor pair and to form an emitter follower circuit with the resistor selectively included therein. Thus, it is possible to prevent a malfunction of the ECl flip-flop circuit due to .alpha.-particles or the like.
    Type: Grant
    Filed: October 24, 1989
    Date of Patent: July 10, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Tohru Kobayashi, Masato Hamamoto, Toshio Yamada
  • Patent number: 4891531
    Abstract: An ECL flip-flop circuit has a data holding differential transistor pair and a feedback circuit provided between the collectors and bases of this differential transistor pair. The feedback circuit includes a resistor connected between the bases of the data holding differential transistor pair, a pair of switching means for selectively terminating one end or the other of the resistor, and a pair of feedback transistors each adapted to receive at its base the collector potential of one transistor or the other of the differential transistor pair and to form an emitter follower circuit with the resistor selectively included therein. Thus, it is possible to prevent a malfunction of the ECL flip-flop circuit due to .alpha.-particles or the like.
    Type: Grant
    Filed: October 12, 1988
    Date of Patent: January 2, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Tohru Kobayashi, Masato Hamamoto, Toshio Yamada
  • Patent number: 4868420
    Abstract: An improved flip-flop circuit is provided which prevents the occurrence of soft errors due to .alpha. rays and the like emitted from a trace amount of radioactive materials contained in a semiconductor package material. The flip-flop circuit has a first logic circuit which holds data and produces a first logic signal and a second logic circuit which produces a second logic signal. A logic gate receives the first and second logic signals that are produced from the first and second logic circuits and which have the same logic level. The output of the logic gate is input to the first logic circuit through a feedback loop which is provided between the output and the input of the first logic circuit and which includes the logic gate. According to the circuit construction of the present invention, a flip-flop circuit can be accomplished which is resistant to the radioactive rays such as .alpha. rays and does not cause soft errors.
    Type: Grant
    Filed: November 18, 1988
    Date of Patent: September 19, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Itoh, Masayoshi Yagyu, Toshio Yamada, Masaru Osanai, Akira Masaki, Mitsuo Usami, Tohru Kobayashi, Masato Hamamoto