Abstract: A rotary shaft includes a projection protruding from a rotor along an axial direction of the rotary shaft. The projection has an outer peripheral surface provided with teeth engaged with a gear. The rotor has a first portion which is located around the rotary shaft and which is fixed to the rotary shaft. The rotor has a second portion which is located at an end of the rotor, the end facing the projection. The second portion has an inner diameter larger than an inner diameter of the first portion.

Abstract: A motor unit for use in an electric bicycle, the motor unit including a motor configured to drive a wheel of the electric bicycle in rotation. The motor unit includes a shell which at least partially houses the motor. The motor includes a rotary shaft, a rotor coupled to the rotary shaft to rotate along with the rotary shaft, and a stator arranged to surround the rotor. The stator is partially resin-molded and has a metallic surface exposed on an outer periphery thereof. A pin is interposed between the shell and the stator.

Abstract: A motor unit for use in electric bicycles, the motor unit comprising: a motor having a rotary shaft; a unit case to house the rotary shaft partially; an input shaft arranged in the unit case to penetrate through the unit case and to be rotatable around an axis; an input body configured to rotate along with the input shaft; an output body configured to rotate around the axis upon receiving rotational force of the input body; and a control board housed in the unit case and configured to control rotation of the motor. The unit case includes: a first heat dissipating portion connected to a first surface of the control board; and a second heat dissipating portion connected to a second surface opposite from the first surface of the control board.

Abstract: A motor unit includes a substrate, a motor, and at least one conductive member. The substrate has a first surface and a second surface aligned in a thickness direction of the substrate. The motor includes at least one terminal, and in the thickness direction of the substrate, the motor is disposed closer to the second surface than to the first surface. The at least one conductive member is mounted on the first surface. The substrate has at least one through part which extends from the first surface through the second surface and in which the at least one terminal or the at least one conductive member is inserted. The at least one conductive member is at least partially deformable and is connected to the at least one terminal.

Abstract: A rotary shaft includes a projection protruding from a rotor along an axial direction of the rotary shaft. The projection has an outer peripheral surface provided with teeth engaged with a gear. The rotor has a first portion which is located around the rotary shaft and which is fixed to the rotary shaft. The rotor has a second portion which is located at an end of the rotor, the end facing the projection. The second portion has an inner diameter larger than an inner diameter of the first portion.

Abstract: An amplifying device includes: a comb-shaped transistor that includes a comb-shaped source electrode having a plurality of source fingers; one or more resistors connected between the source electrode and a ground; and a plurality of capacitors connected between the source electrode and the ground, wherein the capacitors are separated from each other and arranged in a direction in which the source fingers are arranged.

Abstract: A power amplifier includes a main amplifier, an auxiliary amplifier, and a control circuit. The main amplifier is configured to amplify input power, and the auxiliary amplifier is configured to amplify the input power when the input power exceeds a certain level. The control circuit, which is provided between a source of the main amplifier and a ground, is configured to control a source potential of the main amplifier so as to increase the source potential when the input power reaches at least a certain value.

Abstract: An antenna including an antenna electrode that transmits or receives microwaves, and a covering layer that supports an oxidation catalyst, that is formed from an inorganic material, and that covers the antenna electrode.

Abstract: A semiconductor device is configured including a p-type back barrier layer provided over a substrate and formed from a p-type nitride semiconductor in which Mg or Zn is doped, a nitride semiconductor stacked structure provided over the p-type back barrier layer, the nitride semiconductor stacked structure including an electron transit layer and an electron supply layer, a source electrode, a drain electrode and a gate electrode provided over the nitride semiconductor stacked structure, and a groove extending to the p-type back barrier layer.

Abstract: A power amplification apparatus which is a Doherty power amplification apparatus includes a main amplifier configured to amplify an input signal, and an auxiliary amplifier configured to amplify the input signal when a level of the input signal is higher than a predetermined level. The power amplification apparatus includes an auxiliary amplifier threshold value shift detector configured to detect a threshold value shift in the auxiliary amplifier; and an auxiliary amplifier bias voltage adjustment circuit configured to adjust a bias voltage of the auxiliary amplifier based on the detected threshold value shift in the auxiliary amplifier.

Abstract: A semiconductor device includes a carrier transit layer including a first region and second and third regions having a density of a donor impurity element higher than that of the first region, an InXAlYGa(1-X-Y)N (0<X<1, 0<Y<1, 0<X+Y?1) carrier supply layer provided over the carrier transit layer and having a density of a donor impurity element lower than that of the second and third regions, a source electrode provided over the second region, a drain electrode provided over the third region, and a gate electrode provided over the carrier supply layer between the source electrode and the drain electrode.

Abstract: A power amplifier includes a main amplifier, an auxiliary amplifier, and a control circuit. The main amplifier is configured to amplify input power, and the auxiliary amplifier is configured to amplify the input power when the input power exceeds a certain level. The control circuit, which is provided between a source of the main amplifier and a ground, is configured to control a source potential of the main amplifier so as to increase the source potential when the input power reaches at least a certain value.

Abstract: A semiconductor device is configured including a p-type back barrier layer provided over a substrate and formed from a p-type nitride semiconductor in which Mg or Zn is doped, a nitride semiconductor stacked structure provided over the p-type back barrier layer, the nitride semiconductor stacked structure including an electron transit layer and an electron supply layer, a source electrode, a drain electrode and a gate electrode provided over the nitride semiconductor stacked structure, and a groove extending to the p-type back barrier layer.

Abstract: A power amplification apparatus which is a Doherty power amplification apparatus includes a main amplifier configured to amplify an input signal, and an auxiliary amplifier configured to amplify the input signal when a level of the input signal is higher than a predetermined level. The power amplification apparatus includes an auxiliary amplifier threshold value shift detector configured to detect a threshold value shift in the auxiliary amplifier; and an auxiliary amplifier bias voltage adjustment circuit configured to adjust a bias voltage of the auxiliary amplifier based on the detected threshold value shift in the auxiliary amplifier.

Abstract: A semiconductor device includes a carrier transit layer including a first region and second and third regions having a density of a donor impurity element higher than that of the first region, an InXAlYGa(1-X-Y)N (0<X<1, 0<Y<1, 0<X+Y?1) carrier supply layer provided over the carrier transit layer and having a density of a donor impurity element lower than that of the second and third regions, a source electrode provided over the second region, a drain electrode provided over the third region, and a gate electrode provided over the carrier supply layer between the source electrode and the drain electrode.

Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type formed on one side of a semiconductor substrate; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer; a third semiconductor layer of the first conductivity type formed on the second semiconductor layer; an opening part formed by removing part of the first to third semiconductor layers; a gate insulating film formed so as to cover an inner wall of the opening part; a gate electrode formed inside the opening part via the gate insulating film; a source electrode formed on a surface of the third semiconductor layer; a drain electrode connected to a part corresponding to the gate electrode on another side of the semiconductor substrate; and a fourth electrode formed on the another side of the semiconductor substrate at a part corresponding to the source electrode.

Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type formed on one side of a semiconductor substrate; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer; a third semiconductor layer of the first conductivity type formed on the second semiconductor layer; an opening part formed by removing part of the first to third semiconductor layers; a gate insulating film formed so as to cover an inner wall of the opening part; a gate electrode formed inside the opening part via the gate insulating film; a source electrode formed on a surface of the third semiconductor layer; a drain electrode connected to a part corresponding to the gate electrode on another side of the semiconductor substrate; and a fourth electrode formed on the another side of the semiconductor substrate at a part corresponding to the source electrode.

Abstract: A semiconductor device includes an electron transit layer configured to be formed on a substrate; an electron supply layer configured to be formed on the electron transit layer; an upper surface layer configured to be formed on the electron supply layer; a gate electrode configured to be formed on the electron supply layer or the upper surface layer; a source electrode and a drain electrode configured to be formed on the upper surface layer; and first conductivity-type regions configured to be formed in the upper surface layer and the electron supply layer immediately below regions where the source electrode and the drain electrode are formed. The electron supply layer is formed of a nitride semiconductor including In. The upper surface layer is formed of a material including a nitride of one or more elements selected among B, Al, and Ga.

Abstract: A compound semiconductor device includes: a substrate; a nucleation layer over the substrate; a first buffer layer over the nucleation layer; a second buffer layer between the nucleation layer and the first buffer layer, the second buffer layer containing an acceptor impurity element or a donor impurity element at a higher concentration than the first buffer layer; a carrier transit layer in contact with the first buffer layer; a carrier supply layer over the carrier transit layer; and a gate electrode, a source electrode, and a drain electrode above the carrier supply layer.

Abstract: A semiconductor device is configured including a p-type back barrier layer provided over a substrate and formed front a p-type nitride semiconductor in which Mg or Zn is doped, a nitride semiconductor stacked structure provided over the p-type back barrier layer, the nitride semiconductor stacked structure including an electron transit layer and an electron supply layer, a source electrode, a drain electrode and a gate electrode provided over the nitride semiconductor stacked structure, and a groove extending to the p-type back barrier layer.