Patents by Inventor Masatoshi Hase

Masatoshi Hase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11349437
    Abstract: A power amplifier circuit includes power amplifiers connected in stages to amplify a high-frequency input signal and to output an amplified high-frequency output signal, bias circuits each of which outputs a bias current to a corresponding one of the power amplifiers, and a bias control circuit configured to output a bias control current based on a second reference potential that varies in response to power of the high-frequency output signal and that is a potential of a portion in one bias circuit of the bias circuits to one or more bias circuits in a stage preceding the one bias circuit for increasing a bias current outputted from the one or more bias circuits in the stage preceding the one bias circuit.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: May 31, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Publication number: 20220122901
    Abstract: A bond layer including at least one metal region in a plan view is disposed on a surface layer portion of a substrate formed from a semiconductor. A semiconductor element is disposed on the bond layer and includes a first transistor disposed on a first metal region that is a metal region as the at least one metal region of the bond layer and including a collector layer electrically coupled to the first metal region, a base layer disposed on the collector layer, and an emitter layer disposed on the base layer. A first emitter electrode is disposed on the emitter layer of the first transistor. A first conductor protrusion is disposed on the first emitter electrode. The thermal conductivity of the semiconductor material of the surface layer portion is higher than that of each of the collector layer, the base layer, and the emitter layer of the first transistor.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 21, 2022
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Shinnosuke TAKAHASHI, Masayuki AOIKE, Masatoshi HASE, Fumio HARIMA
  • Patent number: 11309849
    Abstract: Provided is a power amplifier circuit that can increase output power and also reduce the effect of intermodulation distortion. The power amplifier circuit includes a power divider, a distortion compensation circuit provided on the secondary path, a power combiner, and a first amplifier configured. The distortion compensation circuit includes a generation circuit configured to generate the second-harmonic wave of the input signal, a filter circuit configured to attenuate the fundamental wave and pass the second-harmonic wave, and a phase adjustment circuit configured to adjust the phase of the second-harmonic wave.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: April 19, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 11296656
    Abstract: A power amplifier module includes a combining circuit including a combiner. The combining circuit further includes a first inductor connected in series between an output terminal of a first amplifier and the combiner, a second inductor connected in series between an output terminal of a second amplifier and the combiner, and a second capacitor having an end connected to the combiner and another end grounded. A phase of a third signal from the output terminal of the first amplifier to the second amplifier through the combiner is delayed by about 45 degrees in the first inductor and the second capacitor, and is delayed by about 45 degrees in the second inductor and the second capacitor. A phase of the third signal from the output terminal of the first amplifier to the second amplifier through the first capacitor is advanced by about 90 degrees.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: April 5, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 11271530
    Abstract: A first transmission line and a second transmission line that are connected in series to each other are disposed at different positions in a thickness direction of a substrate. A third transmission line is disposed between the first transmission line and the second transmission line in the thickness direction of the substrate. The third transmission line includes a first end portion connected to one end portion of the first transmission line, and a second end portion that is AC-grounded. The first transmission line and the second transmission line are electromagnetically coupled to the third transmission line.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: March 8, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 11258406
    Abstract: A power amplifier circuit includes a first transistor, a second transistor, a first bias circuit supplying a first bias current or voltage, a second bias circuit supplying a second bias current or voltage, a first inductor, and a first capacitor. A power supply voltage is supplied to a collector of the first transistor, and an emitter thereof is grounded. A radio frequency signal and the first bias current or voltage are supplied to a base of the first transistor. The power supply voltage is supplied to a collector of the second transistor, and an emitter thereof is connected to the collector of the first transistor via the first capacitor and is grounded via the first inductor. The second bias current or voltage is supplied to a base of the second transistor. An amplified radio frequency signal is output from the collector of the second transistor.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: February 22, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Masatoshi Hase, Yuri Honda, Kazuo Watanabe, Takashi Soga
  • Publication number: 20220021350
    Abstract: A power amplifier module includes a first amplifier that amplifies a power level of a first input signal in a predetermined frequency band and outputs a first signal of a first power level; a first impedance transformer connected to the first amplifier and including a transmission line transformer; a second amplifier that amplifies a power level of a second input signal in the predetermined frequency band and outputs a second signal of the first power level; a second impedance transformer connected to the second amplifier and including a transmission line transformer; and a combiner that combines the first signal inputted through the first impedance transformer and the second signal inputted through the second impedance transformer into an output signal of a second power level larger than the first power level and includes a transmission line transformer.
    Type: Application
    Filed: July 15, 2021
    Publication date: January 20, 2022
    Inventors: Masatoshi HASE, Hitoshi AKAMINE
  • Publication number: 20210320628
    Abstract: A power amplification module includes: a first bipolar transistor in which a radio frequency signal is input to a base and an amplified signal is output from a collector; a second bipolar transistor that is thermally coupled with the first bipolar transistor and that imitates operation of the first bipolar transistor; a third bipolar transistor in which a first control voltage is supplied to a base and a first bias current is output from an emitter; a first resistor that generates a third control voltage corresponding to a collector current of the second bipolar transistor at a second terminal; and a fourth bipolar transistor in which a power supply voltage is supplied to a collector, the third control voltage is supplied to a base, and a second bias current is output from an emitter.
    Type: Application
    Filed: June 23, 2021
    Publication date: October 14, 2021
    Inventor: Masatoshi HASE
  • Patent number: 11070175
    Abstract: A power amplification module includes: a first bipolar transistor in which a radio frequency signal is input to a base and an amplified signal is output from a collector; a second bipolar transistor that is thermally coupled with the first bipolar transistor and that imitates operation of the first bipolar transistor; a third bipolar transistor in which a first control voltage is supplied to a base and a first bias current is output from an emitter; a first resistor that generates a third control voltage corresponding to a collector current of the second bipolar transistor at a second terminal; and a fourth bipolar transistor in which a power supply voltage is supplied to a collector, the third control voltage is supplied to a base, and a second bias current is output from an emitter.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: July 20, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Publication number: 20210135657
    Abstract: An active balun circuit includes first and second transistors having emitters electrically coupled to each other and configured to output differential signals and a circuit element coupled between the connection point of the emitter of the first transistor and the emitter of the second transistor and a reference potential. The impedance of the circuit element at a particular frequency of the input signal appears significantly larger than impedances at other frequencies. An input signal from an input terminal is inputted to the base of the first transistor. The reference potential is applied to the base of the second transistor. A supply voltage is applied to the collector of the first transistor and the collector of the second transistor. A signal from the collector of the first transistor and a signal from the collector of the second transistor are outputted as the differential signals.
    Type: Application
    Filed: November 5, 2020
    Publication date: May 6, 2021
    Inventors: Takayuki TSUTSUI, Satoshi TANAKA, Kiichiro TAKENAKA, Masatoshi HASE
  • Publication number: 20210083633
    Abstract: A first transmission line and a second transmission line that are connected in series to each other are disposed at different positions in a thickness direction of a substrate. A third transmission line is disposed between the first transmission line and the second transmission line in the thickness direction of the substrate. The third transmission line includes a first end portion connected to one end portion of the first transmission line, and a second end portion that is AC-grounded. The first transmission line and the second transmission line are electromagnetically coupled to the third transmission line.
    Type: Application
    Filed: November 6, 2020
    Publication date: March 18, 2021
    Inventor: Masatoshi HASE
  • Patent number: 10917057
    Abstract: A power amplifier circuit includes a first transistor, wherein a radio frequency signal is inputted to a base or gate of the first transistor; a second transistor having an emitter connected to a collector or drain of the first transistor, wherein a first voltage is supplied to a collector of the second transistor, and a first amplified signal obtained by amplifying the radio frequency signal is outputted from the collector of the second transistor; and a third transistor configured to supply a bias voltage to a base of the second transistor. A second voltage is supplied to a collector or drain of the third transistor, a third voltage corresponding to the first voltage is supplied to a base or gate of the third transistor, and the bias voltage, which corresponds to the third voltage, is supplied from an emitter or source of the third transistor.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: February 9, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hidetoshi Matsumoto, Satoshi Tanaka, Masatoshi Hase
  • Publication number: 20200358403
    Abstract: A power amplifier circuit includes power amplifiers connected in stages to amplify a high-frequency input signal and to output an amplified high-frequency output signal, bias circuits each of which outputs a bias current to a corresponding one of the power amplifiers, and a bias control circuit configured to output a bias control current based on a second reference potential that varies in response to power of the high-frequency output signal and that is a potential of a portion in one bias circuit of the bias circuits to one or more bias circuits in a stage preceding the one bias circuit for increasing a bias current outputted from the one or more bias circuits in the stage preceding the one bias circuit.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 12, 2020
    Inventor: Masatoshi HASE
  • Publication number: 20200350874
    Abstract: Provided is a power amplifier circuit that can increase output power and also reduce the effect of intermodulation distortion. The power amplifier circuit includes a power divider, a distortion compensation circuit provided on the secondary path, a power combiner, and a first amplifier configured. The distortion compensation circuit includes a generation circuit configured to generate the second-harmonic wave of the input signal, a filter circuit configured to attenuate the fundamental wave and pass the second-harmonic wave, and a phase adjustment circuit configured to adjust the phase of the second-harmonic wave.
    Type: Application
    Filed: July 22, 2020
    Publication date: November 5, 2020
    Inventor: Masatoshi HASE
  • Publication number: 20200350873
    Abstract: A power amplifier module includes a combining circuit including a combiner. The combining circuit further includes a first inductor connected in series between an output terminal of a first amplifier and the combiner, a second inductor connected in series between an output terminal of a second amplifier and the combiner, and a second capacitor having an end connected to the combiner and another end grounded. A phase of a third signal from the output terminal of the first amplifier to the second amplifier through the combiner is delayed by about 45 degrees in the first inductor and the second capacitor, and is delayed by about 45 degrees in the second inductor and the second capacitor. A phase of the third signal from the output terminal of the first amplifier to the second amplifier through the first capacitor is advanced by about 90 degrees.
    Type: Application
    Filed: July 16, 2020
    Publication date: November 5, 2020
    Inventor: Masatoshi HASE
  • Publication number: 20200343863
    Abstract: Provided is a power amplifier circuit that reduces the effect of intermodulation distortion without necessarily increase in the circuit size. The power amplifier circuit includes a first amplifier that amplifies a first signal and output a second signal, an extraction circuit that extracts a second-harmonic wave included in the second signal, a phase adjustment circuit that adjusts the phase of the extracted second-harmonic wave, and a power combiner that combines the second-harmonic wave of the adjusted phase with a third signal and output the first signal.
    Type: Application
    Filed: July 14, 2020
    Publication date: October 29, 2020
    Inventor: Masatoshi HASE
  • Publication number: 20200304071
    Abstract: A power amplifier circuit includes an amplifier that receives an input signal with an alternating current and outputs an output signal obtained by amplifying power of the input signal to a first node; an inductive element that is connected between the first node and a second node; and a variable capacitor that is connected between the second node and a reference potential, and whose electrostatic capacitance increases as power of the output signal increases.
    Type: Application
    Filed: June 10, 2020
    Publication date: September 24, 2020
    Inventors: Satoshi Tanaka, Masatoshi HASE, Norio HAYASHI, Kazuo WATANABE, Yuuri HONDA
  • Patent number: 10778262
    Abstract: A power amplification module includes a first amplification transistor that receives a first signal outputs an amplified second signal from the collector thereof; and a bias circuit that supplies a bias current to the base of the first amplification transistor. The first bias circuit includes a first transistor that is diode connected and is supplied with a bias control current; a second transistor that is diode connected, the collector thereof being connected to the emitter of the first transistor; a third transistor, the base thereof being connected to the base of the first transistor, and the bias current being output from the emitter thereof; a fourth transistor, the collector thereof being connected to the emitter of the third transistor and the base thereof being connected to the base of the second transistor; and a first capacitor between the base and the emitter of the third transistor.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: September 15, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 10756681
    Abstract: A power amplifier module includes a combining circuit including a combiner. The combining circuit further includes a first inductor connected in series between an output terminal of a first amplifier and the combiner, a second inductor connected in series between an output terminal of a second amplifier and the combiner, and a second capacitor having an end connected to the combiner and another end grounded. A phase of a third signal from the output terminal of the first amplifier to the second amplifier through the combiner is delayed by about 45 degrees in the first inductor and the second capacitor, and is delayed by about 45 degrees in the second inductor and the second capacitor. A phase of the third signal from the output terminal of the first amplifier to the second amplifier through the first capacitor is advanced by about 90 degrees.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: August 25, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 10749482
    Abstract: A power amplification circuit includes: a first amplifier that is input with a first signal and outputs a second signal; a bias circuit that supplies a bias current or voltage to the first amplifier; and a control voltage generating circuit that generates a control voltage in accordance with the first signal. The bias circuit includes a first transistor that outputs the bias current or voltage, a second transistor provided between the emitter or source of the first transistor and ground, and a third transistor that is supplied with the control voltage and that supplies a first current or voltage to the second transistor. The value of the first current or voltage when the signal level is a first level is larger than the value of the first current or voltage when the signal level is a second level. The first level is higher than the second level.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: August 18, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase