Patents by Inventor Masatoshi Yasunaga

Masatoshi Yasunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5096853
    Abstract: A lead frame includes a die pad for mounting thereon a semiconductor chip having a plurality of electrodes, a plurality of leads for electrical connection with the plurality of electrodes of the semiconductor chip, an outer frame disposed on the periphery of the die pad for supporting the die pad and the plurality of leads, and a resin guide portion extending to the vicinity of the die pad from the outer frame for guiding a molten resin over and under the semiconductor chip during resin packaging. A semiconductor device manufacturing method includes mounting a semiconductor chip having electrodes on a substrate having a resin guiding portion for guiding a resin over and under the semiconductor chip during resin packaging; electrically connecting leads on the substrate to the electrodes positioning the semiconductor chip and the substrate between a pair of mold halves injecting a molten resin into the mold and solidifying the resin.
    Type: Grant
    Filed: March 4, 1991
    Date of Patent: March 17, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masatoshi Yasunaga, Masanobu Kohara
  • Patent number: 5075240
    Abstract: A conductive resist film is used as a mask in ion implantation. A portion of the conductive resist film is electrically connected to a semiconductor substrate. The charge of ions which enter the conductive resist film in ion implantation flows into the semiconductor substrate and dissipates therein.
    Type: Grant
    Filed: April 17, 1990
    Date of Patent: December 24, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yomiyuki Yama, Masatoshi Yasunaga, Katsuyoshi Mitsui, Ikuo Ogoh
  • Patent number: 5018003
    Abstract: A lead frame includes a die pad for mounting thereon a semiconductor chip having a plurality of electrodes, a plurality of leads for electrical connection with the plurality of electrodes of the semiconductor chip, an outer frame disposed on the periphery of the die pad for supporting the die pad and the plurality of leads, and a resin guide portion extending to the vicinity of the die pad from the outer frame for guiding molten resin over and under the semiconductor chip during resin packaging. A semiconductor device manufacturing method includes mounting a semiconductor chip having electrodes on a substrate having a resin guiding portion for guiding a resin over and under the semiconductor chip during resin packaging; electrically connecting leads on the substrate to the electrodes; positioning the semiconductor chip and the substrate between a pair of mold halves injecting a molten resin into the mold to fill the cavity; and solidifying the resin.
    Type: Grant
    Filed: August 21, 1990
    Date of Patent: May 21, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masatoshi Yasunaga, Masanobu Kohara