Patents by Inventor Masaya Okada
Masaya Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170362553Abstract: Provided is a cell analyzer including: a light source unit configured to apply light to test cells each containing first substances which are bound to first fluorescent dyes and which serve as an index for therapeutic strategy judgement; an image capturing unit configured to capture an image of fluorescence caused by the light; a processing unit configured to process the image obtained by the image capturing unit; and a display unit configured to display a process result obtained by the processing unit, wherein the processing unit obtains a first image by performing an inactivation process of quenching the first fluorescent dyes, an activation process of activating a part of the first fluorescent dyes that have been quenched, and an image capturing process of capturing, by means of the image capturing unit, an image of the fluorescence by applying light from the light source unit to each test cell; extracts bright points based on the first fluorescent dyes on the basis of the first image; classifies the extraType: ApplicationFiled: September 5, 2017Publication date: December 21, 2017Inventors: Kanako MASUMOTO, Takuya KUBO, Shigeki IWANAGA, Masaya OKADA
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Publication number: 20170338366Abstract: A number of micro-sized rectangular dot-like n-type semiconductor regions 121 are created in a p-type semiconductor region which is a base body 11. Contact parts 14, each of which is in contact with one n-type semiconductor region 121 and almost entirely covers the same region, are mutually connected by a wire part 15 as a common cathode terminal. The n-type semiconductor regions 121 receives no light; their function is to collect carriers generated within and outside the surrounding depletion layers. Appropriate setting of the spacing of the n-type semiconductor regions 121 enables efficient collection of the carriers generated in the p-type semiconductor region while improving the SN ratio of the photo-detection signal by a noise-reduction effect due to a decrease in the p-n junction capacitance. Carriers originating from light of shorter wavelengths are barely reflected in the photo-detection signal. Thus, unfavorable influences of the shorter wavelengths of light are eliminated.Type: ApplicationFiled: October 17, 2016Publication date: November 23, 2017Applicant: MICRO SIGNAL CO., LTD.Inventors: Kunihiro WATANABE, Masaya OKADA, Kazunori NOHARA
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Publication number: 20170301759Abstract: A stacked body includes: a substrate made of silicon carbide and having a first main surface forming an angle of 20° or less with a carbon plane; and a graphene film disposed on the first main surface and having an atomic arrangement oriented in relation to an atomic arrangement of silicon carbide forming the substrate. In an exposed surface of the graphene film as seen in plan view, 10 or less regions are present per 1 mm2, the exposed surface being a main surface opposite to the substrate, and the regions each including 10 or more graphene layers and having a circumcircle with a diameter of 5 ?m or more and 100 ?m or less. Accordingly, the stacked body is provided that enables a high mobility to be stably ensured in an electronic device manufactured to include the graphene film forming an electrically conductive portion.Type: ApplicationFiled: April 19, 2017Publication date: October 19, 2017Inventors: Masaya Okada, Fuminori Mitsuhashi, Masaki Ueno, Yasunori Tateno, Maki Suemitsu, Hirokazu Fukidome
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Publication number: 20170301758Abstract: A stacked body includes: a substrate made of silicon carbide and having a first main surface forming an angle of 20° or less with a silicon plane; and a graphene film disposed on the first main surface and having an atomic arrangement oriented in relation to an atomic arrangement of silicon carbide forming the substrate. In an exposed surface of the graphene film which is a main surface opposite to the substrate, an area ratio of a region having a full width at half maximum of G? of 40 cm?1 or less under Raman spectroscopy analysis is 50% or more. Accordingly, the stacked body is provided that enables a high mobility to be stably ensured in an electronic device manufactured to include the graphene film forming an electrically conductive portion.Type: ApplicationFiled: April 19, 2017Publication date: October 19, 2017Inventors: Masaya Okada, Fuminori Mitsuhashi, Yasunori Tateno, Masaki Ueno, Maki Suemitsu, Hirokazu Fukidome
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Publication number: 20170261744Abstract: An optical device comprises a shared phase modulation mask configured to impart a first phase modulation to light of a first wavelength, and imparts a second phase modulation to light of a second wavelength, an irradiation optical system configured to cause the light of the first wavelength and the light of the second wavelength to enter the same incident region in the phase modulation mask, and a light collecting optical system configured to collect the light of the first phase-modulated first wavelength and the light of the second phase-modulated second wavelength to form an image corresponding to a point spread function.Type: ApplicationFiled: March 9, 2017Publication date: September 14, 2017Inventors: Masaya OKADA, Shigeki IWANAGA
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Publication number: 20170263453Abstract: A substrate includes: a support substrate having a first main surface and a surface layer region which includes at least the first main surface and is formed of any one material selected from the group consisting of boron nitride, molybdenum disulfide, tungsten disulfide, niobium disulfide, and aluminum nitride; and a graphene film disposed on the first main surface and having an atomic arrangement oriented in relation to an atomic arrangement of the material forming the surface layer region. Accordingly, the substrate is provided that enables a high mobility to be stably ensured in an electronic device manufactured to include the graphene film forming an electrically conductive portion.Type: ApplicationFiled: March 9, 2017Publication date: September 14, 2017Inventors: Masaya Okada, Fuminori Mitsuhashi, Yasunori Tateno, Masaki Ueno
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Publication number: 20170186173Abstract: A method comprises obtaining a first cell image of a cell by a first observation method, obtaining a second cell image of the cell by a second observation method that is different from the first observation method, and determining the region of the cell based on the first cell image and the second cell image.Type: ApplicationFiled: December 27, 2016Publication date: June 29, 2017Inventors: Kazumi HAKAMADA, Yuki AIHARA, Masaya OKADA, Toshiyuki SATO, Ichiro SEKIYA, Eiji KOBAYASHI
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Publication number: 20170082531Abstract: A particle imaging device comprises a flow cell, a light source, an irradiation optical system configured to form a light sheet on the flow cell, a light collecting optical system and an imaging element. The sheet surface of the light sheet is perpendicular to the exterior side surface of the flow cell to which the light is entered from the light source. The sheet surface of the light sheet is inclined at a predetermined angle that is not perpendicular to the flow direction of the sample.Type: ApplicationFiled: September 16, 2016Publication date: March 23, 2017Inventors: Masaya OKADA, Shigeki IWANAGA
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Publication number: 20160372609Abstract: A Schottky barrier diode includes a semiconductor layer, a Schottky electrode on a first main surface of the semiconductor layer, the Schottky electrode being in Schottky contact with the semiconductor layer, and an ohmic electrode on a second main surface of the semiconductor layer opposite the first main surface, the ohmic electrode being in ohmic contact with the semiconductor layer. The semiconductor layer contains gallium nitride or silicon carbide. The semiconductor layer includes a drift layer. The drift layer has a thickness of 2 ?m or less.Type: ApplicationFiled: June 17, 2016Publication date: December 22, 2016Inventors: Makoto Kiyama, Masaya Okada, Susumu Yoshimoto, Masaki Ueno
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Publication number: 20160304120Abstract: A traveling path estimation apparatus includes a calculation section that calculates a traveling marking line marking a lane of a road, on which a vehicle runs, based on a front image acquired by a camera mounted in the vehicle, an estimation section that estimates road parameters including a curvature and a curvature change rate of the lane, the estimation section estimating the road parameters at current time based on the traveling marking line calculated by the calculation section and the road parameters previously estimated, a determination section that determines departure of the vehicle from a curve of the lane, and a reset section that, when the determination section determines the departure of the vehicle, resets at least the curvature change rate included in the road parameters previously estimated by the estimation section.Type: ApplicationFiled: April 12, 2016Publication date: October 20, 2016Inventors: Masaya Okada, Naoki Kawasaki, Shunsuke Suzuki
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Publication number: 20160098605Abstract: In a lane boundary line information acquiring device, a detection unit detects lane boundary lines. A driving environment acquiring unit acquires a driving environment. A probability information acquiring unit acquires probability information containing a probability of presence of a lane boundary line, etc. based on the detected lane boundary lines and the acquired driving environment. A position information acquiring unit acquires position information of the own vehicle. A memory unit associates the probability information with the position information of the own vehicle. Where the position information is acquired by the position information acquiring unit at a time when the probability information acquiring unit acquires the probability information, and stores the probability information associated with the position information into the memory unit. A readout unit reads out the probability information associated with the position information at a location in front of the own vehicle.Type: ApplicationFiled: October 1, 2015Publication date: April 7, 2016Inventors: Masaya Okada, Naoki Kawasaki, Yusuke Ueda, Masao Oooka, Shotaro Fukuda
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Publication number: 20150285614Abstract: In a travel path estimation apparatus, a calculating unit calculates coordinates of edge points configuring a division line on a travel path, from an image captured by an on-board camera. An estimating unit estimates a travel path parameter of a state of the travel path and a shape of the travel path using a predetermined filter, based on the calculated coordinates of edge points. A setting unit sets a filter parameter of the predetermined filter of responsiveness of estimation of the travel path parameter. A detecting unit detects a sharp curve based on information giving advance notice of a sharp curve before the vehicle enters the sharp curve. The setting unit sets the filter parameter so that the responsiveness increases from that before detection of the sharp curve, during a period from detection of the sharp curve until the vehicle enters the sharp curve.Type: ApplicationFiled: April 2, 2015Publication date: October 8, 2015Inventors: MASAYA OKADA, NAOKI KAWASAKI, SYUNYA KUMANO, SHUNSUKE SUZUKI, TETSUYA TAKAFUJI
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Patent number: 8981428Abstract: There are provided a semiconductor device in which a drain leak current can be reduced in the transistor operation while high vertical breakdown voltage is achieved and a method for producing the semiconductor device. In the semiconductor device, an opening 28 that extends from an n+-type contact layer 8 and reaches an n-type drift layer 4 through a p-type barrier layer 6 is formed. The semiconductor device includes a regrown layer 27 located so as to cover portions of the p-type barrier layer 6 and the like that are exposed to the opening, the regrown layer 27 including an undoped GaN channel layer 22 and a carrier supply layer 26; an insulating layer 9 located so as to cover the regrown layer 27; and a gate electrode G located on the insulating layer 9. In the p-type barrier layer, the Mg concentration A (cm?3)and the hydrogen concentration B (cm?3) satisfy 0.1<B/A<0.9 . . . (1).Type: GrantFiled: July 6, 2011Date of Patent: March 17, 2015Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yu Saitoh, Masaya Okada, Masaki Ueno, Makoto Kiyama
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Patent number: 8969920Abstract: A vertical semiconductor device in which pinch-off characteristics and breakdown voltage characteristics can be stably improved by fixing the electric potential of a p-type GaN barrier layer with certainty is provided. The semiconductor device includes a GaN-based stacked layer having an opening, a regrown layer including a channel located so as to cover a wall surface of the opening, an n+-type source layer that is in ohmic contact with the source electrode, a p-type GaN barrier layer, and a p+-type GaN-based supplementary layer located between the p-type GaN barrier layer and the n+-type source layer. The p+-type GaN-based supplementary layer and the n+-type source layer form a tunnel junction to fix the electric potential of the p-type GaN barrier layer at a source potential.Type: GrantFiled: July 6, 2011Date of Patent: March 3, 2015Assignee: Sumitomo Electric Industries, Ltd.Inventors: Makoto Kiyama, Yu Saitoh, Masaya Okada, Masaki Ueno, Seiji Yaegashi, Kazutaka Inoue, Mitsunori Yokoyama
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Patent number: 8941174Abstract: It is an object to improve the breakdown voltage characteristics of a vertical semiconductor device having an opening and including a channel formed of two-dimensional electron gas in the opening. A GaN-based stacked layer 15 includes n?-type GaN drift layer 4/p-type GaN barrier layer 6/n+-type GaN contact layer 7. An opening 28 extends from a top layer and reaches the n?-type GaN drift layer 4. The semiconductor device includes a regrown layer 27 located so as to cover a wall surface and a bottom portion of the opening, the regrown layer 27 including an electron drift layer 22 and an electron source layer 26, a source electrode S located around the opening, a gate electrode G located on the regrown layer in the opening, and a bottom insulating layer 37 located in the bottom portion of the opening.Type: GrantFiled: October 17, 2011Date of Patent: January 27, 2015Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masaya Okada, Makoto Kiyama, Yu Saitoh, Seiji Yaegashi, Mitsunori Yokoyama, Kazutaka Inoue
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Patent number: 8896058Abstract: It is an object to improve the breakdown voltage characteristics of a vertical semiconductor device having an opening and including a channel formed of two-dimensional electron gas in the opening. The vertical semiconductor device includes a GaN-based stacked layer 15 having an opening 28 and the GaN-based stacked layer 15 includes n-type GaN-based drift layer 4/p-type GaN-based barrier layer 6/n-type GaN-based contact layer 7. The vertical semiconductor device includes a regrown layer 27 located so as to cover the opening, the regrown layer 27 including an electron drift layer 22 and an electron supply layer 26, a source electrode S, and a gate electrode G located on the regrown layer. The gate electrode G covers a portion having a length corresponding to the thickness of the p-type GaN-based barrier layer and is terminated at a position on the wall surface, the position being away from the bottom portion of the opening.Type: GrantFiled: October 5, 2011Date of Patent: November 25, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masaya Okada, Makoto Kiyama, Yu Saitoh, Seiji Yaegashi, Mitsunori Yokoyama, Kazutaka Inoue
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Patent number: 8890239Abstract: In a vertical semiconductor device including a channel in an opening, a semiconductor device whose high-frequency characteristics can be improved and a method for producing the semiconductor device are provided. The semiconductor device includes n-type GaN-based drift layer 4/p-type GaN-based barrier layer 6/n-type GaN-based contact layer 7. An opening 28 extends from a top layer and reaches the n-type GaN-based drift layer. The semiconductor device includes a regrown layer 27 located so as to cover the opening, the regrown layer 27 including an electron drift layer 22 and an electron supply layer 26, a source electrode S, a drain electrode D, and a gate electrode G located on the regrown layer. Assuming that the source electrode serving as one electrode and the drain electrode serving as the other electrode constitute a capacitor, the semiconductor device includes a capacitance-decreasing structure that decreases the capacitance of the capacitor.Type: GrantFiled: July 26, 2011Date of Patent: November 18, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Seiji Yaegashi, Makoto Kiyama, Mitsunori Yokoyama, Kazutaka Inoue, Masaya Okada, Yu Saitoh
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Patent number: 8816398Abstract: There is provided a vertical GaN-based semiconductor device in which the on-resistance can be decreased while the breakdown voltage characteristics are improved using a p-type GaN barrier layer. The semiconductor device includes a regrown layer 27 including a channel located on a wall surface of an opening 28, a p-type barrier layer 6 whose end face is covered, a source layer 7 that is in contact with the p-type barrier layer, a gate electrode G located on the regrown layer, and a source electrode S located around the opening. In the semiconductor device, the source layer has a superlattice structure that is constituted by a stacked layer including a first layer (a layer) having a lattice constant smaller than that of the p-type barrier layer and a second layer (b layer) having a lattice constant larger than that of the first layer.Type: GrantFiled: July 6, 2011Date of Patent: August 26, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Makoto Kiyama, Yu Saitoh, Masaya Okada, Seiji Yaegashi, Kazutaka Inoue, Mitsunori Yokoyama
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Publication number: 20140203329Abstract: Provided is a nitride electronic device having a structure that allows the reduction of leakage by preventing the carrier concentration from increasing in a channel layer. An inclined surface and a primary surface of a semiconductor stack extend along first and second reference planes R1, R2, respectively. The primary surface of the stack is inclined at an angle ranging from 5 to 40 degrees with respect to a reference axis indicating a c-axis direction of hexagonal group III nitride. An axis normal to the plane R1 and the axis form an angle smaller than the angle an axis normal to the plane R2 and the axis form. The oxygen concentration of the channel layer is lower than 1×1017 cm?3. It becomes possible to avoid increase in carrier concentration of the channel layer caused by the oxygen addition, thereby reducing leakage current via the channel layer in the transistor.Type: ApplicationFiled: June 3, 2011Publication date: July 24, 2014Applicant: Summitomo Electric Industries, Ltd.Inventors: Yu Saitoh, Masaya Okada, Yusuke Yoshizumi, Makoto Kiyama, Masaki Ueno, Koji Katayama, Takao Nakamura
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Patent number: 8729562Abstract: There are provided a high current semiconductor device that has low on-resistance, high mobility, and good pinch-off characteristics and in which a kink phenomenon is not easily caused even if a drain voltage is increased, and a method for producing the semiconductor device. The semiconductor device of the present invention includes a GaN-based layered body 15 having an opening 28, a regrown layer 27 including a channel, a gate electrode G, a source electrode S, and a drain electrode D. The regrown layer 27 includes an electron transit layer 22 and an electron supply layer 26. The GaN-based layered body includes a p-type GaN layer 6 whose end surface is covered by the regrown layer in the opening, and a p-side electrode 11 that is in ohmic contact with the p-type GaN layer is disposed.Type: GrantFiled: June 24, 2010Date of Patent: May 20, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masaya Okada, Makoto Kiyama