Abstract: An intraframe time-division multiplexing type display device prevents prominent image defects, such as flicker, and affords a high-quality image display. A single frame of an image is displayed while changing a gray-scale level thereof by means of a number of sub-frames, each sub-frame comprising at least an address period and a sustained discharge period; further, the sub-frames have respective, mutually different sustained discharge periods. A gray-scale level adjustment unit arbitrarily sets the selection sequence of each of the number of sub-frames within an individual frame that is to be in a sustained discharge state.

Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of sub fields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 through SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.

Abstract: The present invention relates to a plasma display device which limits a generation of electromagnetic wave. The plasma display device has first and second drive circuits for applying a drive voltage to first and second display electrode pair. Further, a direction of a charge current flowing at said first display electrode pair when said drive voltage is applied by said first drive circuit is opposite on said plasma display panel to a direction of a charge current flowing at said second display electrode pair when said drive voltage is applied by said second drive circuit. According to the present invention, a transitional charge/discharge current, which is generated upon the application of a drive voltage to one of the display electrodes, and a light emission discharge current flow in opposite directions on the panel. Thus, electromagnetic waves that are generated by the inductances of the display electrode pair cancel each other out.

Abstract: A panel display has a display panel including a plurality of cells to be selectively discharged to an address driver for setting the plurality of cells to states represented by display data. The panel display also has a display glowing driver for enabling the plurality of cells to glow according to the set states. One frame during which one screen is displayed has a plurality of sub-frames and glowing periods within the sub-frames, during which the display cells are enabled to glow by the display glowing driver. The said sub-frames are weighted in order to achieve gray-scale display. The display panel also has a display load calculating circuit for calculating a display load to be imposed on a whole display surface during each sub-frame. In addition, a corrected period calculating circuit calculates a corrected period of a glowing period, during which the display cells are enabled to glow by the display glowing driver according to display loads to be imposed during each sub-frame.

Abstract: A display panel has a plurality of cells to be selectively discharged to glow, an addressing unit for setting the plurality of cells to states represented by display data, and a display glowing unit for enabling the plurality of cells to glow according to set states. A display data quantity counter exists for each line that detects display data to be displayed line by line and counts the number of bits as a quantity of detected display data. A frequency of sustaining discharge is set line by line on the basis of the quantity of display data per line which is provided by the display data quantity counter.

Abstract: The plasma display device has a plasma display panel and a driving part for driving the plasma display panel in a subframe mode. The driving part has a circuit for calculating the length of one frame based on one period of a vertical synchronizing signal introduced along with an image signal from an external device, a circuit for calculating the total number of sustaining pulses contained in one frame based on a brightness information contained in the image signal, and a circuit for calculating the length of one driving period required for displaying one frame. The length of one frame and the length of one driving period thus obtained are then compared in a comparing circuit. If the one frame length is found to be shorter than the one driving length, the total number of sustaining pulses or the number of scan lines will be reduced so that the one frame length becomes shorter than the length of one driving period, thus avoiding an extraordinary display.

Abstract: An image processing device has an error distribution unit, and a multiplier. The error distribution unit carries out an error distribution operation to artificially increase the number of shades to be displayed on a display. The multiplier multiplies an input signal by a multiplication coefficient, so that the input signal is separated into display data and error data along a bit boundary and the error distribution operation is carried out on the input signal. Further, a semiconductor integrated circuit has a dither pattern generator, an adder, and an error distribution unit. The dither pattern generator stores a plurality of dither patterns in advance and receives an input image signal, the adder receives the input image signal and a pattern signal from the dither pattern generator, and the error distribution unit carries out an error distribution operation on the output of the adder. Therefore, the image processing device can realize a smooth display characteristic for the entire range of input shades.

Abstract: A wave generation circuit is disclosed, in which a complex waveform can be generated without increasing the ROM data amount or increasing the reading rate. Waveform data relating to a waveform and the generation thereof are stored in a ROM for each cycle. An address signal for reading the waveform data sequentially is produced sequentially by an address generation circuit. The waveform data read out are sequentially reproduced into a waveform signal by a waveform data output circuit. In a wave generating circuit including the ROM and the address generation circuit, the waveform data includes the extension information instructing to extend and reproduce the waveform data for a particular cycle.

Abstract: A PDP not posing the problem that previous display data appears at the time of activation, and a wave generating circuit capable of generating a complex wave without the necessity of expanding a quantity of ROM data and of increasing a reading speed have been disclosed. A plasma display panel display comprising a plasma display panel that includes a plurality of cells to be selectively discharged to glow, a reset unit for bringing the plurality of cells to a given state, an addressing unit for setting the plurality of cells to states associated with display data, and a sustaining discharge unit for enabling the plurality of cells to glow according to the set states further comprises an operation halt factor detector for detecting the fact that a factor of halting the operation of the plasma display panel has occurred, and an initialization unit that when it is detected that the operation halt factor has occurred, initializes memory information in the plasma display panel.

Abstract: A flat display comprising an address current detecting means 3 for detecting a value of address current consumed for each frame to be displayed on the flat display, a comparator 4 for comparing the address current value detected by the address current detecting means 3 with a given reference value, and an address frequency control means 5 for controlling address frequencies related to a display frame in response to the output of the comparator 4.

Abstract: In a plasma display panel, an analogue brightness value given by a variable resistor is periodically converted into a digital brightness value and stored in a memory. A digital brightness value of a current period is compared with the digital brightness value of the next preceding period stored in the memory, to produce a difference brightness value which is compared with a predetermined brightness value and, if larger than the predetermined value, the brightness value stored in the memory is updated. Alternatively, power consumption of a display device is detected and, when the power consumption is larger than a set point, a brightness value is gradually decreased and, when the power consumption is smaller than the set point, the brightness value is gradually adjusted to a brightness set value.

Abstract: A method of controlling the gray scale of a plasma display device has a forming step of forming a frame for an image by a plurality of subframes each having a different brightness, a setting step of setting the number of sustain emissions of each subframe in an anti-geometrical progression corresponding to the brightness of each subframe, and a displaying step of displaying the image on the plasma display device by a gray scale display having a specific brightness. The number of sustain emissions in each subframe is set individually by the each subframe, and this establishes a linear relation between the gray level and the corresponding brightness Therefore, an enhancement of display quality of the plasma display device can be realized.

Abstract: A display device, for displaying a multiple-level gray scale picture through a frame having a plurality of sub-frames which are time-divided in accordance with weight value of gray scale for each sub-frame, comprises sub-frame selection circuit, being supplied with an vertical synchronization signal, for selecting the number of the sub-frames which can be displayed within the period for the single frame in accordance with the frequency of the vertical synchronization signal, and for providing a sub-frame selection signal corresponding to the number of the sub-frames; and display control circuit, operatively connected to the sub-frame selection circuit, for receiving the sub-frame selection signal and an input display data signal and for controlling said display of the multi-level gray scale picture in accordance with the selected number of the sub-frames. When the frequency of Vsync.

Abstract: In a flat display, an address current detecting unit detects a value of address current consumed during each display frame, a comparator compares the address current value detected by the address current detecting unit with a given reference value, and an address-frequency control unit controls address frequencies related to the display frame in response to the output of the comparator.