Patents by Inventor Masaya Ueno
Masaya Ueno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11947766Abstract: A touch panel device includes a first conductive film having first and second regions, at least a part of the first conductive film between the first and the second regions being removed, a second conductive film laminated on the first conductive film across a gap, first and second terminals that output signals, a first electrode electrically connected to the first terminal, a second electrode facing the first electrode across the first region, a first resistor provided on the first conductive film in the second region and having a pair of electrodes, the pair of electrodes facing each other across a first resistance region in the first conductive film, one of the electrodes being electrically connected to the second electrode, the other of the electrodes being electrically connected to the second terminal, and a first switch electrically connecting the first conductive film to the second conductive film, in the second region.Type: GrantFiled: September 17, 2021Date of Patent: April 2, 2024Assignee: FUJITSU COMPONENT LIMITEDInventors: Yuta Nakamura, Yutaka Ueno, Masaya Morohashi, Takuya Ozawa, Hideyuki Hagihara, Yuji Makiuchi
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Publication number: 20240079469Abstract: A semiconductor device includes a semiconductor layer, a Schottky electrode that is formed at a first surface of the semiconductor layer and that forms a Schottky junction Sj between the semiconductor layer and the Schottky electrode, and the Schottky electrode has a first portion that is selectively formed near the first surface of the semiconductor layer in a thickness direction of the Schottky electrode and that is made of Ti containing oxygen. The Schottky electrode may have a second portion that is formed on the first portion and that is made of Ti and N.Type: ApplicationFiled: October 5, 2023Publication date: March 7, 2024Applicant: ROHM CO., LTD.Inventors: Masaya UENO, Sawa HARUYAMA, Masaya SAITO
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Patent number: 11916112Abstract: An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as a device surface, a second main surface at a side opposite to the first main surface, and a side surface connecting the first main surface and the second main surface, a main surface insulating layer including an insulating material, covering the first main surface of the SiC semiconductor layer, and having an insulating side surface continuous to the side surface of the SiC semiconductor layer, and a boundary modified layer including a first region that is modified to be of a property differing from the SiC monocrystal and a second region that is modified to be of a property differing from the insulating material, and being formed across the side surface of the SiC semiconductor layer and the insulating side surface of the main surface insulating layer.Type: GrantFiled: August 8, 2019Date of Patent: February 27, 2024Assignee: ROHM CO., LTD.Inventors: Yasuhiro Kawakami, Yuki Nakano, Masaya Ueno, Seiya Nakazawa, Sawa Haruyama, Yasunori Kutsuma
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Publication number: 20230290887Abstract: A semiconductor device includes a semiconductor substrate having a principal surface, a semiconductor layer formed on the principal surface of the semiconductor substrate, the semiconductor layer including a first-conductivity-type low concentration layer in contact with the principal surface of the semiconductor substrate and a first-conductivity-type high concentration layer that is formed at a surface layer portion of a surface, which is on a side opposite to the principal surface, of the semiconductor layer and that has a higher impurity concentration than the low concentration layer, and a Schottky electrode that is formed on the surface of the semiconductor layer and that forms a Schottky junction portion between the high concentration layer and the Schottky electrode.Type: ApplicationFiled: September 3, 2021Publication date: September 14, 2023Applicant: ROHM CO., LTD.Inventor: Masaya UENO
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Publication number: 20230287893Abstract: A rotor, a magnetic bearing, and a drive unit that rotationally drives the rotor. The magnetic bearing includes a bearing stator and a ring-shaped bearing rotor member. The drive unit has a drive stator and a ring-shaped drive rotor member. The bearing stator has a plurality of bearing stator cores consisting of a magnetic material, disposed on an outer peripheral side of the bearing rotor member. The bearing stator core has a first portion extending in a first direction orthogonal to a direction facing the bearing rotor member, and a pair of second portions extending to a bearing rotor member side from both end portions in the first direction of the first portion. The drive stator is formed so as to pass through a position between an outer peripheral surface of the rotor and the first portion core and between the pair of second portions.Type: ApplicationFiled: May 13, 2021Publication date: September 14, 2023Applicant: IWAKI CO., LTD.Inventors: Toshiki ONIDUKA, Shinichirou KOREEDA, Toshiaki KAMEI, Hikaru SAITOU, Masaya UENO, Takuya SEKI
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Publication number: 20230223433Abstract: An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal that is constituted of a hexagonal crystal and having a first main surface as a device surface facing a c-plane of the SiC monocrystal and has an off angle inclined with respect to the c-plane, a second main surface at a side opposite to the first main surface, and a side surface facing an a-plane of the SiC monocrystal and has an angle less than the off angle with respect to a normal to the first main surface when the normal is 0°.Type: ApplicationFiled: February 22, 2023Publication date: July 13, 2023Inventors: Yuki NAKANO, Masaya UENO, Sawa HARUYAMA, Yasuhiro KAWAKAMI, Seiya NAKAZAWA, Yasunori KUTSUMA
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Publication number: 20230223445Abstract: An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as an element forming surface, a second main surface at a side opposite to the first main surface, and a plurality of side surfaces connecting the first main surface and the second main surface, and a plurality of modified lines formed one layer each at the respective side surfaces of the SiC semiconductor layer and each extending in a band shape along a tangential direction to the first main surface of the SiC semiconductor layer and modified to be of a property differing from the SiC monocrystal.Type: ApplicationFiled: March 8, 2023Publication date: July 13, 2023Inventors: Masaya UENO, Yuki NAKANO, Sawa HARUYAMA, Yasuhiro KAWAKAMI, Seiya NAKAZAWA, Yasunori KUTSUMA
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Publication number: 20230187504Abstract: A SiC semiconductor device includes a SiC chip having a main surface that includes a first surface, a second surface hollowed in a thickness direction outside the first surface, and a connecting surface connecting the first surface and the second surface, and in which a mesa is defined by the first surface, the second surface and the connecting surface, a trench structure formed at the first surface such as to be exposed from the connecting surface, and a sidewall wiring that is formed on the second surface such as to cover the connecting surface and that is electrically connected to the trench structure.Type: ApplicationFiled: July 16, 2021Publication date: June 15, 2023Applicant: ROHM CO., LTD.Inventors: Kenji YAMAMOTO, Seigo MORI, Hiroaki SHIRAGA, Yuki NAKANO, Masaya UENO
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Publication number: 20230187486Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side, a trench gate structure including a gate trench formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer, a trench source structure including a source trench formed deeper than the gate trench and across an interval from the gate trench in the first main surface of the semiconductor layer, a source electrode embedded in the source trench, and a deep well region of a second conductivity type formed in a region of the semiconductor layer along the source trench, a ratio of a depth of the trench source structure with respect to a depth of the trench gate structure being not less than 1.5 and not more than 4.Type: ApplicationFiled: February 6, 2023Publication date: June 15, 2023Inventors: Minoru NAKAGAWA, Yuki NAKANO, Masatoshi AKETA, Masaya UENO, Seigo MORI, Kenji YAMAMOTO
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Publication number: 20230170410Abstract: A SiC semiconductor device includes SiC chip having main surface that includes first surface, second surface hollowed in thickness direction at first depth outside the first surface, and a connecting surface connecting the first surface and the second surface, and in which a mesa is defined by the first surface, the second surface and the connecting surface, a transistor structure formed at an inward portion of the first surface, the transistor structure including a trench gate structure that has a second depth less than the first depth and a trench source structure that has a third depth exceeding the second depth and that adjoins the trench gate structure in one direction, and a dummy structure formed at a peripheral edge portion of the first surface, the dummy structure including a plurality of dummy trench source structures which have the third depth and adjoin each other in the one direction.Type: ApplicationFiled: July 16, 2021Publication date: June 1, 2023Applicant: ROHM CO., LTD.Inventors: Seigo MORI, Kenji YAMAMOTO, Hiroaki SHIRAGA, Yuki NAKANO, Masaya UENO
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Patent number: 11626490Abstract: An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as an element forming surface, a second main surface at a side opposite to the first main surface, and a plurality of side surfaces connecting the first main surface and the second main surface, and a plurality of modified lines formed one layer each at the respective side surfaces of the SiC semiconductor layer and each extending in a band shape along a tangential direction to the first main surface of the SiC semiconductor layer and modified to be of a property differing from the SiC monocrystal.Type: GrantFiled: August 8, 2019Date of Patent: April 11, 2023Assignee: ROHM CO., LTD.Inventors: Masaya Ueno, Yuki Nakano, Sawa Haruyama, Yasuhiro Kawakami, Seiya Nakazawa, Yasunori Kutsuma
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Publication number: 20230103655Abstract: An electronic component includes a covered object, an electrode that covers the covered object and has an electrode side wall on the covered object, an inorganic insulating film that has an inner covering portion covering the electrode such as to expose the electrode side wall, and an organic insulating film that covers the electrode side wall.Type: ApplicationFiled: May 12, 2021Publication date: April 6, 2023Applicant: ROHM CO., LTD.Inventors: Yuki NAKANO, Masaya UENO
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Patent number: 11621319Abstract: An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal that is constituted of a hexagonal crystal and having a first main surface as a device surface facing a c-plane of the SiC monocrystal and has an off angle inclined with respect to the c-plane, a second main surface at a side opposite to the first main surface, and a side surface facing an a-plane of the SiC monocrystal and has an angle less than the off angle with respect to a normal to the first main surface when the normal is 0°.Type: GrantFiled: August 8, 2019Date of Patent: April 4, 2023Assignee: ROHM CO., LTD.Inventors: Yuki Nakano, Masaya Ueno, Sawa Haruyama, Yasuhiro Kawakami, Seiya Nakazawa, Yasunori Kutsuma
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Patent number: 11605707Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side, a trench gate structure including a gate trench formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer, a trench source structure including a source trench formed deeper than the gate trench and across an interval from the gate trench in the first main surface of the semiconductor layer, a source electrode embedded in the source trench, and a deep well region of a second conductivity type formed in a region of the semiconductor layer along the source trench, a ratio of a depth of the trench source structure with respect to a depth of the trench gate structure being not less than 1.5 and not more than 4.Type: GrantFiled: June 16, 2021Date of Patent: March 14, 2023Assignee: ROHM CO., LTD.Inventors: Minoru Nakagawa, Yuki Nakano, Masatoshi Aketa, Masaya Ueno, Seigo Mori, Kenji Yamamoto
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Publication number: 20220320349Abstract: A semiconductor device includes: a semiconductor layer including a semiconductor substrate and an epitaxial layer of a first conductivity type formed on the semiconductor substrate; a surface electrode containing at least one selected from the group consisting of an aluminum alloy and aluminum and formed on the semiconductor layer; and an impurity region of a second conductivity type formed on a surface layer portion of the epitaxial layer and forming a pn junction with the epitaxial layer, wherein the surface electrode includes a Schottky portion that is in contact with a surface of the semiconductor layer and forms a Schottky junction with the epitaxial layer.Type: ApplicationFiled: April 1, 2022Publication date: October 6, 2022Inventors: Masaya UENO, Sawa HARUYAMA, Masaya SAITO
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Publication number: 20210305363Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side, a trench gate structure including a gate trench formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer, a trench source structure including a source trench formed deeper than the gate trench and across an interval from the gate trench in the first main surface of the semiconductor layer, a source electrode embedded in the source trench, and a deep well region of a second conductivity type formed in a region of the semiconductor layer along the source trench, a ratio of a depth of the trench source structure with respect to a depth of the trench gate structure being not less than 1.5 and not more than 4.Type: ApplicationFiled: June 16, 2021Publication date: September 30, 2021Inventors: Minoru NAKAGAWA, Yuki NAKANO, Masatoshi AKETA, Masaya UENO, Seigo MORI, Kenji YAMAMOTO
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Publication number: 20210296448Abstract: An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as a device surface, a second main surface at a side opposite to the first main surface, and a side surface connecting the first main surface and the second main surface, a main surface insulating layer including an insulating material, covering the first main surface of the SiC semiconductor layer, and having an insulating side surface continuous to the side surface of the SiC semiconductor layer, and a boundary modified layer including a first region that is modified to be of a property differing from the SiC monocrystal and a second region that is modified to be of a property differing from the insulating material, and being formed across the side surface of the SiC semiconductor layer and the insulating side surface of the main surface insulating layer.Type: ApplicationFiled: August 8, 2019Publication date: September 23, 2021Inventors: Yasuhiro KAWAKAMI, Yuki NAKANO, Masaya UENO, Seiya NAKAZAWA, Sawa HARUYAMA, Yasunori KUTSUMA
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Publication number: 20210234007Abstract: An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as an element forming surface, a second main surface at a side opposite to the first main surface, and a plurality of side surfaces connecting the first main surface and the second main surface, and a plurality of modified lines formed one layer each at the respective side surfaces of the SiC semiconductor layer and each extending in a band shape along a tangential direction to the first main surface of the SiC semiconductor layer and modified to be of a property differing from the SiC monocrystal.Type: ApplicationFiled: August 8, 2019Publication date: July 29, 2021Inventors: Masaya UENO, Yuki NAKANO, Sawa HARUYAMA, Yasuhiro KAWAKAMI, Seiya NAKAZAWA, Yasunori KUTSUMA
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Publication number: 20210233994Abstract: An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal that is constituted of a hexagonal crystal and having a first main surface as a device surface facing a c-plane of the SiC monocrystal and has an off angle inclined with respect to the c-plane, a second main surface at a side opposite to the first main surface, and a side surface facing an a-plane of the SiC monocrystal and has an angle less than the off angle with respect to a normal to the first main surface when the normal is 0°.Type: ApplicationFiled: August 8, 2019Publication date: July 29, 2021Inventors: Yuki NAKANO, Masaya UENO, Sawa HARUYAMA, Yasuhiro KAWAKAMI, Seiya NAKAZAWA, Yasunori KUTSUMA
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Patent number: 11069771Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side, a trench gate structure including a gate trench formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer, a trench source structure including a source trench formed deeper than the gate trench and across an interval from the gate trench in the first main surface of the semiconductor layer, a source electrode embedded in the source trench, and a deep well region of a second conductivity type formed in a region of the semiconductor layer along the source trench, a ratio of a depth of the trench source structure with respect to a depth of the trench gate structure being not less than 1.5 and not more than 4.Type: GrantFiled: May 17, 2018Date of Patent: July 20, 2021Assignee: ROHM CO., LTD.Inventors: Minoru Nakagawa, Yuki Nakano, Masatoshi Aketa, Masaya Ueno, Seigo Mori, Kenji Yamamoto