Patents by Inventor Masayoshi Iwayama

Masayoshi Iwayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240074327
    Abstract: According to one embodiment, a magnetic memory device includes: a first interconnect; a second interconnect; a first switching element provided on the first interconnect; a second switching element provided on the second interconnect; a first insulating layer provided surrounding the first switching element; a second insulating layer surrounding the second switching element and not being in contact with the first insulating layer; a first conductor provided on the first switching element and the first insulating layer; a second conductor provided on the second switching element and the second insulating layer; a first magnetoresistive effect element provided on the first conductor; and a second magnetoresistive effect element provided on the second conductor.
    Type: Application
    Filed: June 12, 2023
    Publication date: February 29, 2024
    Applicant: Kioxia Corporation
    Inventors: Taichi IGARASHI, Yuichi ITO, Eiji KITAGAWA, Masayoshi IWAYAMA
  • Patent number: 11875834
    Abstract: According to one embodiment, a magnetic memory device includes a first memory cell and a control circuit. The first memory cell includes a first magnetoresistance effect element and a first switching element coupled in series. The control circuit is configured to repeatedly apply a first voltage to the first memory cell until a first condition is satisfied in a first operation.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: January 16, 2024
    Assignee: Kioxia Corporation
    Inventor: Masayoshi Iwayama
  • Publication number: 20230380183
    Abstract: A magnetic memory device including a first memory cell which includes a first stacked structure including a magnetic layer and a second memory cell which is provided on the first memory cell and includes a second stacked structure including a magnetic layer. Each of the first stacked structure and the second stacked structure includes a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. A concentration of iron (Fe) contained in the first magnetic layer included in the first stacked structure and a concentration of iron (Fe) contained in the first magnetic layer included in the second stacked structure are different from each other.
    Type: Application
    Filed: August 1, 2023
    Publication date: November 23, 2023
    Applicant: Kioxia Corporation
    Inventors: Masayoshi IWAYAMA, Tatsuya KISHI, Masahiko NAKAYAMA, Toshihiko NAGASE, Daisuke WATANABE, Tadashi KAI
  • Patent number: 11758739
    Abstract: A magnetic memory device including a first memory cell which includes a first stacked structure including a magnetic layer and a second memory cell which is provided on the first memory cell and includes a second stacked structure including a magnetic layer. Each of the first stacked structure and the second stacked structure includes a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. A concentration of iron (Fe) contained in the first magnetic layer included in the first stacked structure and a concentration of iron (Fe) contained in the first magnetic layer included in the second stacked structure are different from each other.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: September 12, 2023
    Assignee: Kioxia Corporation
    Inventors: Masayoshi Iwayama, Tatsuya Kishi, Masahiko Nakayama, Toshihiko Nagase, Daisuke Watanabe, Tadashi Kai
  • Publication number: 20230088745
    Abstract: A magnetic memory device includes a first interconnect, a second interconnect, a memory cell, and a write circuit. The memory cell is electrically coupled between the first interconnect and the second interconnect, and includes a variable resistance element and a switching element. The write circuit supplies a write voltage from the current source circuit or the voltage source circuit to write data into the memory cell. The write circuit supplies the write voltage to one of the first interconnect and the second interconnect using the voltage source circuit during a first period ranging from a first time to a second time. The write circuit supplies the write voltage to one of the first interconnect and the second interconnect using the current source circuit during a second period ranging from a third time to a fourth time.
    Type: Application
    Filed: March 14, 2022
    Publication date: March 23, 2023
    Applicant: Kioxia Corporation
    Inventors: Yosuke KOBAYASHI, Masayoshi IWAYAMA
  • Publication number: 20230081718
    Abstract: According to one embodiment, a magnetic memory device includes a memory cell including a magnetoresistance effect element, a switching element, and a resistance element connected in series. The resistance element has an asymmetric current-voltage characteristic, and when data is read from the memory cell, a first voltage in a reverse direction is applied to the resistance element, and a resistance value of the resistance element at a time when the first voltage is applied is greater than a resistance value of the resistance element at a time when a second voltage in a forward direction having an absolute value identical to an absolute value of the first voltage is applied.
    Type: Application
    Filed: March 11, 2022
    Publication date: March 16, 2023
    Applicant: Kioxia Corporation
    Inventor: Masayoshi IWAYAMA
  • Publication number: 20220084574
    Abstract: According to one embodiment, a magnetic memory device includes a first memory cell and a control circuit. The first memory cell includes a first magnetoresistance effect element and a first switching element coupled in series. The control circuit is configured to repeatedly apply a first voltage to the first memory cell until a first condition is satisfied in a first operation.
    Type: Application
    Filed: September 2, 2021
    Publication date: March 17, 2022
    Applicant: Kioxia Corporation
    Inventor: Masayoshi IWAYAMA
  • Publication number: 20210335888
    Abstract: A magnetic memory device including a first memory cell which includes a first stacked structure including a magnetic layer and a second memory cell which is provided on the first memory cell and includes a second stacked structure including a magnetic layer. Each of the first stacked structure and the second stacked structure includes a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. A concentration of iron (Fe) contained in the first magnetic layer included in the first stacked structure and a concentration of iron (Fe) contained in the first magnetic layer included in the second stacked structure are different from each other.
    Type: Application
    Filed: July 9, 2021
    Publication date: October 28, 2021
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Masayoshi IWAYAMA, Tatsuya KISHI, Masahiko NAKAYAMA, Toshihiko NAGASE, Daisuke WATANABE, Tadashi KAI
  • Patent number: 11094743
    Abstract: According to one embodiment, a magnetic memory device includes a first memory cell which includes a first stacked structure including a magnetic layer, and a second memory cell which is provided on the first memory cell and includes a second stacked structure including a magnetic layer, wherein each of the first stacked structure and the second stacked structure has a structure in which a plurality of layers including a predetermined layer are stacked, and the predetermined layer included in the first stacked structure and the predetermined layer included in the second stacked structure have different thicknesses.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: August 17, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Masayoshi Iwayama, Tatsuya Kishi, Masahiko Nakayama, Toshihiko Nagase, Daisuke Watanabe, Tadashi Kai
  • Publication number: 20200091227
    Abstract: According to one embodiment, a magnetic memory device includes a first memory cell which includes a first stacked structure including a magnetic layer, and a second memory cell which is provided on the first memory cell and includes a second stacked structure including a magnetic layer, wherein each of the first stacked structure and the second stacked structure has a structure in which a plurality of layers including a predetermined layer are stacked, and the predetermined layer included in the first stacked structure and the predetermined layer included in the second stacked structure have different thicknesses.
    Type: Application
    Filed: March 14, 2019
    Publication date: March 19, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Masayoshi IWAYAMA, Tatsuya KISHI, Masahiko NAKAYAMA, Toshihiko NAGASE, Daisuke WATANABE, Tadashi KAI
  • Patent number: 10193058
    Abstract: According to one embodiment, a magnetoresistive memory device includes a first magnetic layer, a second magnetic layer on one major surface side of the first magnetic layer via a first nonmagnetic layer, a third magnetic layer on the second magnetic layer via a first Ru layer, a sidewall insulating film on sides of the layers, a fourth magnetic layer on an other major surface side of the first magnetic layer via a second nonmagnetic layer, and a fifth magnetic layer on the fourth magnetic layer via a second Ru layer. The reversed magnetic field of the second magnetic layer is smaller than that of the third and fourth magnetic layers, and the reversed magnetic field of the fifth magnetic layer is smaller than that of the third and fourth magnetic layers.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: January 29, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Masayoshi Iwayama
  • Publication number: 20170263856
    Abstract: According to one embodiment, a magnetoresistive memory device includes a first magnetic layer, a second magnetic layer on one major surface side of the first magnetic layer via a first nonmagnetic layer, a third magnetic layer on the second magnetic layer via a first Ru layer, a sidewall insulating film on sides of the layers, a fourth magnetic layer on an other major surface side of the first magnetic layer via a second nonmagnetic layer, and a fifth magnetic layer on the fourth magnetic layer via a second Ru layer. The reversed magnetic field of the second magnetic layer is smaller than that of the third and fourth magnetic layers, and the reversed magnetic field of the fifth magnetic layer is smaller than that of the third and fourth magnetic layers.
    Type: Application
    Filed: September 9, 2016
    Publication date: September 14, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masayoshi IWAYAMA
  • Patent number: 9640756
    Abstract: According to one embodiment, a method for manufacturing a magnetic memory is disclosed. The method includes forming a magnetoresistive element on a substrate. The method further includes measuring an electrical characteristic of the magnetoresistive element, and applying a voltage to the magnetoresistive element which the electrical characteristic is measured.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: May 2, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hisanori Aikawa, Masayoshi Iwayama
  • Patent number: 9590173
    Abstract: According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes a substrate and an underlying layer provided on the substrate. The underlying layer includes a first underlying layer and a second underlying layer surrounding the first underlying layer. The first and second underlying layers contain a metal of a same type. The first underlying layer includes a lower part which is greater than the upper part in width. The magnetic memory further includes a magnetoresistive element provided on the underlying layer.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: March 7, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masayoshi Iwayama
  • Patent number: 9449892
    Abstract: According to one embodiment, a manufacturing method of a magnetic memory device, includes obtaining first and second magnetic fields for each of magnetoresistive effect elements, defining a group of the elements, for the first and second magnetic fields of the elements in the group, a highest first magnetic field being lower than a lowest second magnetic field, and a difference between the highest first magnetic field and the lowest second magnetic field being greater than a predetermined difference, determining a maximum applied magnetic field higher than the highest first magnetic field and lower than the lowest second magnetic field, and obtaining magnetic characteristics for each of the elements in the group by applying a magnetic field decreasing from the maximum applied magnetic field after the magnetic field is increased up to the maximum applied magnetic field.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: September 20, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hisanori Aikawa, Masayoshi Iwayama, Akiyuki Murayama
  • Publication number: 20160268502
    Abstract: According to one embodiment, a method for manufacturing a magnetic memory is disclosed. The method includes forming a magnetoresistive element on a substrate. The method further includes measuring an electrical characteristic of the magnetoresistive element, and applying a voltage to the magnetoresistive element which the electrical characteristic is measured.
    Type: Application
    Filed: July 24, 2015
    Publication date: September 15, 2016
    Inventors: Hisanori AIKAWA, Masayoshi IWAYAMA
  • Patent number: 9306152
    Abstract: According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes an underlying structure having conductivity provided on the substrate and including a first layer with a polycrystalline structure and a second layer with an amorphous structure, and a magnetoresistive element provide on the underlying layer. The magnetoresistive element includes a first magnetic layer provided on the underlying layer, a non-magnetic layer provided on the first magnetic layer, and a second magnetic layer provided on the non-magnetic layer.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: April 5, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masayoshi Iwayama, Hiroyuki Kanaya
  • Publication number: 20160072051
    Abstract: According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes a substrate and an underlying layer provided on the substrate. The underlying layer includes a first underlying layer and a second underlying layer surrounding the first underlying layer. The first and second underlying layers contain a metal of a same type. The first underlying layer includes a lower part which is greater than the upper part in width. The magnetic memory further includes a magnetoresistive element provided on the underlying layer.
    Type: Application
    Filed: March 11, 2015
    Publication date: March 10, 2016
    Inventor: Masayoshi IWAYAMA
  • Publication number: 20160071776
    Abstract: According to one embodiment, a manufacturing method of a magnetic memory device, includes obtaining first and second magnetic fields for each of magnetoresistive effect elements, defining a group of the elements, for the first and second magnetic fields of the elements in the group, a highest first magnetic field being lower than a lowest second magnetic field, and a difference between the highest first magnetic field and the lowest second magnetic field being greater than a predetermined difference, determining a maximum applied magnetic field higher than the highest first magnetic field and lower than the lowest second magnetic field, and obtaining magnetic characteristics for each of the elements in the group by applying a magnetic field decreasing from the maximum applied magnetic field after the magnetic field is increased up to the maximum applied magnetic field.
    Type: Application
    Filed: March 3, 2015
    Publication date: March 10, 2016
    Inventors: Hisanori AIKAWA, Masayoshi IWAYAMA, Akiyuki MURAYAMA
  • Patent number: 9276039
    Abstract: The semiconductor storage device includes a memory cell array region in which a plurality of storing MTJ elements capable of changing resistance depending on a direction of magnetization are arranged on a semiconductor substrate. The semiconductor storage device includes a resistive element region in which a plurality of resisting MTJ elements are arranged on the semiconductor substrate along a first direction and a second direction perpendicular to the first direction. An area of a first cross section of the resisting MTJ element parallel with an upper surface of the semiconductor substrate is larger than an area of a second cross section of the storing MTJ element parallel with the upper surface of the semiconductor substrate.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: March 1, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masayoshi Iwayama