Patents by Inventor Masayoshi Iwayama

Masayoshi Iwayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11094743
    Abstract: According to one embodiment, a magnetic memory device includes a first memory cell which includes a first stacked structure including a magnetic layer, and a second memory cell which is provided on the first memory cell and includes a second stacked structure including a magnetic layer, wherein each of the first stacked structure and the second stacked structure has a structure in which a plurality of layers including a predetermined layer are stacked, and the predetermined layer included in the first stacked structure and the predetermined layer included in the second stacked structure have different thicknesses.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: August 17, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Masayoshi Iwayama, Tatsuya Kishi, Masahiko Nakayama, Toshihiko Nagase, Daisuke Watanabe, Tadashi Kai
  • Publication number: 20200091227
    Abstract: According to one embodiment, a magnetic memory device includes a first memory cell which includes a first stacked structure including a magnetic layer, and a second memory cell which is provided on the first memory cell and includes a second stacked structure including a magnetic layer, wherein each of the first stacked structure and the second stacked structure has a structure in which a plurality of layers including a predetermined layer are stacked, and the predetermined layer included in the first stacked structure and the predetermined layer included in the second stacked structure have different thicknesses.
    Type: Application
    Filed: March 14, 2019
    Publication date: March 19, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Masayoshi IWAYAMA, Tatsuya KISHI, Masahiko NAKAYAMA, Toshihiko NAGASE, Daisuke WATANABE, Tadashi KAI
  • Patent number: 10193058
    Abstract: According to one embodiment, a magnetoresistive memory device includes a first magnetic layer, a second magnetic layer on one major surface side of the first magnetic layer via a first nonmagnetic layer, a third magnetic layer on the second magnetic layer via a first Ru layer, a sidewall insulating film on sides of the layers, a fourth magnetic layer on an other major surface side of the first magnetic layer via a second nonmagnetic layer, and a fifth magnetic layer on the fourth magnetic layer via a second Ru layer. The reversed magnetic field of the second magnetic layer is smaller than that of the third and fourth magnetic layers, and the reversed magnetic field of the fifth magnetic layer is smaller than that of the third and fourth magnetic layers.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: January 29, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Masayoshi Iwayama
  • Publication number: 20170263856
    Abstract: According to one embodiment, a magnetoresistive memory device includes a first magnetic layer, a second magnetic layer on one major surface side of the first magnetic layer via a first nonmagnetic layer, a third magnetic layer on the second magnetic layer via a first Ru layer, a sidewall insulating film on sides of the layers, a fourth magnetic layer on an other major surface side of the first magnetic layer via a second nonmagnetic layer, and a fifth magnetic layer on the fourth magnetic layer via a second Ru layer. The reversed magnetic field of the second magnetic layer is smaller than that of the third and fourth magnetic layers, and the reversed magnetic field of the fifth magnetic layer is smaller than that of the third and fourth magnetic layers.
    Type: Application
    Filed: September 9, 2016
    Publication date: September 14, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masayoshi IWAYAMA
  • Patent number: 9640756
    Abstract: According to one embodiment, a method for manufacturing a magnetic memory is disclosed. The method includes forming a magnetoresistive element on a substrate. The method further includes measuring an electrical characteristic of the magnetoresistive element, and applying a voltage to the magnetoresistive element which the electrical characteristic is measured.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: May 2, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hisanori Aikawa, Masayoshi Iwayama
  • Patent number: 9590173
    Abstract: According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes a substrate and an underlying layer provided on the substrate. The underlying layer includes a first underlying layer and a second underlying layer surrounding the first underlying layer. The first and second underlying layers contain a metal of a same type. The first underlying layer includes a lower part which is greater than the upper part in width. The magnetic memory further includes a magnetoresistive element provided on the underlying layer.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: March 7, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masayoshi Iwayama
  • Patent number: 9449892
    Abstract: According to one embodiment, a manufacturing method of a magnetic memory device, includes obtaining first and second magnetic fields for each of magnetoresistive effect elements, defining a group of the elements, for the first and second magnetic fields of the elements in the group, a highest first magnetic field being lower than a lowest second magnetic field, and a difference between the highest first magnetic field and the lowest second magnetic field being greater than a predetermined difference, determining a maximum applied magnetic field higher than the highest first magnetic field and lower than the lowest second magnetic field, and obtaining magnetic characteristics for each of the elements in the group by applying a magnetic field decreasing from the maximum applied magnetic field after the magnetic field is increased up to the maximum applied magnetic field.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: September 20, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hisanori Aikawa, Masayoshi Iwayama, Akiyuki Murayama
  • Publication number: 20160268502
    Abstract: According to one embodiment, a method for manufacturing a magnetic memory is disclosed. The method includes forming a magnetoresistive element on a substrate. The method further includes measuring an electrical characteristic of the magnetoresistive element, and applying a voltage to the magnetoresistive element which the electrical characteristic is measured.
    Type: Application
    Filed: July 24, 2015
    Publication date: September 15, 2016
    Inventors: Hisanori AIKAWA, Masayoshi IWAYAMA
  • Patent number: 9306152
    Abstract: According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes an underlying structure having conductivity provided on the substrate and including a first layer with a polycrystalline structure and a second layer with an amorphous structure, and a magnetoresistive element provide on the underlying layer. The magnetoresistive element includes a first magnetic layer provided on the underlying layer, a non-magnetic layer provided on the first magnetic layer, and a second magnetic layer provided on the non-magnetic layer.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: April 5, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masayoshi Iwayama, Hiroyuki Kanaya
  • Publication number: 20160072051
    Abstract: According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes a substrate and an underlying layer provided on the substrate. The underlying layer includes a first underlying layer and a second underlying layer surrounding the first underlying layer. The first and second underlying layers contain a metal of a same type. The first underlying layer includes a lower part which is greater than the upper part in width. The magnetic memory further includes a magnetoresistive element provided on the underlying layer.
    Type: Application
    Filed: March 11, 2015
    Publication date: March 10, 2016
    Inventor: Masayoshi IWAYAMA
  • Publication number: 20160071776
    Abstract: According to one embodiment, a manufacturing method of a magnetic memory device, includes obtaining first and second magnetic fields for each of magnetoresistive effect elements, defining a group of the elements, for the first and second magnetic fields of the elements in the group, a highest first magnetic field being lower than a lowest second magnetic field, and a difference between the highest first magnetic field and the lowest second magnetic field being greater than a predetermined difference, determining a maximum applied magnetic field higher than the highest first magnetic field and lower than the lowest second magnetic field, and obtaining magnetic characteristics for each of the elements in the group by applying a magnetic field decreasing from the maximum applied magnetic field after the magnetic field is increased up to the maximum applied magnetic field.
    Type: Application
    Filed: March 3, 2015
    Publication date: March 10, 2016
    Inventors: Hisanori AIKAWA, Masayoshi IWAYAMA, Akiyuki MURAYAMA
  • Patent number: 9276039
    Abstract: The semiconductor storage device includes a memory cell array region in which a plurality of storing MTJ elements capable of changing resistance depending on a direction of magnetization are arranged on a semiconductor substrate. The semiconductor storage device includes a resistive element region in which a plurality of resisting MTJ elements are arranged on the semiconductor substrate along a first direction and a second direction perpendicular to the first direction. An area of a first cross section of the resisting MTJ element parallel with an upper surface of the semiconductor substrate is larger than an area of a second cross section of the storing MTJ element parallel with the upper surface of the semiconductor substrate.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: March 1, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masayoshi Iwayama
  • Publication number: 20160055891
    Abstract: According to one embodiment, a magnetic memory includes a memory cell array including magnetoresistive elements, a heater and a temperature sensor provided in the memory cell array, a heater driver which drives the heater, a temperature detector which detects a first temperature sensed by the temperature sensor, and a control circuit which controls the heater driver based on the first temperature.
    Type: Application
    Filed: January 9, 2015
    Publication date: February 25, 2016
    Inventors: Hisanori AIKAWA, Masayoshi IWAYAMA, Akiyuki MURAYAMA, Tatsuya KISHI, Sumio IKEGAWA
  • Patent number: 9231193
    Abstract: According to one embodiment, a magnetic memory includes a magnetoresistive effect element provided in a memory cell, the magnetoresistive effect element including a multilayer structure including a first magnetic layer, a second magnetic layer, and a nonmagnetic layer between the first magnetic layer and the second magnetic layer, a first electrode provided on an upper portion of the multilayer structure and including a first material, and a first film provided on a side surface of the first electrode and including a second material which is different from the first material of the first electrode.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: January 5, 2016
    Inventors: Masayoshi Iwayama, Hisanori Aikawa
  • Patent number: 9203015
    Abstract: According to one embodiment, a magnetic storage device includes an insulating region, a lower electrode including a first portion formed in a hole provided in the insulating region and a second portion protruded from the insulating region, a spacer insulating film formed on a side surface of at least the second portion of the lower electrode, a magnetic tunneling junction portion formed on a top surface of the lower electrode, and an upper electrode formed on the magnetic tunneling junction portion.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: December 1, 2015
    Inventors: Hisanori Aikawa, Masayoshi Iwayama, Akiyuki Murayama, Sumio Ikegawa
  • Publication number: 20150255706
    Abstract: According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes an underlying structure having conductivity provided on the substrate and including a first layer with a polycrystalline structure and a second layer with an amorphous structure, and a magnetoresistive element provide on the underlying layer. The magnetoresistive element includes a first magnetic layer provided on the underlying layer, a non-magnetic layer provided on the first magnetic layer, and a second magnetic layer provided on the non-magnetic layer.
    Type: Application
    Filed: July 2, 2014
    Publication date: September 10, 2015
    Inventors: Masayoshi IWAYAMA, Hiroyuki KANAYA
  • Publication number: 20150069547
    Abstract: According to one embodiment, a magnetic memory includes a magnetoresistive effect element provided in a memory cell, the magnetoresistive effect element including a multilayer structure including a first magnetic layer, a second magnetic layer, and a nonmagnetic layer between the first magnetic layer and the second magnetic layer, a first electrode provided on an upper portion of the multilayer structure and including a first material, and a first film provided on a side surface of the first electrode and including a second material which is different from the first material of the first electrode.
    Type: Application
    Filed: March 7, 2014
    Publication date: March 12, 2015
    Inventors: Masayoshi IWAYAMA, Hisanori AIKAWA
  • Patent number: 8902634
    Abstract: According to one embodiment, a memory includes a resistance change element on an interlayer insulating film and including a lower electrode and an upper electrode, a sidewall insulating film on a side surface of the element, a plug in the interlayer insulating film and connected to the lower electrode, an interconnect on the interlayer insulating film and connected to the upper electrode. The element is provided immediately above the plug, the interconnect covers the side surface of the element via the sidewall insulating film, an upper surface of the first plug is covered with the lower electrode and the sidewall insulating film.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masayoshi Iwayama
  • Publication number: 20140284743
    Abstract: According to one embodiment, a magnetic storage device includes an insulating region, a lower electrode including a first portion formed in a hole provided in the insulating region and a second portion protruded from the insulating region, a spacer insulating film formed on a side surface of at least the second portion of the lower electrode, a magnetic tunneling junction portion formed on a top surface of the lower electrode, and an upper electrode formed on the magnetic tunneling junction portion.
    Type: Application
    Filed: August 30, 2013
    Publication date: September 25, 2014
    Inventors: Hisanori AIKAWA, Masayoshi IWAYAMA, Akiyuki MURAYAMA, Sumio IKEGAWA
  • Patent number: 8754433
    Abstract: According to one embodiment, a semiconductor device includes a switch element provided in a surface area of a semiconductor substrate, a contact plug with an upper surface and a lower surface, and a function element provided on the upper surface of the contact plug. The lower surface of the contact plug is connected to the switch element. The upper surface of the contact plug has a maximum roughness of 0.2 nm or less.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: June 17, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukiteru Matsui, Gaku Minamihaba, Hajime Eda, Masayoshi Iwayama, Minoru Amano, Masatoshi Yoshikawa, Motoyuki Sato, Kyoichi Suguro, Masako Kodera