Patents by Inventor Masayuki Kikushima

Masayuki Kikushima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6762537
    Abstract: An opening is formed in the center of a base on which an input/output electrode pattern is formed. Meanwhile, a plurality of bumps are formed on two opposing sides of an active element surface of the semiconductor integrated circuit so as to mount the semiconductor integrated circuit in the center of the opening. The semiconductor integrated circuit is connected to the electrode pattern on the base through the plurality of bumps by ultrasonic bonding. In this way, a small and thin piezoelectric device which has superior bonding characteristics of the semiconductor integrated circuit and the base, which are subjected to flip-chip bonding, and which endures mechanical shock, thermal stress, etc., can be obtained at reduced cost.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: July 13, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Masayuki Kikushima
  • Publication number: 20040085163
    Abstract: In a tuning-fork piezoelectric resonator element 14, a quartz wafer is subjected to wet etching such that the lengthwise, widthwise, and thickness directions of resonating arms 16a and 16b are oriented corresponding to the Y-axis, X-axis, and Z-axis of quartz crystal, lengthwise grooves 18a and 18b are provided on principal surfaces of the resonating arms so that the center lines C1 thereof are placed offset in the −X-direction from the center lines C2 of the resonating arms, thereby balancing the stiffness between the right and left portions in the widthwise direction of the resonating arms, and stabilizing bending of the resonating arms.
    Type: Application
    Filed: March 7, 2003
    Publication date: May 6, 2004
    Applicant: Seiko Epson Corporation
    Inventor: Masayuki Kikushima
  • Publication number: 20030061693
    Abstract: A compact and thin piezo-electric resonator is provided having a high air-tightness and available at a low cost, in which a piezo-electric resonator element is provided in a housing having a structure which permits adjustment of the frequency after sealing the housing. Further, a surface-mounting type piezo-electric resonator is provided, in which a piezo-electric resonator element is provided in a housing, having a structure which permits frequency adjustment through an opening provided in a base or a lid forming the housing.
    Type: Application
    Filed: September 16, 2002
    Publication date: April 3, 2003
    Applicant: Seiko Epson Corporation
    Inventors: Masayuki Kikushima, Yoshio Morita
  • Patent number: 5912592
    Abstract: A piezoelectric oscillator in which a resonator accommodating a piezoelectric element, such as a quartz crystal resonator or a SAW resonator, in a case thereof and an IC chip, such as an IC for PLL, electrically connected to the resonator are integrally molded by molding resin. Extending radiating leads are provided for an island of a lead frame, in which the IC chip is disposed, and a portion of the radiating leads is exposed out of the molding resin so that the heat generated in the IC chip is positively radiated. Radiating leads are also attached to the case of the resonator to project out of the molding resin so that heat conducted to the case is radiated to minimize influence of heat upon the piezoelectric element. In an oscillator, the size of which has been reduced and the frequency of which has been raised, heat generated in the IC chip is radiated to the outside of the molding resin so that a rise in the temperature of the oscillator is minimized.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: June 15, 1999
    Assignee: Seiko Epson Corporation
    Inventor: Masayuki Kikushima
  • Patent number: 5745012
    Abstract: A voltage-controlled oscillator is provided having a semiconductor integrated circuit and a piezoelectric resonator. A variable-capacitance diode may be connected in series with the piezoelectric resonator. The variable-capacitance diode may be further mounted a land of a lead frame. The piezoelectric resonator, variable-capacitance diode and lead frame may be resin molded into a single unit. In operation, a signal may be applied to a node located between the variable-capacitance diode and the DC-cutting capacitor.
    Type: Grant
    Filed: January 21, 1997
    Date of Patent: April 28, 1998
    Assignee: Seiko Epson Corporation
    Inventors: Manabu Oka, Yukari Nakajima, Masayuki Kikushima, Kazuhiko Shimodaira
  • Patent number: 5705957
    Abstract: This invention provides a temperature-compensated piezoelectric oscillator having an oscillation frequency that is easily adjusted in an adjustment procedure after its assembly. Compensation for frequency-temperature characteristics is achieved without the need for an externally installed variable reactance element. The temperature-compensated piezoelectric oscillator includes a piezoelectric oscillator element and an oscillator circuit that drives the piezoelectric oscillator element. The oscillator circuit changes the oscillation frequency in response to an applied power supply voltage VDD(T). A temperature sensor circuit senses the ambient temperature T of the piezoelectric oscillator element. A variable power supply circuit changes the power supply voltage VDD(T) applied to the oscillator circuit in response to the temperature sensed by the temperature sensor circuit. The changes in the applied power supply voltage VDD(T) changes the frequency-temperature characteristics of the oscillator circuit.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: January 6, 1998
    Assignee: Seiko Epson Corporation
    Inventors: Manabu Oka, Masayuki Kikushima, Kazunari Ichinose
  • Patent number: 5696950
    Abstract: A flexible clock and reset signal generation and distribution system and method for distributing a relatively low frequency clock signal to various elements of a computer system that require higher frequency clock signals for operation and includes programmable frequency synthesizers containing phase locked loop (PLL) type frequency multipliers, which are located physically adjacent to the computer system elements for receiving the low frequency clock signal and generating the various required higher frequency clock signals. The source of the relatively low frequency clock signal is a real-time clock (RTC) module having a crystal oscillator, a reset signal generator, and a low voltage detector. The RTC module switches off the low frequency clock signal when the main system power supply falls below a prescribed voltage level, such as, a battery voltage, or a voltage reference, or a combination battery voltage and voltage reference.
    Type: Grant
    Filed: March 31, 1994
    Date of Patent: December 9, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Kazushige Ichinose, Masayuki Kikushima, Hideo Karasawa, Tooru Shirotori, Mikio Shigemori
  • Patent number: 5631609
    Abstract: The invention provides a piezoelectric oscillator including a semiconductor integrated circuit and a piezoelectric resonator or a voltage-controlled oscillator including a semiconductor integrated circuit, a piezoelectric resonator and another electronic component. The piezoelectric resonator has a cross-sectional shape of an ellipse or a track. The semiconductor integrated circuit and the electronic component are molded with a resin into a very thin unit.
    Type: Grant
    Filed: February 14, 1996
    Date of Patent: May 20, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Manabu Oka, Yukari Nakajima, Masayuki Kikushima, Kazuhiko Shimodaira
  • Patent number: 5327104
    Abstract: A flat package piezoelectric oscillator, sealed with resin, and having leads or terminals includes an IC chip mounted on one side of an island portion of a lead frame, and a piezoelectric oscillator element mounted on an opposite side of the island portion. The resin package of the oscillator has at least one hole through one of opposite surfaces of the package. An injection hole for resin injection is provided along a diagonal line extending between diametrically opposed corners of the resin package, and a cylindrical case of the piezoelectric crystal oscillator element is located such that its longitudinal axis is aligned with the diagonal line to within a range from -45.degree. to +45.degree.. The connection portions of lead terminals for the piezoelectric oscillator element and the pads of the IC chip are located adjacent to the diagonal line. The fabrication of the piezoelectric crystal oscillator is completed by sealing the above described structure with resin.
    Type: Grant
    Filed: October 14, 1992
    Date of Patent: July 5, 1994
    Assignee: Seiko Epson Corporation
    Inventor: Masayuki Kikushima